[X86] Correct two places that seemed to be mishandling X86ISD::UMUL

[craig.topper]

Summary

According to the X86ISelLowering.h, UMUL results are low, high, and flags. But one place was treating result 1 as flags, and another place was treating result 1 or 2 as flags.

[craig.topper]

I'm actually not sure why any of the "flag" setting instructions are in computeKnownBitsForTargetNode. You can remove them all and no tests fail.

[RKSimon]

lib/Target/X86/X86ISelLowering.cpp

26920

Probably a lot cleaner just to set Known.Zero.setBitsFrom(1); here instead of using goto

[craig.topper]

Removed the known bits part. I think we should just remove these nodes from known bits. I've done that in D36657

[RKSimon]

LGTM

lib/Target/X86/X86ISelLowering.cpp

 /// Return true if opcode is a X86 logical comparison.
 static bool isX86LogicalCmp(SDValue Op) {
   unsigned Opc = Op.getOpcode();
   if (Opc == X86ISD::CMP || Opc == X86ISD::COMI || Opc == X86ISD::UCOMI ||
       Opc == X86ISD::SAHF)
     return true;
   if (Op.getResNo() == 1 &&
       (Opc == X86ISD::ADD || Opc == X86ISD::SUB || Opc == X86ISD::ADC ||
-       Opc == X86ISD::SBB || Opc == X86ISD::SMUL || Opc == X86ISD::UMUL ||
+       Opc == X86ISD::SBB || Opc == X86ISD::SMUL ||
        Opc == X86ISD::INC || Opc == X86ISD::DEC || Opc == X86ISD::OR ||
        Opc == X86ISD::XOR || Opc == X86ISD::AND))
     return true;
 
   if (Op.getResNo() == 2 && Opc == X86ISD::UMUL)
     return true;
 
   return false;
assert((Opc >= ISD::BUILTIN_OP_END ||
          "Should use MaskedValueIsZero if you don't know whether Op"
          " is a target node!");
 
   Known.resetAll();
   switch (Opc) {
   default: break;
   case X86ISD::ADD:
   case X86ISD::SUB:
   case X86ISD::ADC:
   case X86ISD::SBB:
   case X86ISD::SMUL:
   case X86ISD::UMUL:
   case X86ISD::INC:
   case X86ISD::DEC:
   case X86ISD::OR:
   case X86ISD::XOR:
   case X86ISD::AND: