[mips] Handle the `long-calls` feature flags in the MIPS backend

[atanasyan]

Summary

If the long-calls feature flags is enabled, disable use of the jal instruction. Instead of that call a function by by first loading its address into a register, and then using the contents of that register.

[sdardis]

2 nits: We should warn/error in LLVM on mixing abicalls and long calls (abicalls overrides long calls). We should make sure clang warns but doesn't error.

Second is about 64bit support, inlined,

lib/Target/Mips/MipsISelLowering.cpp

3024 ↗

(On Diff #105736)

Nit:// FIXME: Add support for 64 bit symbols.

[atanasyan]

We should warn/error in LLVM on mixing abicalls and long calls

Do you know why gcc does not warn in this case? Moreover gcc -mabicalls -mlong-calls generates jalr not jal instructions. Is it a bug in gcc?

lib/Target/Mips/MipsISelLowering.cpp

3024 ↗

(On Diff #105736)

Add support for 64 bit symbols

How can I force compiler to generate the jal instruction to jump to 64-bit symbol? I.e. it looks like with -mabi=64 the compiler always uses the jalr instruction.

[sdardis]

Do you know why gcc does not warn in this case?

GCC's manual says that -mlong-calls has no effect on code that uses -mabicalls. I'm assuming it's a deficiency in the MIPS backend of GCC not to identify this case and report it.

Moreover gcc -mabicalls -mlong-calls generates jalr not jal instructions. Is it a bug in gcc?

This looks like it's some optimization kicking in to store function addresses only in the GOT in the case of static code that uses abicalls and long-calls. I'll have a further look tomorrow about this.

lib/Target/Mips/MipsISelLowering.cpp

3024 ↗

(On Diff #105736)

You need to use the static relocation model and turn off abicalls (target feature +noabicalls). The N64 abi defaults to PIC as synthesizing the address of a symbol is quite expensive, so PIC is preferred for that abi.

[sdardis]

Ok, I've followed up on intermixing -mabicalls and -mlong-calls, and I
was wrong. It's the GCC manual I believe is somewhat misleading.

In the basic case of -mabicalls & -mlong-calls, they don't work together
as abicalls code is pic and long-calls is static only.

However, the MIPS non-PIC ABI specification[1] also mixing static
and pic code, cpic. In this case, when code is produced with -mno-shared,
calls to locally defined functions do not have to go through the GOT,
and are either 'jal' or a long call sequence. Calls to functions which
are not locally defined use the GOT and jalr as normal.

Until we get proper support for -mshared / -mno-shared, we should only
allow -mlong-calls with -mno-abicalls.

[1] https://gcc.gnu.org/ml/gcc/2008-07/txt00000.txt

lib/Target/Mips/MipsISelLowering.cpp

3024 ↗

(On Diff #105736)

That check should also test that abicalls are not being used.

[atanasyan]

I think a warning shown by the Clang in case of mixed long-calls and 'abicalls` options will be enough. If user gets warning from the front-end and one more warning or even an error from the backend, it might looks messy. Additional option - we can silently ignore long-calls in the backend if no +noabicalls feature flag is provided. Like we ignore long-calls in case of PIC.

[sdardis]

SGTM.

[atanasyan]

• Handle jumps to 64-bit symbols in case of long-calls option
• Ignore long-calls option if abi calls is used

Warning generation in case of mixed usage of -mlong-calls and -mabicalls options will be implemented in the Clang by a separate commit.

[sdardis]

LGTM with slight tweak and addition to test cases.

test/CodeGen/Mips/long-calls.ll

9–12 ↗

(On Diff #106534)

Add -target-abi n64 to the lines here, and add n32 runlines.

llvm/trunk/lib/Target/Mips/Mips.td

def FeatureUseTCCInDIV : SubtargetFeature<
                                "UseTCCInDIV", "false",
                                "Force the assembler to use trapping">;
 
 def FeatureMadd4 : SubtargetFeature<"nomadd4", "DisableMadd4", "true",
                                     "Disable 4-operand madd.fmt and related instructions">;
 
 def FeatureMT : SubtargetFeature<"mt", "HasMT", "true", "Mips MT ASE">;
 
+def FeatureLongCalls : SubtargetFeature<"long-calls", "UseLongCalls", "true",
+                                        "Disable use of the jal instruction">;
+
 //===----------------------------------------------------------------------===//
 // Mips processors supported.
 //===----------------------------------------------------------------------===//
 
 def ImplP5600 : SubtargetFeature<"p5600", "ProcImpl",
                                  "MipsSubtarget::CPU::P5600",
                                  "The P5600 Processor", [FeatureMips32r5]>;
 

llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp

MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
   // If the callee is a GlobalAddress/ExternalSymbol node (quite common, every
   // direct call is) turn it into a TargetGlobalAddress/TargetExternalSymbol
   // node so that legalize doesn't hack it.
 
   SDValue CalleeLo;
   EVT Ty = Callee.getValueType();
   bool GlobalOrExternal = false, IsCallReloc = false;
 
+  // The long-calls feature is ignored in case of PIC.
+  // While we do not support -mshared / -mno-shared properly,
+  // ignore long-calls in case of -mabicalls too.
+  if (Subtarget.useLongCalls() && !Subtarget.isABICalls() && !IsPIC) {
+    // Get the address of the callee into a register to prevent
+    // using of the `jal` instruction for the direct call.
+    if (auto *N = dyn_cast<GlobalAddressSDNode>(Callee))
+      Callee = Subtarget.hasSym32() ? getAddrNonPIC(N, SDLoc(N), Ty, DAG)
+                                    : getAddrNonPICSym64(N, SDLoc(N), Ty, DAG);
+    else if (auto *N = dyn_cast<ExternalSymbolSDNode>(Callee))
+      Callee = Subtarget.hasSym32() ? getAddrNonPIC(N, SDLoc(N), Ty, DAG)
+                                    : getAddrNonPICSym64(N, SDLoc(N), Ty, DAG);
+  }
+
   if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) {
     if (IsPIC) {
       const GlobalValue *Val = G->getGlobal();
       InternalLinkage = Val->hasInternalLinkage();
 
       if (InternalLinkage)
         Callee = getAddrLocal(G, DL, Ty, DAG, ABI.IsN32() || ABI.IsN64());
       else if (LargeGOT) {

llvm/trunk/lib/Target/Mips/MipsSubtarget.h

class MipsSubtarget : public MipsGenSubtargetInfo {
  
   // nomadd4 - disables generation of 4-operand madd.s, madd.d and
   // related instructions.
   bool DisableMadd4;
 
   // HasMT -- support MT ASE.
   bool HasMT;
 
+  // Disable use of the `jal` instruction.
+  bool UseLongCalls = false;
+
   InstrItineraryData InstrItins;
 
   // We can override the determination of whether we are in mips16 mode
   // as from the command line
   enum {NoOverride, Mips16Override, NoMips16Override} OverrideMode;
 
   const MipsTargetMachine &TM;
 
public:
   bool hasEVA() const { return HasEVA; }
   bool hasMT() const { return HasMT; }
   bool useSmallSection() const { return UseSmallSection; }
 
   bool hasStandardEncoding() const { return !inMips16Mode(); }
 
   bool useSoftFloat() const { return IsSoftFloat; }
 
+  bool useLongCalls() const { return UseLongCalls; }
+
   bool enableLongBranchPass() const {
     return hasStandardEncoding() || allowMixed16_32();
   }
 
   /// Features related to the presence of specific instructions.
   bool hasExtractInsert() const { return !inMips16Mode() && hasMips32r2(); }
   bool hasMTHC1() const { return hasMips32r2(); }
 

llvm/trunk/test/CodeGen/Mips/long-calls.ll

+; RUN: llc -march=mips -mattr=-long-calls %s -o - \
+; RUN:   | FileCheck -check-prefix=OFF %s
+; RUN: llc -march=mips -mattr=+long-calls,+noabicalls %s -o - \
+; RUN:   | FileCheck -check-prefix=ON32 %s
+
+; RUN: llc -march=mips -mattr=+long-calls,-noabicalls %s -o - \
+; RUN:   | FileCheck -check-prefix=OFF %s
+
+; RUN: llc -march=mips64 -target-abi n32 -mattr=-long-calls %s -o - \
+; RUN:   | FileCheck -check-prefix=OFF %s
+; RUN: llc -march=mips64 -target-abi n32 -mattr=+long-calls,+noabicalls %s -o - \
+; RUN:   | FileCheck -check-prefix=ON32 %s
+
+; RUN: llc -march=mips64 -target-abi n64 -mattr=-long-calls %s -o - \
+; RUN:   | FileCheck -check-prefix=OFF %s
+; RUN: llc -march=mips64 -target-abi n64 -mattr=+long-calls,+noabicalls %s -o - \
+; RUN:   | FileCheck -check-prefix=ON64 %s
+
+declare void @callee()
+declare void @llvm.memset.p0i8.i32(i8* nocapture writeonly, i8, i32, i32, i1)
+
+@val = internal unnamed_addr global [20 x i32] zeroinitializer, align 4
+
+define void @caller() {
+
+; Use `jal` instruction with R_MIPS_26 relocation.
+; OFF: jal callee
+; OFF: jal memset
+
+; Save the `callee` and `memset` addresses in $25 register
+; and use `jalr` for the jumps.
+; ON32: lui    $1, %hi(callee)
+; ON32: addiu  $25, $1, %lo(callee)
+; ON32: jalr   $25
+
+; ON32: addiu  $1, $zero, %lo(memset)
+; ON32: lui    $2, %hi(memset)
+; ON32: addu   $25, $2, $1
+; ON32: jalr   $25
+
+; ON64: lui     $1, %highest(callee)
+; ON64: daddiu  $1, $1, %higher(callee)
+; ON64: daddiu  $1, $1, %hi(callee)
+; ON64: daddiu  $25, $1, %lo(callee)
+; ON64: jalr    $25
+
+; ON64: daddiu  $1, $zero, %higher(memset)
+; ON64: lui     $2, %highest(memset)
+; ON64: lui     $2, %hi(memset)
+; ON64: daddiu  $2, $zero, %lo(memset)
+; ON64: daddu   $25, $1, $2
+; ON64: jalr    $25
+
+  call void @callee()
+  call void @llvm.memset.p0i8.i32(i8* bitcast ([20 x i32]* @val to i8*), i8 0, i32 80, i32 4, i1 false)
+  ret  void
+}