[mips] MIPS-IV is broadly the same as MIPS64 so duplicate all -mcpu=mips64 tests with -mcpu=mips4 as a starting point

[dsanders]

Summary

Two exceptions to this:

test/CodeGen/Mips/octeon.ll
test/CodeGen/Mips/octeon_popcnt.ll

these test extensions to MIPS64

One test is altered for MIPS-IV:

test/CodeGen/Mips/mips64countleading.ll
  Tests dclo/dclz which were added in MIPS64. The MIPS-IV version tests
  that dclo/dclz are not emitted.

Four tests fail and are not in this patch:

test/CodeGen/Mips/abicalls.ll
test/CodeGen/Mips/fcopysign-f32-f64.ll
test/CodeGen/Mips/fcopysign.ll
test/CodeGen/Mips/stack-alignment.ll

Depends on D3343

[vmedic]

LGTM

[matheusalmeida]

Just one comment.

test/CodeGen/Mips/elf_eflags.ll

26–28

FYI: This is OK for the time being because we don't emit .set arch=arch or similar assembly directive. The reason I'm commenting on this is that I expect the ELF eflags to be different between Mips4 and Mips64 because there's a bit in the ELF header that identifies the architecture. There are tests for this in test/MC/Mips like 'elf_eflags.s'.

[dsanders]

test/CodeGen/Mips/elf_eflags.ll

26–28

In terms of assembly text, there is no difference in output between MIPS-IV and MIPS64 because the ISA level is passed in via an option (the .set directives don't change the ELF header)

[matheusalmeida]

(the .set directives don't change the ELF header).

You mean the '.set arch/isa', right? '
.set mips16/micromips/...' do change the ELF header.

[dsanders]

Yes, I meant the .set directives that select between mips4 and mips64

test/CodeGen/Mips/2010-07-20-Switch.ll

 ; RUN: llc < %s -march=mips -relocation-model=static | \
 ; RUN: FileCheck %s -check-prefix=STATIC-O32 
 ; RUN: llc < %s -march=mips -relocation-model=pic | \
 ; RUN: FileCheck %s -check-prefix=PIC-O32 
+; RUN: llc < %s -march=mips64 -relocation-model=pic -mcpu=mips4 | \
+; RUN:     FileCheck %s -check-prefix=N64
+; RUN: llc < %s -march=mips64 -relocation-model=static -mcpu=mips4 | \
+; RUN:     FileCheck %s -check-prefix=N64
 ; RUN: llc < %s -march=mips64 -relocation-model=pic -mcpu=mips64 | \
-; RUN: FileCheck %s -check-prefix=N64
+; RUN:     FileCheck %s -check-prefix=N64
 ; RUN: llc < %s -march=mips64 -relocation-model=static -mcpu=mips64 | \
-; RUN: FileCheck %s -check-prefix=N64
+; RUN:     FileCheck %s -check-prefix=N64
 
 define i32 @main() nounwind readnone {
 entry:
   %x = alloca i32, align 4                        ; <i32*> [#uses=2]
   store volatile i32 2, i32* %x, align 4
   %0 = load volatile i32* %x, align 4             ; <i32> [#uses=1]
 ; STATIC-O32: sll $[[R0:[0-9]+]], ${{[0-9]+}}, 2
 ; STATIC-O32: lui $[[R1:[0-9]+]], %hi($JTI0_0)

test/CodeGen/Mips/cmov.ll

 ; RUN: llc -march=mips < %s | FileCheck %s -check-prefix=O32
 ; RUN: llc -march=mips -regalloc=basic < %s | FileCheck %s -check-prefix=O32
-; RUN: llc -march=mips64el -mcpu=mips64 -mattr=n64 < %s | FileCheck %s -check-prefix=N64
 ; RUN: llc -march=mips64el -mcpu=mips4 -mattr=n64 < %s | FileCheck %s -check-prefix=N64
+; RUN: llc -march=mips64el -mcpu=mips64 -mattr=n64 < %s | FileCheck %s -check-prefix=N64
 
 @i1 = global [3 x i32] [i32 1, i32 2, i32 3], align 4
 @i3 = common global i32* null, align 4
 
 ; O32-DAG:  lw $[[R0:[0-9]+]], %got(i3)
 ; O32-DAG:  addiu $[[R1:[0-9]+]], ${{[0-9]+}}, %got(i1)
 ; O32:      movn $[[R0]], $[[R1]], ${{[0-9]+}}
 ; N64-DAG:  ldr $[[R0:[0-9]+]]

test/CodeGen/Mips/eh-dwarf-cfa.ll

 ; RUN: llc -march=mipsel -mcpu=mips32 < %s | FileCheck %s
+; RUN: llc -march=mips64el -mcpu=mips4 < %s | \
+; RUN:      FileCheck %s -check-prefix=CHECK-MIPS64
 ; RUN: llc -march=mips64el -mcpu=mips64 < %s | \
 ; RUN:      FileCheck %s -check-prefix=CHECK-MIPS64
 
 declare i8* @llvm.eh.dwarf.cfa(i32) nounwind
 declare i8* @llvm.frameaddress(i32) nounwind readnone
 
 define i8* @f1() nounwind {
 entry:

test/CodeGen/Mips/eh-return64.ll

+; RUN: llc -march=mips64el -mcpu=mips4 < %s | FileCheck %s
 ; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck %s
 
 declare void @llvm.eh.return.i64(i64, i8*)
 declare void @foo(...)
 
 define void @f1(i64 %offset, i8* %handler) {
 entry:
   call void (...)* @foo()

test/CodeGen/Mips/elf_eflags.ll

 
 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE32 %s
 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32 %s -o - | FileCheck -check-prefix=CHECK-LE32_PIC %s
 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE32R2 %s
 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 %s -o - | FileCheck -check-prefix=CHECK-LE32R2_PIC %s
 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE32R2-MICROMIPS %s
 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips %s -o - | FileCheck -check-prefix=CHECK-LE32R2-MICROMIPS_PIC %s
 
+; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips4 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE64 %s
+; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips4 %s -o - | FileCheck -check-prefix=CHECK-LE64_PIC %s
+
 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE64 %s
 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64 %s -o - | FileCheck -check-prefix=CHECK-LE64_PIC %s
 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64r2 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE64R2 %s
 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64r2 %s -o - | FileCheck -check-prefix=CHECK-LE64R2_PIC %s
 
 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+mips16 -relocation-model=pic %s -o - | FileCheck -check-prefix=CHECK-LE32R2-MIPS16 %s
 
 ; 32(R1) bit with NO_REORDER and static

test/CodeGen/Mips/int-to-float-conversion.ll

 ; RUN: llc -march=mipsel < %s | FileCheck %s -check-prefix=32
+; RUN: llc -march=mips64el -mcpu=mips4 < %s | FileCheck %s -check-prefix=64
 ; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck %s -check-prefix=64
 
 @i1 = global [3 x i32] [i32 1, i32 2, i32 3], align 4
 @i3 = common global i32* null, align 4
 
 ; 32-LABEL: test_float_int_:
 ; 32: mtc1 ${{[0-9]+}}, $f[[R0:[0-9]+]]
 ; 32: cvt.s.w $f{{[0-9]+}}, $f[[R0]]

test/CodeGen/Mips/largeimmprinting.ll

 ; RUN: llc -march=mipsel < %s | FileCheck %s -check-prefix=32
+; RUN: llc -march=mips64el -mcpu=mips4 -mattr=n64 < %s | \
+; RUN:     FileCheck %s -check-prefix=64
 ; RUN: llc -march=mips64el -mcpu=mips64 -mattr=n64 < %s | \
-; RUN: FileCheck %s -check-prefix=64
+; RUN:     FileCheck %s -check-prefix=64
 
 %struct.S1 = type { [65536 x i8] }
 
 @s1 = external global %struct.S1
 
 define void @f() nounwind {
 entry:
 ; 32:  lui $[[R0:[0-9]+]], 65535

test/CodeGen/Mips/longbranch.ll

 ; RUN: llc -march=mipsel -force-mips-long-branch -disable-mips-delay-filler < %s | FileCheck %s -check-prefix=O32
+; RUN: llc -march=mips64el -mcpu=mips4 -mattr=n64  -force-mips-long-branch -disable-mips-delay-filler < %s | FileCheck %s -check-prefix=N64
 ; RUN: llc -march=mips64el -mcpu=mips64 -mattr=n64  -force-mips-long-branch -disable-mips-delay-filler < %s | FileCheck %s -check-prefix=N64
 
 @g0 = external global i32
 
 define void @foo1(i32 %s) nounwind {
 entry:
 ; O32: nop
 ; O32: addiu $sp, $sp, -8

test/CodeGen/Mips/mips64-f128.ll

+; RUN: llc -mtriple=mips64el-unknown-unknown -mcpu=mips4 -soft-float -O1 \
+; RUN:     -disable-mips-delay-filler < %s | FileCheck %s
 ; RUN: llc -mtriple=mips64el-unknown-unknown -mcpu=mips64 -soft-float -O1 \
-; RUN: -disable-mips-delay-filler < %s | FileCheck %s
+; RUN:     -disable-mips-delay-filler < %s | FileCheck %s
 
 @gld0 = external global fp128
 @gld1 = external global fp128
 @gld2 = external global fp128
 @gf1 = external global float
 @gd1 = external global double
 
 ; CHECK-LABEL: addLD:

test/CodeGen/Mips/mips64countleading.ll

-; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck %s
+; RUN: llc -march=mips64el -mcpu=mips4 < %s | FileCheck -check-prefix=CHECK -check-prefix=MIPS4 %s
+; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck -check-prefix=CHECK -check-prefix=MIPS64 %s
 
 define i64 @t1(i64 %X) nounwind readnone {
 entry:
-; CHECK: dclz
+; CHECK-LABEL: t1:
+; MIPS4-NOT: dclz
+; MIPS64: dclz
   %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %X, i1 true)
   ret i64 %tmp1
 }
 
 declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone
 
 define i64 @t3(i64 %X) nounwind readnone {
 entry:
-; CHECK: dclo 
+; CHECK-LABEL: t3:
+; MIPS4-NOT: dclo
+; MIPS64: dclo
   %neg = xor i64 %X, -1
   %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %neg, i1 true)
   ret i64 %tmp1
 }
 

test/CodeGen/Mips/mips64directive.ll

+; RUN: llc  < %s -march=mips64el -mcpu=mips4 -mattr=n64 | FileCheck %s
 ; RUN: llc  < %s -march=mips64el -mcpu=mips64 -mattr=n64 | FileCheck %s
 
 @gl = global i64 1250999896321, align 8
 
 ; CHECK: 8byte
 define i64 @foo1() nounwind readonly {
 entry:
   %0 = load i64* @gl, align 8
   ret i64 %0
 }
 

test/CodeGen/Mips/mips64ext.ll

-; RUN: llc  < %s -march=mips64el -mcpu=mips64 -mattr=n64 | FileCheck %s 
+; RUN: llc  < %s -march=mips64el -mcpu=mips4 -mattr=n64 | FileCheck %s
+; RUN: llc  < %s -march=mips64el -mcpu=mips64 -mattr=n64 | FileCheck %s
 
 define i64 @zext64_32(i32 %a) nounwind readnone {
 entry:
 ; CHECK: addiu $[[R0:[0-9]+]], ${{[0-9]+}}, 2
 ; CHECK: dsll $[[R1:[0-9]+]], $[[R0]], 32
 ; CHECK: dsrl ${{[0-9]+}}, $[[R1]], 32
   %add = add i32 %a, 2
   %conv = zext i32 %add to i64

test/CodeGen/Mips/mips64fpimm0.ll

+; RUN: llc  < %s -march=mips64el -mcpu=mips4 -mattr=n64 | FileCheck %s
 ; RUN: llc  < %s -march=mips64el -mcpu=mips64 -mattr=n64 | FileCheck %s
 
 define double @foo1() nounwind readnone {
 entry:
 ; CHECK: dmtc1 $zero
   ret double 0.000000e+00
 }

test/CodeGen/Mips/mips64fpldst.ll

+; RUN: llc  < %s -march=mips64el -mcpu=mips4 -mattr=-n64,n64 | FileCheck %s -check-prefix=CHECK-N64
+; RUN: llc  < %s -march=mips64el -mcpu=mips4 -mattr=-n64,n32 | FileCheck %s -check-prefix=CHECK-N32
 ; RUN: llc  < %s -march=mips64el -mcpu=mips64 -mattr=-n64,n64 | FileCheck %s -check-prefix=CHECK-N64
 ; RUN: llc  < %s -march=mips64el -mcpu=mips64 -mattr=-n64,n32 | FileCheck %s -check-prefix=CHECK-N32
 
 @f0 = common global float 0.000000e+00, align 4
 @d0 = common global double 0.000000e+00, align 8
 @f1 = common global float 0.000000e+00, align 4
 @d1 = common global double 0.000000e+00, align 8
 

test/CodeGen/Mips/mips64imm.ll

+; RUN: llc -march=mips64el -mcpu=mips4 < %s | FileCheck %s
 ; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck %s
 
 define i32 @foo1() nounwind readnone {
 entry:
 ; CHECK: foo1
 ; CHECK: lui ${{[0-9]+}}, 4660
 ; CHECK-NOT: ori
   ret i32 305397760

test/CodeGen/Mips/mips64intldst.ll

+; RUN: llc  < %s -march=mips64el -mcpu=mips4 -mattr=-n64,n64 | FileCheck %s -check-prefix=CHECK-N64
+; RUN: llc  < %s -march=mips64el -mcpu=mips4 -mattr=-n64,n32 | FileCheck %s -check-prefix=CHECK-N32
 ; RUN: llc  < %s -march=mips64el -mcpu=mips64 -mattr=-n64,n64 | FileCheck %s -check-prefix=CHECK-N64
 ; RUN: llc  < %s -march=mips64el -mcpu=mips64 -mattr=-n64,n32 | FileCheck %s -check-prefix=CHECK-N32
 
 @c = common global i8 0, align 4
 @s = common global i16 0, align 4
 @i = common global i32 0, align 4
 @l = common global i64 0, align 8
 @uc = common global i8 0, align 4

test/CodeGen/Mips/mips64lea.ll

+; RUN: llc -march=mips64el -mcpu=mips4 < %s | FileCheck %s
 ; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck %s
 
 define void @foo3() nounwind {
 entry:
 ; CHECK: daddiu ${{[0-9]+}}, $sp
   %a = alloca i32, align 4
   call void @foo1(i32* %a) nounwind
   ret void
 }
 
 declare void @foo1(i32*)
 

test/CodeGen/Mips/mips64load-store-left-right.ll

+; RUN: llc -march=mips64el -mcpu=mips4 -mattr=n64 < %s | FileCheck  -check-prefix=EL %s
+; RUN: llc -march=mips64 -mcpu=mips4 -mattr=n64 < %s | FileCheck  -check-prefix=EB %s
 ; RUN: llc -march=mips64el -mcpu=mips64 -mattr=n64 < %s | FileCheck  -check-prefix=EL %s
 ; RUN: llc -march=mips64 -mcpu=mips64 -mattr=n64 < %s | FileCheck  -check-prefix=EB %s
 
 %struct.SLL = type { i64 }
 %struct.SI = type { i32 }
 %struct.SUI = type { i32 }
 
 @sll = common global %struct.SLL zeroinitializer, align 1

test/CodeGen/Mips/optimize-fp-math.ll

 ; RUN: llc -march=mipsel < %s | FileCheck %s -check-prefix=32
+; RUN: llc -march=mips64el -mcpu=mips4 < %s | FileCheck %s -check-prefix=64
 ; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck %s -check-prefix=64
 
 ; 32-LABEL: test_sqrtf_float_:
 ; 32: sqrt.s $f[[R0:[0-9]+]], $f{{[0-9]+}}
 ; 32: c.un.s $f[[R0]], $f[[R0]]
 ; 64-LABEL: test_sqrtf_float_:
 ; 64: sqrt.s $f[[R0:[0-9]+]], $f{{[0-9]+}}
 ; 64: c.un.s $f[[R0]], $f[[R0]]

test/CodeGen/Mips/remat-immed-load.ll

 ; RUN: llc -march=mipsel < %s | FileCheck %s -check-prefix=32
+; RUN: llc -march=mips64el -mcpu=mips4 -mattr=n64 < %s | FileCheck %s -check-prefix=64
 ; RUN: llc -march=mips64el -mcpu=mips64 -mattr=n64 < %s | FileCheck %s -check-prefix=64
 
 define void @f0() nounwind {
 entry:
 ; 32:  addiu $4, $zero, 1
 ; 32:  addiu $4, $zero, 1
 
   tail call void @foo1(i32 1) nounwind

test/CodeGen/Mips/sint-fp-store_pattern.ll

 ; RUN: llc -march=mipsel < %s | FileCheck %s -check-prefix=32
+; RUN: llc -march=mips64el -mcpu=mips4 < %s | FileCheck %s -check-prefix=64
 ; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck %s -check-prefix=64
 
 @gint_ = external global i32
 @gLL_ = external global i64
 
 ; 32-LABEL: store_int_float_:
 ; 32: trunc.w.s $f[[R0:[0-9]+]], $f{{[0-9]+}}
 ; 32: swc1 $f[[R0]],