[x86][inline-asm][clang]Amend size directive deduction mechanism of unsized memory operands

[coby]

Summary

This is an extension of the work being carried by the following change:
https://reviews.llvm.org/D26586
This commit handles cases where the size qualifier of an indirect memory reference operand in Intel syntax is missing (e.g. "vaddps xmm1, xmm2, [a]").
GCC will deduce the size qualifier based on the possible matches:
"vaddps xmm1, xmm2, [a]" matches only “XMMWORD PTR” qualifier.
"vaddps xmm1, xmm2, [a]{1to4}" matches only “DWORD PTR” qualifier.
"mov rax, [a]" matches only "QWORD PTR"

Currently, size directive will be deduced based on the size of the memory operand (apart from those cases which were handled by D26586).
For example:
"vaddps xmm1, xmm2, [a]"
"char a;" will imply "BYTE PTR" qualifier
"short a;" will imply "WORD PTR" qualifier.

This commit aligns LLVM to GCC’s behavior.

This is the Clang part of the review.
The LLVM part can be found here:
https://reviews.llvm.org/D32636

[coby]

superseded by rL302179

test/CodeGen/ms-inline-asm-memory-adjustments.c

+// RUN: %clang_cc1 %s -triple x86_64-unknown-linux-gnu -emit-llvm -target-cpu skylake-avx512 -fasm-blocks -o - | FileCheck %s
+
+void t() {
+  char c;
+  // CHECK: vaddps xmm1, xmm2, dword ptr $1{1to4}
+  __asm vaddps xmm1, xmm2, [c]{1to4}
+  // CHECK: vaddps xmm1, xmm2, xmmword ptr $2
+  __asm vaddps xmm1, xmm2, [c]
+  // CHECK: mov eax, dword ptr $3
+  __asm mov eax, [c]
+  // CHECK: mov qword ptr $0, rax
+  __asm mov [c], rax
+}
+