Fix PR32288

[aprantl]

Summary

http://bugs.llvm.org/show_bug.cgi?id=32288

The DWARF generated by LLVM includes this location:

0x55 0x93 0x04
DW_OP_reg5 DW_OP_piece(4)

When GCC's DWARF is simply 0x55 (DW_OP_reg5) without the DW_OP_piece. I believe it's reasonable to assume the DWARF consumer knows which part of a register logically holds the value (low bytes, high bytes, how many bytes, etc) for a primitive value like an integer.

[aprantl]

To review my own patch; I think we now have a coverage gap, since there is no testcase that tests a variable that is in a subregister at a nonzero offset.

[aprantl]

... up until the point where I discover that I already created such a testcase a couple of months ago (llvm/test/DebugInfo/MIR/X86/bit-piece-dh.mir).

[dblaikie]

Looks OK :)

lib/CodeGen/AsmPrinter/DwarfExpression.cpp

290–291

Is this ever true? What does that mean? (I guess it means there's no sub register at work? But that'd be handled by the below case too, right?)

Is this to improve legibility, then?

test/DebugInfo/X86/PR26148.ll

22

That's a bit confusing/interesting. (wonder what the rest of that location description now contains)

test/DebugInfo/X86/dw_op_minus_direct.ll

11–12

This one's interesting - because the register's not at the top level.

I would've expected the piece(4) would go against rax first, before the "- 1" & /could/ be relevant (a consumer might not know whether a register used in a complex location expression is the size of the destination value or not, etc)? But I guess it's probably OK?

[aprantl]

lib/CodeGen/AsmPrinter/DwarfExpression.cpp

290–291

Yes, that's the default for when nobody called setSubRegisterPiece() or reset it.

test/DebugInfo/X86/PR26148.ll

22

There's another 32-bit variable above it that now has a shorter expression.

test/DebugInfo/X86/dw_op_minus_direct.ll

11–12

That's an interesting edge-case, because the minus could underflow the upper part of rax and thus pollute the eax with garbage. We'd need to mask it out before the DW_OP_minus if we want this to be perfect.

[aprantl]

Landed together with a fix for dw_op_minus_direct.ll.

[aprantl]

r297965

lib/CodeGen/AsmPrinter/DwarfExpression.cpp

case dwarf::DW_OP_xderef:
       break;
     default:
       llvm_unreachable("unhandled opcode found in expression");
     }
   }
 }
 
 void DwarfExpression::finalize() {
-  if (SubRegisterSizeInBits)
-    AddOpPiece(SubRegisterSizeInBits, SubRegisterOffsetInBits);
+  // Emit any outstanding DW_OP_piece operations to mask out subregisters.
+  if (SubRegisterSizeInBits == 0)
+    return;
+  // Don't emit a DW_OP_piece for a subregister at offset 0.
+  if (SubRegisterOffsetInBits == 0)
+    return;
 }
 
 void DwarfExpression::addFragmentOffset(const DIExpression *Expr) {
   if (!Expr || !Expr->isFragment())
     return;
 
   uint64_t FragmentOffset = Expr->getFragmentInfo()->OffsetInBits;
   assert(FragmentOffset >= OffsetInBits &&
          "overlapping or duplicate fragments");
   if (FragmentOffset > OffsetInBits)
     AddOpPiece(FragmentOffset - OffsetInBits);
   OffsetInBits = FragmentOffset;
 }

test/DebugInfo/ARM/s-super-register.ll

 ; RUN: llc < %s - -filetype=obj | llvm-dwarfdump -debug-dump=loc - | FileCheck %s
 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32"
 target triple = "thumbv7-apple-macosx10.6.7"
 
 ; The S registers on ARM are expressed as pieces of their super-registers in DWARF.
 ;
 ; 0x90   DW_OP_regx of super-register
-; 0x93   DW_OP_piece
-; 0x9d   DW_OP_bit_piece
-; CHECK:            Location description: 90 {{.. .. ((93 ..)|(9d .. ..)) $}}
+; CHECK:            Location description: 90
 
 define void @_Z3foov() optsize ssp !dbg !1 {
 entry:
   %call = tail call float @_Z3barv() optsize, !dbg !11
   tail call void @llvm.dbg.value(metadata float %call, i64 0, metadata !5, metadata !DIExpression()), !dbg !11
   %call16 = tail call float @_Z2f2v() optsize, !dbg !12
   %cmp7 = fcmp olt float %call, %call16, !dbg !12
   br i1 %cmp7, label %for.body, label %for.end, !dbg !12

test/DebugInfo/X86/PR26148.ll

 ; int main() { return 0; }
 ;
 ; This is similar to the bug in test/DebugInfo/ARM/PR26163.ll, except that there is an
 ; extra non-overlapping range first. Thus, we make sure that the backend actually looks
 ; at all expressions when determining whether to merge ranges, not just the first one.
 ; AS in 26163, we expect two ranges (as opposed to one), the first one being zero sized
 ;
 ;
-; CHECK: 0x00000025: Beginning address offset: 0x0000000000000004
+; CHECK:             Beginning address offset: 0x0000000000000004
 ; CHECK:                Ending address offset: 0x0000000000000004
 ; CHECK:                 Location description: 10 03 93 04 55 93 02
 ; constu 0x00000003, piece 0x00000004, rdi, piece 0x00000002
 ; CHECK:             Beginning address offset: 0x0000000000000004
 ; CHECK:                Ending address offset: 0x0000000000000014
 ; CHECK:                 Location description: 10 03 93 04 10 00
 ; constu 0x00000003, piece 0x00000004, constu 0x00000000, piece 0x00000004
 

test/DebugInfo/X86/dbg-value-const-byref.ll

 ;        consts 0x00000003
 ; CHECK: Beginning address offset: 0x0000000000000{{.*}}
 ; CHECK:    Ending address offset: [[C1:.*]]
 ; CHECK:     Location description: 11 03
 ;        consts 0x00000007
 ; CHECK: Beginning address offset: [[C1]]
 ; CHECK:    Ending address offset: [[C2:.*]]
 ; CHECK:     Location description: 11 07
-;        rax, piece 0x00000004
+;        rax
 ; CHECK: Beginning address offset: [[C2]]
 ; CHECK:    Ending address offset: [[R1:.*]]
-; CHECK:     Location description: 50 93 04
+; CHECK:     Location description: 50
 ;         rdi+0
 ; CHECK: Beginning address offset: [[R1]]
 ; CHECK:    Ending address offset: [[R2:.*]]
 ; CHECK:     Location description: 77 04
 ;         rsp+4
 ;
 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-apple-macosx10.9.0"

test/DebugInfo/X86/dbg-value-regmask-clobber.ll

 ; ASM-NEXT: [[argc_range_end:.Ltmp[0-9]+]]:
 ; Previously LiveDebugValues would claim argc was still in ECX after the call.
 ; ASM-NOT: #DEBUG_VALUE: main:argc
 
 ; argc is the first debug location.
 ; ASM: .Ldebug_loc1:
 ; ASM-NEXT: .quad   .Lfunc_begin0-.Lfunc_begin0
 ; ASM-NEXT: .quad   [[argc_range_end]]-.Lfunc_begin0
-; ASM-NEXT: .short  3                       # Loc expr size
+; ASM-NEXT: .short  1                       # Loc expr size
 ; ASM-NEXT: .byte   82                      # super-register DW_OP_reg2
-; ASM-NEXT: .byte   147                     # DW_OP_piece
-; ASM-NEXT: .byte   4                       # 4
 
 ; argc is the first formal parameter.
 ; DWARF: .debug_info contents:
 ; DWARF:  DW_TAG_formal_parameter
 ; DWARF-NEXT:    DW_AT_location [DW_FORM_sec_offset]   ([[argc_loc_offset:0x.*]])
 ; DWARF-NEXT:    DW_AT_name [DW_FORM_strp]     {{.*}} "argc"
 
 ; DWARF: .debug_loc contents:
 ; DWARF: [[argc_loc_offset]]: Beginning address offset: 0x0000000000000000
 ; DWARF-NEXT:                    Ending address offset: 0x0000000000000013
-; DWARF-NEXT:                     Location description: 52 93 04
+; DWARF-NEXT:                     Location description: 52
 
 ; ModuleID = 't.cpp'
 source_filename = "test/DebugInfo/X86/dbg-value-regmask-clobber.ll"
 target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-pc-windows-msvc18.0.0"
 
 @x = common global i32 0, align 4, !dbg !0
 

test/DebugInfo/X86/dw_op_minus_direct.ll

 ; Test dwarf codegen of DW_OP_minus.
 ; RUN: llc -filetype=obj < %s | llvm-dwarfdump - | FileCheck %s
 
 ; This was derived manually from:
 ; int inc(int i) {
 ;  return i+1;
 ; }
 
 ; CHECK: Beginning address offset: 0x0000000000000000
 ; CHECK:    Ending address offset: 0x0000000000000004
-; CHECK:     Location description: 50 10 01 1c 93 04
-;                                  rax, constu 0x00000001, minus, piece 0x00000004
+; CHECK:     Location description: 50 10 01 1c
+;                                  rax, constu 0x00000001, minus
 source_filename = "minus.c"
 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-apple-macosx10.12.0"
 
 define i32 @inc(i32 %i) local_unnamed_addr #1 !dbg !7 {
 entry:
   %add = add nsw i32 %i, 1, !dbg !15
   tail call void @llvm.dbg.value(metadata i32 %add, i64 0, metadata !12, metadata !13), !dbg !14

test/DebugInfo/X86/fission-ranges.ll

 ; if they've changed due to a bugfix, change in register allocation, etc.
 
 ; CHECK: [[A]]: Beginning address index: 2
 ; CHECK-NEXT:                    Length: 169
 ; CHECK-NEXT:      Location description: 11 00
 ; CHECK-NEXT: {{^$}}
 ; CHECK-NEXT:   Beginning address index: 3
 ; CHECK-NEXT:                    Length: 25
-; CHECK-NEXT:      Location description: 50 93 04
+; CHECK-NEXT:      Location description: 50
 ; CHECK: [[E]]: Beginning address index: 4
 ; CHECK-NEXT:                    Length: 19
-; CHECK-NEXT:      Location description: 50 93 04
+; CHECK-NEXT:      Location description: 50
 ; CHECK: [[B]]: Beginning address index: 5
 ; CHECK-NEXT:                    Length: 17
-; CHECK-NEXT:      Location description: 50 93 04
+; CHECK-NEXT:      Location description: 50
 ; CHECK: [[D]]: Beginning address index: 6
 ; CHECK-NEXT:                    Length: 17
-; CHECK-NEXT:      Location description: 50 93 04
+; CHECK-NEXT:      Location description: 50
 
 ; Make sure we don't produce any relocations in any .dwo section (though in particular, debug_info.dwo)
 ; HDR-NOT: .rela.{{.*}}.dwo
 
 ; Make sure we have enough stuff in the debug_addr to cover the address indexes
 ; (6 is the last index in debug_loc.dwo, making 7 entries of 8 bytes each, 7 * 8
 ; == 56 base 10 == 38 base 16)
 

test/DebugInfo/X86/single-dbg_value.ll

 ; RUN: %llc_dwarf -stop-after=livedebugvalues -o - %s \
 ; RUN:   | FileCheck %s --check-prefix=SANITY
 ; RUN: %llc_dwarf -march=x86-64 -o - %s -filetype=obj \
 ; RUN:   | llvm-dwarfdump -debug-dump=all - | FileCheck %s
 ;
 ; CHECK: .debug_info contents:
 ; CHECK: DW_TAG_variable
 ; CHECK-NEXT:   DW_AT_location [DW_FORM_data4]
 ; CHECK-NEXT:   DW_AT_name{{.*}}"a"
 ; CHECK: .debug_loc contents:
-;                               rax, piece 0x00000004
-; CHECK:  Location description: 50 93 04
+;                               rax
+; CHECK:  Location description: 50
 ; SANITY: DBG_VALUE
 ; SANITY-NOT: DBG_VALUE
 ; ModuleID = 'test.ll'
 ; Compiled with -O:
 ;   void h(int);
 ;   int g();
 ;   void f() {
 ;     h(0);

test/DebugInfo/X86/subreg.ll

 ; RUN: llc %s -mtriple=x86_64-pc-linux-gnu -O0 -o - | FileCheck %s
 
 ; We are testing that a value in a 16 bit register gets reported as
 ; being in its superregister.
 
 ; CHECK: .byte   80                      # super-register DW_OP_reg0
-; CHECK-NEXT: .byte   147                # DW_OP_piece
-; CHECK-NEXT: .byte   2                  # 2
+; No need to a piece at offset 0.
+; CHECK-NOT: DW_OP_piece
+; CHECK-NOT: DW_OP_bit_piece
 
 define i16 @f(i16 signext %zzz) nounwind !dbg !1 {
 entry:
   call void @llvm.dbg.value(metadata i16 %zzz, i64 0, metadata !0, metadata !DIExpression()), !dbg !DILocation(scope: !1)
   %conv = sext i16 %zzz to i32, !dbg !7
   %conv1 = trunc i32 %conv to i16
   ret i16 %conv1
 }

test/DebugInfo/X86/subregisters.ll

 ; RUN: llc -mtriple=x86_64-apple-darwin %s -o %t.o -filetype=obj -O0
 ; RUN: llvm-dwarfdump %t.o | FileCheck %s
 ;
 ; Test that on x86_64, the 32-bit subregister esi is emitted as
-; DW_OP_piece 32 of the 64-bit rsi.
+; subregister of the 64-bit rsi.
 ;
 ; rdar://problem/16015314
 ;
 ; CHECK:  .debug_info contents:
 ; CHECK:  DW_TAG_variable
 ; CHECK-NEXT:  DW_AT_location [DW_FORM_data4] (0x00000000)
 ; CHECK-NEXT:  DW_AT_name [DW_FORM_strp]{{.*}} "a"
 ; CHECK: .debug_loc contents:
-;                                    rsi, piece 0x00000004
-; CHECK:       Location description: 54 93 04 
+;                                    rsi
+; CHECK:       Location description: 54
 ;
 ; struct bar {
 ;   int a;
 ;   int b;
 ; };
 ;
 ; void doSomething() __attribute__ ((noinline));
 ;