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Differential D29887

[mips] divide macro instruction cleanup.
ClosedPublic

Authored by sdardis on Feb 13 2017, 3:24 AM.

Details

Reviewers
slthakur
Commits
rG509da1a46da0: [mips] divide macro instruction cleanup.
rL294960: [mips] divide macro instruction cleanup.
Summary

Clean up the implementation of divide macro expansion by getting rid of a
FIXME regarding magic numbers and branch instructions. Match GAS' behaviour
for expansion of ddiv / div in the two and three operand cases. Add the two
operand alias for MIPSR6. Finally, optimize macro expansion cases where the
divisior is the $zero register.

Diff Detail

Repository
rL LLVM

Event Timeline

sdardis created this revision.Feb 13 2017, 3:24 AM
slthakur accepted this revision.Feb 13 2017, 7:13 AM

LGTM with minor nits.

lib/Target/Mips/AsmParser/MipsAsmParser.cpp
3416 ↗(On Diff #88176)

Should this be like -> "Notably we don't have to emit a warning when encountering $rt as the $zero register"?

3419 ↗(On Diff #88176)

Could you please rephrase this statement so that it is clear to understand?

This revision is now accepted and ready to land.Feb 13 2017, 7:13 AM
Closed by commit rL294960: [mips] divide macro instruction cleanup. (authored by sdardis). · Explain WhyFeb 13 2017, 8:18 AM
This revision was automatically updated to reflect the committed changes.
sdardis marked 2 inline comments as done.

Revision Contents

PathSize
llvm/
trunk/
lib/
Target/
Mips/
AsmParser/
163 lines
6 lines
45 lines
50 lines
39 lines
test/
MC/
Mips/
95 lines
48 lines
2 lines
69 lines
2 lines
27 lines

Diff 88204

llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp

Show First 20 Lines • Show All 962 Lines • ▼ Show 20 Linespublic:
void addRegOperands(MCInst &Inst, unsigned N) const { void addRegOperands(MCInst &Inst, unsigned N) const {
llvm_unreachable("Use a custom parser instead"); llvm_unreachable("Use a custom parser instead");
} }
/// Render the operand to an MCInst as a GPR32 /// Render the operand to an MCInst as a GPR32
/// Asserts if the wrong number of operands are requested, or the operand /// Asserts if the wrong number of operands are requested, or the operand
/// is not a k_RegisterIndex compatible with RegKind_GPR /// is not a k_RegisterIndex compatible with RegKind_GPR
void addGPR32ZeroAsmRegOperands(MCInst &Inst, unsigned N) const {
assert(N == 1 && "Invalid number of operands!");
Inst.addOperand(MCOperand::createReg(getGPR32Reg()));
}
void addGPR32NonZeroAsmRegOperands(MCInst &Inst, unsigned N) const {
assert(N == 1 && "Invalid number of operands!");
Inst.addOperand(MCOperand::createReg(getGPR32Reg()));
}
void addGPR32AsmRegOperands(MCInst &Inst, unsigned N) const { void addGPR32AsmRegOperands(MCInst &Inst, unsigned N) const {
assert(N == 1 && "Invalid number of operands!"); assert(N == 1 && "Invalid number of operands!");
Inst.addOperand(MCOperand::createReg(getGPR32Reg())); Inst.addOperand(MCOperand::createReg(getGPR32Reg()));
} }
void addGPRMM16AsmRegOperands(MCInst &Inst, unsigned N) const { void addGPRMM16AsmRegOperands(MCInst &Inst, unsigned N) const {
assert(N == 1 && "Invalid number of operands!"); assert(N == 1 && "Invalid number of operands!");
Inst.addOperand(MCOperand::createReg(getGPRMM16Reg())); Inst.addOperand(MCOperand::createReg(getGPRMM16Reg()));
▲ Show 20 Lines • Show All 540 Lines • ▼ Show 20 Lines static std::unique_ptr<MipsOperand> CreateRegPair(const MipsOperand &MOP,
Op->RegIdx.Index = MOP.RegIdx.Index; Op->RegIdx.Index = MOP.RegIdx.Index;
Op->RegIdx.RegInfo = MOP.RegIdx.RegInfo; Op->RegIdx.RegInfo = MOP.RegIdx.RegInfo;
Op->RegIdx.Kind = MOP.RegIdx.Kind; Op->RegIdx.Kind = MOP.RegIdx.Kind;
Op->StartLoc = S; Op->StartLoc = S;
Op->EndLoc = E; Op->EndLoc = E;
return Op; return Op;
} }
bool isGPRZeroAsmReg() const {
return isRegIdx() && RegIdx.Kind & RegKind_GPR && RegIdx.Index == 0;
}
bool isGPRNonZeroAsmReg() const {
return isRegIdx() && RegIdx.Kind & RegKind_GPR && RegIdx.Index > 0 &&
RegIdx.Index <= 31;
}
bool isGPRAsmReg() const { bool isGPRAsmReg() const {
return isRegIdx() && RegIdx.Kind & RegKind_GPR && RegIdx.Index <= 31; return isRegIdx() && RegIdx.Kind & RegKind_GPR && RegIdx.Index <= 31;
} }
bool isMM16AsmReg() const { bool isMM16AsmReg() const {
if (!(isRegIdx() && RegIdx.Kind)) if (!(isRegIdx() && RegIdx.Kind))
return false; return false;
return ((RegIdx.Index >= 2 && RegIdx.Index <= 7) return ((RegIdx.Index >= 2 && RegIdx.Index <= 7)
▲ Show 20 Lines • Show All 343 Lines • ▼ Show 20 Lines switch (Opcode) {
return Error(IDLoc, "expected immediate operand kind"); return Error(IDLoc, "expected immediate operand kind");
Imm = Opnd.getImm(); Imm = Opnd.getImm();
if (!isInt<10>(Imm)) if (!isInt<10>(Imm))
return Error(IDLoc, "immediate operand value out of range"); return Error(IDLoc, "immediate operand value out of range");
break; break;
} }
} }
// Warn on division by zero. We're checking here as all instructions get
// processed here, not just the macros that need expansion.
//
// The MIPS backend models most of the divison instructions and macros as
// three operand instructions. The pre-R6 divide instructions however have
// two operands and explicitly define HI/LO as part of the instruction,
// not in the operands.
unsigned FirstOp = 1;
unsigned SecondOp = 2;
switch (Inst.getOpcode()) {
default:
break;
case Mips::SDivIMacro:
case Mips::UDivIMacro:
case Mips::DSDivIMacro:
case Mips::DUDivIMacro:
if (Inst.getOperand(2).getImm() == 0) {
if (Inst.getOperand(1).getReg() == Mips::ZERO ||
Inst.getOperand(1).getReg() == Mips::ZERO_64)
Warning(IDLoc, "dividing zero by zero");
else
Warning(IDLoc, "division by zero");
}
break;
case Mips::DSDIV:
case Mips::SDIV:
case Mips::UDIV:
case Mips::DUDIV:
case Mips::UDIV_MM:
case Mips::SDIV_MM:
FirstOp = 0;
SecondOp = 1;
case Mips::SDivMacro:
case Mips::DSDivMacro:
case Mips::UDivMacro:
case Mips::DUDivMacro:
case Mips::DIV:
case Mips::DIVU:
case Mips::DDIV:
case Mips::DDIVU:
case Mips::DIVU_MMR6:
case Mips::DDIVU_MM64R6:
case Mips::DIV_MMR6:
case Mips::DDIV_MM64R6:
if (Inst.getOperand(SecondOp).getReg() == Mips::ZERO ||
Inst.getOperand(SecondOp).getReg() == Mips::ZERO_64) {
if (Inst.getOperand(FirstOp).getReg() == Mips::ZERO ||
Inst.getOperand(FirstOp).getReg() == Mips::ZERO_64)
Warning(IDLoc, "dividing zero by zero");
else
Warning(IDLoc, "division by zero");
}
break;
}
// For PIC code convert unconditional jump to unconditional branch. // For PIC code convert unconditional jump to unconditional branch.
if ((Inst.getOpcode() == Mips::J || Inst.getOpcode() == Mips::J_MM) && if ((Inst.getOpcode() == Mips::J || Inst.getOpcode() == Mips::J_MM) &&
inPicMode()) { inPicMode()) {
MCInst BInst; MCInst BInst;
BInst.setOpcode(inMicroMipsMode() ? Mips::BEQ_MM : Mips::BEQ); BInst.setOpcode(inMicroMipsMode() ? Mips::BEQ_MM : Mips::BEQ);
BInst.addOperand(MCOperand::createReg(Mips::ZERO)); BInst.addOperand(MCOperand::createReg(Mips::ZERO));
BInst.addOperand(MCOperand::createReg(Mips::ZERO)); BInst.addOperand(MCOperand::createReg(Mips::ZERO));
BInst.addOperand(Inst.getOperand(0)); BInst.addOperand(Inst.getOperand(0));
▲ Show 20 Lines • Show All 1,461 Lines • ▼ Show 20 Linesbool MipsAsmParser::expandCondBranches(MCInst &Inst, SMLoc IDLoc,
TOut.emitRRX(IsLikely ? (AcceptsEquality ? Mips::BEQL : Mips::BNEL) TOut.emitRRX(IsLikely ? (AcceptsEquality ? Mips::BEQL : Mips::BNEL)
: (AcceptsEquality ? Mips::BEQ : Mips::BNE), : (AcceptsEquality ? Mips::BEQ : Mips::BNE),
ATRegNum, Mips::ZERO, MCOperand::createExpr(OffsetExpr), IDLoc, ATRegNum, Mips::ZERO, MCOperand::createExpr(OffsetExpr), IDLoc,
STI); STI);
return false; return false;
} }
// Expand a integer division macro.
//
// Notably we don't have to emit a warning when encountering $rt as the $zero
// register, or 0 as an immediate. processInstruction() has already done that.
//
// The destination register can only be $zero when expanding (S)DivIMacro or
// D(S)DivMacro.
bool MipsAsmParser::expandDiv(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, bool MipsAsmParser::expandDiv(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
const MCSubtargetInfo *STI, const bool IsMips64, const MCSubtargetInfo *STI, const bool IsMips64,
const bool Signed) { const bool Signed) {
MipsTargetStreamer &TOut = getTargetStreamer(); MipsTargetStreamer &TOut = getTargetStreamer();
warnIfNoMacro(IDLoc); warnIfNoMacro(IDLoc);
const MCOperand &RdRegOp = Inst.getOperand(0); const MCOperand &RdRegOp = Inst.getOperand(0);
Show All 32 Linesbool MipsAsmParser::expandDiv(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
bool UseTraps = useTraps(); bool UseTraps = useTraps();
if (RtOp.isImm()) { if (RtOp.isImm()) {
unsigned ATReg = getATReg(IDLoc); unsigned ATReg = getATReg(IDLoc);
if (!ATReg) if (!ATReg)
return true; return true;
if (ImmValue == 0) { if (ImmValue == 0) {
if (RsReg == Mips::ZERO || RsReg == Mips::ZERO_64)
Warning(IDLoc, "dividing zero by zero");
else
Warning(IDLoc, "division by zero");
if (UseTraps) if (UseTraps)
TOut.emitRRI(Mips::TEQ, ZeroReg, ZeroReg, 0x7, IDLoc, STI); TOut.emitRRI(Mips::TEQ, ZeroReg, ZeroReg, 0x7, IDLoc, STI);
else else
TOut.emitII(Mips::BREAK, 0x7, 0, IDLoc, STI); TOut.emitII(Mips::BREAK, 0x7, 0, IDLoc, STI);
return false; return false;
} }
if (ImmValue == 1) { if (ImmValue == 1) {
TOut.emitRRR(Mips::ADDu, RdReg, RsReg, Mips::ZERO, IDLoc, STI); TOut.emitRRR(Mips::OR, RdReg, RsReg, Mips::ZERO, IDLoc, STI);
return false; return false;
} else if (Signed && ImmValue == -1) { } else if (Signed && ImmValue == -1) {
TOut.emitRRR(SubOp, RdReg, Mips::ZERO, RsReg, IDLoc, STI); TOut.emitRRR(SubOp, RdReg, ZeroReg, RsReg, IDLoc, STI);
return false; return false;
} else { } else {
if (loadImmediate(ImmValue, ATReg, Mips::NoRegister, isInt<32>(ImmValue), if (loadImmediate(ImmValue, ATReg, Mips::NoRegister, isInt<32>(ImmValue),
false, Inst.getLoc(), Out, STI)) false, Inst.getLoc(), Out, STI))
return true; return true;
TOut.emitRR(DivOp, RsReg, ATReg, IDLoc, STI); TOut.emitRR(DivOp, RsReg, ATReg, IDLoc, STI);
TOut.emitR(Mips::MFLO, RdReg, IDLoc, STI); TOut.emitR(Mips::MFLO, RdReg, IDLoc, STI);
return false; return false;
} }
return true; return true;
} }
if (RsReg == Mips::ZERO || RsReg == Mips::ZERO_64) { // If the macro expansion of (d)div(u) would always trap or break, insert
if (RtReg == Mips::ZERO || RtReg == Mips::ZERO_64) // the trap/break and exit. This gives a different result to GAS. GAS has
Warning(IDLoc, "dividing zero by zero"); // an inconsistency/missed optimization in that not all cases are handled
if (IsMips64) { // equivalently. As the observed behaviour is the same, we're ok.
if (Signed && (RtReg == Mips::ZERO || RtReg == Mips::ZERO_64)) {
if (UseTraps) {
TOut.emitRRI(Mips::TEQ, RtReg, ZeroReg, 0x7, IDLoc, STI);
return false;
}
TOut.emitII(Mips::BREAK, 0x7, 0, IDLoc, STI);
return false;
}
} else {
TOut.emitRR(DivOp, RsReg, RtReg, IDLoc, STI);
return false;
}
}
if (RtReg == Mips::ZERO || RtReg == Mips::ZERO_64) { if (RtReg == Mips::ZERO || RtReg == Mips::ZERO_64) {
Warning(IDLoc, "division by zero");
if (Signed) {
if (UseTraps) { if (UseTraps) {
TOut.emitRRI(Mips::TEQ, RtReg, ZeroReg, 0x7, IDLoc, STI); TOut.emitRRI(Mips::TEQ, ZeroReg, ZeroReg, 0x7, IDLoc, STI);
return false; return false;
} }
TOut.emitII(Mips::BREAK, 0x7, 0, IDLoc, STI); TOut.emitII(Mips::BREAK, 0x7, 0, IDLoc, STI);
return false; return false;
} }
}
// FIXME: The values for these two BranchTarget variables may be different in // Temporary label for first branch traget
// micromips. These magic numbers need to be removed. MCContext &Context = TOut.getStreamer().getContext();
unsigned BranchTargetNoTraps; MCSymbol *BrTarget;
unsigned BranchTarget; MCOperand LabelOp;
if (UseTraps) { if (UseTraps) {
BranchTarget = IsMips64 ? 12 : 8;
TOut.emitRRI(Mips::TEQ, RtReg, ZeroReg, 0x7, IDLoc, STI); TOut.emitRRI(Mips::TEQ, RtReg, ZeroReg, 0x7, IDLoc, STI);
} else { } else {
BranchTarget = IsMips64 ? 20 : 16;
BranchTargetNoTraps = 8;
// Branch to the li instruction. // Branch to the li instruction.
TOut.emitRRI(Mips::BNE, RtReg, ZeroReg, BranchTargetNoTraps, IDLoc, STI); BrTarget = Context.createTempSymbol();
LabelOp = MCOperand::createExpr(MCSymbolRefExpr::create(BrTarget, Context));
TOut.emitRRX(Mips::BNE, RtReg, ZeroReg, LabelOp, IDLoc, STI);
} }
TOut.emitRR(DivOp, RsReg, RtReg, IDLoc, STI); TOut.emitRR(DivOp, RsReg, RtReg, IDLoc, STI);
if (!UseTraps) if (!UseTraps)
TOut.emitII(Mips::BREAK, 0x7, 0, IDLoc, STI); TOut.emitII(Mips::BREAK, 0x7, 0, IDLoc, STI);
if (!Signed) { if (!Signed) {
if (!UseTraps)
TOut.getStreamer().EmitLabel(BrTarget);
TOut.emitR(Mips::MFLO, RdReg, IDLoc, STI); TOut.emitR(Mips::MFLO, RdReg, IDLoc, STI);
return false; return false;
} }
unsigned ATReg = getATReg(IDLoc); unsigned ATReg = getATReg(IDLoc);
if (!ATReg) if (!ATReg)
return true; return true;
if (!UseTraps)
TOut.getStreamer().EmitLabel(BrTarget);
TOut.emitRRI(Mips::ADDiu, ATReg, ZeroReg, -1, IDLoc, STI); TOut.emitRRI(Mips::ADDiu, ATReg, ZeroReg, -1, IDLoc, STI);
if (IsMips64) {
// Temporary label for the second branch target.
MCSymbol *BrTargetEnd = Context.createTempSymbol();
MCOperand LabelOpEnd =
MCOperand::createExpr(MCSymbolRefExpr::create(BrTargetEnd, Context));
// Branch to the mflo instruction. // Branch to the mflo instruction.
TOut.emitRRI(Mips::BNE, RtReg, ATReg, BranchTarget, IDLoc, STI); TOut.emitRRX(Mips::BNE, RtReg, ATReg, LabelOpEnd, IDLoc, STI);
if (IsMips64) {
TOut.emitRRI(Mips::ADDiu, ATReg, ZeroReg, 1, IDLoc, STI); TOut.emitRRI(Mips::ADDiu, ATReg, ZeroReg, 1, IDLoc, STI);
TOut.emitRRI(Mips::DSLL32, ATReg, ATReg, 0x1f, IDLoc, STI); TOut.emitRRI(Mips::DSLL32, ATReg, ATReg, 0x1f, IDLoc, STI);
} else { } else {
// Branch to the mflo instruction.
TOut.emitRRI(Mips::BNE, RtReg, ATReg, BranchTarget, IDLoc, STI);
TOut.emitRI(Mips::LUi, ATReg, (uint16_t)0x8000, IDLoc, STI); TOut.emitRI(Mips::LUi, ATReg, (uint16_t)0x8000, IDLoc, STI);
} }
if (UseTraps) if (UseTraps)
TOut.emitRRI(Mips::TEQ, RsReg, ATReg, 0x6, IDLoc, STI); TOut.emitRRI(Mips::TEQ, RsReg, ATReg, 0x6, IDLoc, STI);
else { else {
// Branch to the mflo instruction. // Branch to the mflo instruction.
TOut.emitRRI(Mips::BNE, RsReg, ATReg, BranchTargetNoTraps, IDLoc, STI); TOut.emitRRX(Mips::BNE, RsReg, ATReg, LabelOpEnd, IDLoc, STI);
TOut.emitRRI(Mips::SLL, ZeroReg, ZeroReg, 0, IDLoc, STI); TOut.emitRRI(Mips::SLL, ZeroReg, ZeroReg, 0, IDLoc, STI);
TOut.emitII(Mips::BREAK, 0x6, 0, IDLoc, STI); TOut.emitII(Mips::BREAK, 0x6, 0, IDLoc, STI);
} }
TOut.getStreamer().EmitLabel(BrTargetEnd);
TOut.emitR(Mips::MFLO, RdReg, IDLoc, STI); TOut.emitR(Mips::MFLO, RdReg, IDLoc, STI);
return false; return false;
} }
bool MipsAsmParser::expandTrunc(MCInst &Inst, bool IsDouble, bool Is64FPU, bool MipsAsmParser::expandTrunc(MCInst &Inst, bool IsDouble, bool Is64FPU,
SMLoc IDLoc, MCStreamer &Out, SMLoc IDLoc, MCStreamer &Out,
const MCSubtargetInfo *STI) { const MCSubtargetInfo *STI) {
MipsTargetStreamer &TOut = getTargetStreamer(); MipsTargetStreamer &TOut = getTargetStreamer();
▲ Show 20 Lines • Show All 3,590 Lines • Show Last 20 Lines

llvm/trunk/lib/Target/Mips/Mips32r6InstrInfo.td

Show First 20 Lines • Show All 911 Lines • ▼ Show 20 Lines
def : MipsInstAlias<"jr $rs", (JALR ZERO, GPR32Opnd:$rs), 1>, ISA_MIPS32R6, GPR_32; def : MipsInstAlias<"jr $rs", (JALR ZERO, GPR32Opnd:$rs), 1>, ISA_MIPS32R6, GPR_32;
} }
def : MipsInstAlias<"jrc $rs", (JIC GPR32Opnd:$rs, 0), 1>, ISA_MIPS32R6, GPR_32; def : MipsInstAlias<"jrc $rs", (JIC GPR32Opnd:$rs, 0), 1>, ISA_MIPS32R6, GPR_32;
let AdditionalPredicates = [NotInMicroMips] in { let AdditionalPredicates = [NotInMicroMips] in {
def : MipsInstAlias<"jalrc $rs", (JIALC GPR32Opnd:$rs, 0), 1>, ISA_MIPS32R6, GPR_32; def : MipsInstAlias<"jalrc $rs", (JIALC GPR32Opnd:$rs, 0), 1>, ISA_MIPS32R6, GPR_32;
} }
def : MipsInstAlias<"div $rs, $rt", (DIV GPR32Opnd:$rs, GPR32Opnd:$rs,
GPR32Opnd:$rt)>, ISA_MIPS32R6;
def : MipsInstAlias<"divu $rs, $rt", (DIVU GPR32Opnd:$rs, GPR32Opnd:$rs,
GPR32Opnd:$rt)>, ISA_MIPS32R6;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// //
// Patterns and Pseudo Instructions // Patterns and Pseudo Instructions
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// comparisons supported via another comparison // comparisons supported via another comparison
multiclass Cmp_Pats<ValueType VT, Instruction NOROp, Register ZEROReg> { multiclass Cmp_Pats<ValueType VT, Instruction NOROp, Register ZEROReg> {
▲ Show 20 Lines • Show All 77 Lines • Show Last 20 Lines

llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td

Show First 20 Lines • Show All 829 Lines • ▼ Show 20 Linesdef DMULOUMacro : MipsAsmPseudoInst<(outs), (ins GPR64Opnd:$rs, GPR64Opnd:$rt,
"dmulou\t$rs, $rt, $rd">, "dmulou\t$rs, $rt, $rd">,
ISA_MIPS3_NOT_32R6_64R6; ISA_MIPS3_NOT_32R6_64R6;
def DMULMacro : MipsAsmPseudoInst<(outs), (ins GPR64Opnd:$rs, GPR64Opnd:$rt, def DMULMacro : MipsAsmPseudoInst<(outs), (ins GPR64Opnd:$rs, GPR64Opnd:$rt,
GPR64Opnd:$rd), GPR64Opnd:$rd),
"dmul\t$rs, $rt, $rd"> { "dmul\t$rs, $rt, $rd"> {
let InsnPredicates = [HasMips3, NotMips64r6, NotCnMips]; let InsnPredicates = [HasMips3, NotMips64r6, NotCnMips];
} }
let AdditionalPredicates = [NotInMicroMips] in {
def DSDivMacro : MipsAsmPseudoInst<(outs GPR64Opnd:$rd),
(ins GPR64Opnd:$rs, GPR64Opnd:$rt),
"ddiv\t$rd, $rs, $rt">,
ISA_MIPS3_NOT_32R6_64R6;
def DSDivIMacro : MipsAsmPseudoInst<(outs GPR64Opnd:$rd),
(ins GPR64Opnd:$rs, imm64:$imm),
"ddiv\t$rd, $rs, $imm">,
ISA_MIPS3_NOT_32R6_64R6;
def DUDivMacro : MipsAsmPseudoInst<(outs GPR64Opnd:$rd),
(ins GPR64Opnd:$rs, GPR64Opnd:$rt),
"ddivu\t$rd, $rs, $rt">,
ISA_MIPS3_NOT_32R6_64R6;
def DUDivIMacro : MipsAsmPseudoInst<(outs GPR64Opnd:$rd),
(ins GPR64Opnd:$rs, imm64:$imm),
"ddivu\t$rd, $rs, $imm">,
ISA_MIPS3_NOT_32R6_64R6;
// GAS expands 'div' and 'ddiv' differently when the destination
// register is $zero and the instruction is in the two operand
// form. 'ddiv' gets expanded, while 'div' is not expanded.
def : MipsInstAlias<"ddiv $rs, $rt", (DSDivMacro GPR64Opnd:$rs,
GPR64Opnd:$rs,
GPR64Opnd:$rt), 0>,
ISA_MIPS3_NOT_32R6_64R6;
def : MipsInstAlias<"ddiv $rd, $imm", (DSDivIMacro GPR64Opnd:$rd,
GPR64Opnd:$rd,
imm64:$imm), 0>,
ISA_MIPS3_NOT_32R6_64R6;
// GAS expands 'divu' and 'ddivu' differently when the destination
// register is $zero and the instruction is in the two operand
// form. 'ddivu' gets expanded, while 'divu' is not expanded.
def : MipsInstAlias<"ddivu $rt, $rs", (DUDivMacro GPR64Opnd:$rt,
GPR64Opnd:$rt,
GPR64Opnd:$rs), 0>,
ISA_MIPS3_NOT_32R6_64R6;
def : MipsInstAlias<"ddivu $rd, $imm", (DUDivIMacro GPR64Opnd:$rd,
GPR64Opnd:$rd,
imm64:$imm), 0>,
ISA_MIPS3_NOT_32R6_64R6;
}

llvm/trunk/lib/Target/Mips/MipsInstrInfo.td

Show First 20 Lines • Show All 2,576 Lines • ▼ Show 20 Lines
def BGTULImmMacro : CondBranchImmPseudo<"bgtul">, ISA_MIPS2_NOT_32R6_64R6; def BGTULImmMacro : CondBranchImmPseudo<"bgtul">, ISA_MIPS2_NOT_32R6_64R6;
// FIXME: Predicates are removed because instructions are matched regardless of // FIXME: Predicates are removed because instructions are matched regardless of
// predicates, because PredicateControl was not in the hierarchy. This was // predicates, because PredicateControl was not in the hierarchy. This was
// done to emit more precise error message from expansion function. // done to emit more precise error message from expansion function.
// Once the tablegen-erated errors are made better, this needs to be fixed and // Once the tablegen-erated errors are made better, this needs to be fixed and
// predicates needs to be restored. // predicates needs to be restored.
def SDivMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd), def SDivMacro : MipsAsmPseudoInst<(outs GPR32NonZeroOpnd:$rd),
(ins GPR32Opnd:$rs, GPR32Opnd:$rt), (ins GPR32Opnd:$rs, GPR32Opnd:$rt),
"div\t$rd, $rs, $rt">, "div\t$rd, $rs, $rt">,
ISA_MIPS1_NOT_32R6_64R6; ISA_MIPS1_NOT_32R6_64R6;
def SDivIMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd), def SDivIMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd),
(ins GPR32Opnd:$rs, simm32:$imm), (ins GPR32Opnd:$rs, simm32:$imm),
"div\t$rd, $rs, $imm">, "div\t$rd, $rs, $imm">,
ISA_MIPS1_NOT_32R6_64R6; ISA_MIPS1_NOT_32R6_64R6;
def UDivMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd), def UDivMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd),
(ins GPR32Opnd:$rs, GPR32Opnd:$rt), (ins GPR32Opnd:$rs, GPR32Opnd:$rt),
"divu\t$rd, $rs, $rt">, "divu\t$rd, $rs, $rt">,
ISA_MIPS1_NOT_32R6_64R6; ISA_MIPS1_NOT_32R6_64R6;
def UDivIMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd), def UDivIMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd),
(ins GPR32Opnd:$rs, simm32:$imm), (ins GPR32Opnd:$rs, simm32:$imm),
"divu\t$rd, $rs, $imm">, "divu\t$rd, $rs, $imm">,
ISA_MIPS1_NOT_32R6_64R6; ISA_MIPS1_NOT_32R6_64R6;
def : MipsInstAlias<"div $rt, $rs", (SDivMacro GPR32Opnd:$rt, GPR32Opnd:$rt,
GPR32Opnd:$rs), 0>,
def : MipsInstAlias<"div $rs, $rt", (SDIV GPR32ZeroOpnd:$rs,
GPR32Opnd:$rt), 0>,
ISA_MIPS1_NOT_32R6_64R6;
def : MipsInstAlias<"div $rs, $rt", (SDivMacro GPR32NonZeroOpnd:$rs,
GPR32NonZeroOpnd:$rs,
GPR32Opnd:$rt), 0>,
ISA_MIPS1_NOT_32R6_64R6; ISA_MIPS1_NOT_32R6_64R6;
def : MipsInstAlias<"div $rd, $imm", (SDivIMacro GPR32Opnd:$rd, GPR32Opnd:$rd, def : MipsInstAlias<"div $rd, $imm", (SDivIMacro GPR32Opnd:$rd, GPR32Opnd:$rd,
simm32:$imm), 0>, simm32:$imm), 0>,
ISA_MIPS1_NOT_32R6_64R6; ISA_MIPS1_NOT_32R6_64R6;
def : MipsInstAlias<"divu $rt, $rs", (UDivMacro GPR32Opnd:$rt, GPR32Opnd:$rt,
def : MipsInstAlias<"divu $rt, $rs", (UDIV GPR32ZeroOpnd:$rt,
GPR32Opnd:$rs), 0>,
ISA_MIPS1_NOT_32R6_64R6;
def : MipsInstAlias<"divu $rt, $rs", (UDivMacro GPR32NonZeroOpnd:$rt,
GPR32NonZeroOpnd:$rt,
GPR32Opnd:$rs), 0>, GPR32Opnd:$rs), 0>,
ISA_MIPS1_NOT_32R6_64R6; ISA_MIPS1_NOT_32R6_64R6;
def : MipsInstAlias<"divu $rd, $imm", (UDivIMacro GPR32Opnd:$rd, GPR32Opnd:$rd, def : MipsInstAlias<"divu $rd, $imm", (UDivIMacro GPR32Opnd:$rd, GPR32Opnd:$rd,
simm32:$imm), 0>, simm32:$imm), 0>,
ISA_MIPS1_NOT_32R6_64R6; ISA_MIPS1_NOT_32R6_64R6;
def DSDivMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd),
(ins GPR32Opnd:$rs, GPR32Opnd:$rt),
"ddiv\t$rd, $rs, $rt">,
ISA_MIPS64_NOT_64R6;
def DSDivIMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd),
(ins GPR32Opnd:$rs, imm64:$imm),
"ddiv\t$rd, $rs, $imm">,
ISA_MIPS64_NOT_64R6;
def DUDivMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd),
(ins GPR32Opnd:$rs, GPR32Opnd:$rt),
"ddivu\t$rd, $rs, $rt">,
ISA_MIPS64_NOT_64R6;
def DUDivIMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd),
(ins GPR32Opnd:$rs, imm64:$imm),
"ddivu\t$rd, $rs, $imm">,
ISA_MIPS64_NOT_64R6;
def : MipsInstAlias<"ddiv $rt, $rs", (DSDivMacro GPR32Opnd:$rt, GPR32Opnd:$rt,
GPR32Opnd:$rs), 0>,
ISA_MIPS64_NOT_64R6;
def : MipsInstAlias<"ddiv $rd, $imm", (DSDivIMacro GPR32Opnd:$rd, GPR32Opnd:$rd,
imm64:$imm), 0>,
ISA_MIPS64_NOT_64R6;
def : MipsInstAlias<"ddivu $rt, $rs", (DUDivMacro GPR32Opnd:$rt, GPR32Opnd:$rt,
GPR32Opnd:$rs), 0>,
ISA_MIPS64_NOT_64R6;
def : MipsInstAlias<"ddivu $rd, $imm", (DUDivIMacro GPR32Opnd:$rd,
GPR32Opnd:$rd, imm64:$imm),
0>, ISA_MIPS64_NOT_64R6;
def Ulh : MipsAsmPseudoInst<(outs GPR32Opnd:$rt), (ins mem:$addr), def Ulh : MipsAsmPseudoInst<(outs GPR32Opnd:$rt), (ins mem:$addr),
"ulh\t$rt, $addr">; //, ISA_MIPS1_NOT_32R6_64R6; "ulh\t$rt, $addr">; //, ISA_MIPS1_NOT_32R6_64R6;
def Ulhu : MipsAsmPseudoInst<(outs GPR32Opnd:$rt), (ins mem:$addr), def Ulhu : MipsAsmPseudoInst<(outs GPR32Opnd:$rt), (ins mem:$addr),
"ulhu\t$rt, $addr">; //, ISA_MIPS1_NOT_32R6_64R6; "ulhu\t$rt, $addr">; //, ISA_MIPS1_NOT_32R6_64R6;
def Ulw : MipsAsmPseudoInst<(outs GPR32Opnd:$rt), (ins mem:$addr), def Ulw : MipsAsmPseudoInst<(outs GPR32Opnd:$rt), (ins mem:$addr),
▲ Show 20 Lines • Show All 305 Lines • Show Last 20 Lines

llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td

Show First 20 Lines • Show All 284 Lines • ▼ Show 20 Linesclass GPR32Class<list<ValueType> regTypes> :
// Callee save // Callee save
S0, S1, S2, S3, S4, S5, S6, S7, S0, S1, S2, S3, S4, S5, S6, S7,
// Not preserved across procedure calls // Not preserved across procedure calls
T8, T9, T8, T9,
// Reserved // Reserved
K0, K1, GP, SP, FP, RA)>; K0, K1, GP, SP, FP, RA)>;
def GPR32 : GPR32Class<[i32]>; def GPR32 : GPR32Class<[i32]>;
def GPR32ZERO : RegisterClass<"Mips", [i32], 32, (add
// Reserved
ZERO)>;
def GPR32NONZERO : RegisterClass<"Mips", [i32], 32, (add
// Reserved
AT,
// Return Values and Arguments
V0, V1, A0, A1, A2, A3,
// Not preserved across procedure calls
T0, T1, T2, T3, T4, T5, T6, T7,
// Callee save
S0, S1, S2, S3, S4, S5, S6, S7,
// Not preserved across procedure calls
T8, T9,
// Reserved
K0, K1, GP, SP, FP, RA)>;
def DSPR : GPR32Class<[v4i8, v2i16]>; def DSPR : GPR32Class<[v4i8, v2i16]>;
def GPRMM16 : RegisterClass<"Mips", [i32], 32, (add def GPRMM16 : RegisterClass<"Mips", [i32], 32, (add
// Callee save // Callee save
S0, S1, S0, S1,
// Return Values and Arguments // Return Values and Arguments
V0, V1, A0, A1, A2, A3)>; V0, V1, A0, A1, A2, A3)>;
Show All 11 Linesdef GPRMM16MoveP : RegisterClass<"Mips", [i32], 32, (add
// Callee save // Callee save
S1, S1,
// Return Values and Arguments // Return Values and Arguments
V0, V1, V0, V1,
// Callee save // Callee save
S0, S2, S3, S4)>; S0, S2, S3, S4)>;
def GPR64 : RegisterClass<"Mips", [i64], 64, (add def GPR64 : RegisterClass<"Mips", [i64], 64, (add
// Reserved // Reserved
ZERO_64, AT_64, ZERO_64, AT_64,
// Return Values and Arguments // Return Values and Arguments
V0_64, V1_64, A0_64, A1_64, A2_64, A3_64, V0_64, V1_64, A0_64, A1_64, A2_64, A3_64,
// Not preserved across procedure calls // Not preserved across procedure calls
T0_64, T1_64, T2_64, T3_64, T4_64, T5_64, T6_64, T7_64, T0_64, T1_64, T2_64, T3_64, T4_64, T5_64, T6_64, T7_64,
// Callee save // Callee save
S0_64, S1_64, S2_64, S3_64, S4_64, S5_64, S6_64, S7_64, S0_64, S1_64, S2_64, S3_64, S4_64, S5_64, S6_64, S7_64,
// Not preserved across procedure calls // Not preserved across procedure calls
▲ Show 20 Lines • Show All 145 Lines • ▼ Show 20 Linesclass MipsAsmRegOperand : AsmOperandClass {
let ParserMethod = "parseAnyRegister"; let ParserMethod = "parseAnyRegister";
} }
def GPR64AsmOperand : MipsAsmRegOperand { def GPR64AsmOperand : MipsAsmRegOperand {
let Name = "GPR64AsmReg"; let Name = "GPR64AsmReg";
let PredicateMethod = "isGPRAsmReg"; let PredicateMethod = "isGPRAsmReg";
} }
def GPR32ZeroAsmOperand : MipsAsmRegOperand {
let Name = "GPR32ZeroAsmReg";
let PredicateMethod = "isGPRZeroAsmReg";
}
def GPR32NonZeroAsmOperand : MipsAsmRegOperand {
let Name = "GPR32NonZeroAsmReg";
let PredicateMethod = "isGPRNonZeroAsmReg";
}
def GPR32AsmOperand : MipsAsmRegOperand { def GPR32AsmOperand : MipsAsmRegOperand {
let Name = "GPR32AsmReg"; let Name = "GPR32AsmReg";
let PredicateMethod = "isGPRAsmReg"; let PredicateMethod = "isGPRAsmReg";
} }
def GPRMM16AsmOperand : MipsAsmRegOperand { def GPRMM16AsmOperand : MipsAsmRegOperand {
let Name = "GPRMM16AsmReg"; let Name = "GPRMM16AsmReg";
let PredicateMethod = "isMM16AsmReg"; let PredicateMethod = "isMM16AsmReg";
▲ Show 20 Lines • Show All 55 Lines • ▼ Show 20 Lines
def MSA128AsmOperand : MipsAsmRegOperand { def MSA128AsmOperand : MipsAsmRegOperand {
let Name = "MSA128AsmReg"; let Name = "MSA128AsmReg";
} }
def MSACtrlAsmOperand : MipsAsmRegOperand { def MSACtrlAsmOperand : MipsAsmRegOperand {
let Name = "MSACtrlAsmReg"; let Name = "MSACtrlAsmReg";
} }
def GPR32ZeroOpnd : RegisterOperand<GPR32ZERO> {
let ParserMatchClass = GPR32ZeroAsmOperand;
}
def GPR32NonZeroOpnd : RegisterOperand<GPR32NONZERO> {
let ParserMatchClass = GPR32NonZeroAsmOperand;
}
def GPR32Opnd : RegisterOperand<GPR32> { def GPR32Opnd : RegisterOperand<GPR32> {
let ParserMatchClass = GPR32AsmOperand; let ParserMatchClass = GPR32AsmOperand;
} }
def GPRMM16Opnd : RegisterOperand<GPRMM16> { def GPRMM16Opnd : RegisterOperand<GPRMM16> {
let ParserMatchClass = GPRMM16AsmOperand; let ParserMatchClass = GPRMM16AsmOperand;
} }
▲ Show 20 Lines • Show All 113 Lines • Show Last 20 Lines

llvm/trunk/test/MC/Mips/macro-ddiv.s

# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips64r2 | \ # RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r2 | \
# RUN: FileCheck %s --check-prefix=CHECK-NOTRAP # RUN: FileCheck %s --check-prefix=CHECK-NOTRAP
# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips64r2 \ # RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r2 \
# RUN: -mattr=+use-tcc-in-div | FileCheck %s --check-prefix=CHECK-TRAP # RUN: -mattr=+use-tcc-in-div | FileCheck %s --check-prefix=CHECK-TRAP
ddiv $25,$11 ddiv $25,$11
# CHECK-NOTRAP: bne $11, $zero, 8 # encoding: [0x15,0x60,0x00,0x02] # CHECK-NOTRAP: bne $11, $zero, .Ltmp0 # encoding: [0x15,0x60,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp0-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: ddiv $zero, $25, $11 # encoding: [0x03,0x2b,0x00,0x1e] # CHECK-NOTRAP: ddiv $zero, $25, $11 # encoding: [0x03,0x2b,0x00,0x1e]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-NOTRAP: .Ltmp0
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff] # CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-NOTRAP: bne $11, $1, 20 # encoding: [0x15,0x61,0x00,0x05] # CHECK-NOTRAP: bne $11, $1, .Ltmp1 # encoding: [0x15,0x61,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp1-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: addiu $1, $zero, 1 # encoding: [0x24,0x01,0x00,0x01] # CHECK-NOTRAP: addiu $1, $zero, 1 # encoding: [0x24,0x01,0x00,0x01]
# CHECK-NOTRAP: dsll32 $1, $1, 31 # encoding: [0x00,0x01,0x0f,0xfc] # CHECK-NOTRAP: dsll32 $1, $1, 31 # encoding: [0x00,0x01,0x0f,0xfc]
# CHECK-NOTRAP: bne $25, $1, 8 # encoding: [0x17,0x21,0x00,0x02] # CHECK-NOTRAP: bne $25, $1, .Ltmp1 # encoding: [0x17,0x21,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp1-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: sll $zero, $zero, 0 # encoding: [0x00,0x00,0x00,0x00] # CHECK-NOTRAP: sll $zero, $zero, 0 # encoding: [0x00,0x00,0x00,0x00]
# CHECK-NOTRAP: break 6 # encoding: [0x00,0x06,0x00,0x0d] # CHECK-NOTRAP: break 6 # encoding: [0x00,0x06,0x00,0x0d]
# CHECK-NOTRAP: .Ltmp1
# CHECK-NOTRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12] # CHECK-NOTRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12]
# CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4] # CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4]
# CHECK-TRAP: ddiv $zero, $25, $11 # encoding: [0x03,0x2b,0x00,0x1e] # CHECK-TRAP: ddiv $zero, $25, $11 # encoding: [0x03,0x2b,0x00,0x1e]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff] # CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-TRAP: bne $11, $1, 12 # encoding: [0x15,0x61,0x00,0x03] # CHECK-TRAP: bne $11, $1, .Ltmp0 # encoding: [0x15,0x61,A,A]
# CHECK-TRAP: # fixup A - offset: 0, value: .Ltmp0-4, kind: fixup_Mips_PC16
# CHECK-TRAP: addiu $1, $zero, 1 # encoding: [0x24,0x01,0x00,0x01] # CHECK-TRAP: addiu $1, $zero, 1 # encoding: [0x24,0x01,0x00,0x01]
# CHECK-TRAP: dsll32 $1, $1, 31 # encoding: [0x00,0x01,0x0f,0xfc] # CHECK-TRAP: dsll32 $1, $1, 31 # encoding: [0x00,0x01,0x0f,0xfc]
# CHECK-TRAP: teq $25, $1, 6 # encoding: [0x03,0x21,0x01,0xb4] # CHECK-TRAP: teq $25, $1, 6 # encoding: [0x03,0x21,0x01,0xb4]
# CHECK-TRAP: .Ltmp0:
# CHECK-TRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12] # CHECK-TRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12]
ddiv $24,$12 ddiv $24,$12
# CHECK-NOTRAP: bne $12, $zero, 8 # encoding: [0x15,0x80,0x00,0x02] # CHECK-NOTRAP: bne $12, $zero, .Ltmp2 # encoding: [0x15,0x80,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp2-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: ddiv $zero, $24, $12 # encoding: [0x03,0x0c,0x00,0x1e] # CHECK-NOTRAP: ddiv $zero, $24, $12 # encoding: [0x03,0x0c,0x00,0x1e]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-NOTRAP: .Ltmp2:
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff] # CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-NOTRAP: bne $12, $1, 20 # encoding: [0x15,0x81,0x00,0x05] # CHECK-NOTRAP: bne $12, $1, .Ltmp3 # encoding: [0x15,0x81,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp3-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: addiu $1, $zero, 1 # encoding: [0x24,0x01,0x00,0x01] # CHECK-NOTRAP: addiu $1, $zero, 1 # encoding: [0x24,0x01,0x00,0x01]
# CHECK-NOTRAP: dsll32 $1, $1, 31 # encoding: [0x00,0x01,0x0f,0xfc] # CHECK-NOTRAP: dsll32 $1, $1, 31 # encoding: [0x00,0x01,0x0f,0xfc]
# CHECK-NOTRAP: bne $24, $1, 8 # encoding: [0x17,0x01,0x00,0x02] # CHECK-NOTRAP: bne $24, $1, .Ltmp3 # encoding: [0x17,0x01,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp3-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: sll $zero, $zero, 0 # encoding: [0x00,0x00,0x00,0x00] # CHECK-NOTRAP: sll $zero, $zero, 0 # encoding: [0x00,0x00,0x00,0x00]
# CHECK-NOTRAP: break 6 # encoding: [0x00,0x06,0x00,0x0d] # CHECK-NOTRAP: break 6 # encoding: [0x00,0x06,0x00,0x0d]
# CHECK-NOTRAP: .Ltmp3
# CHECK-NOTRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12] # CHECK-NOTRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12]
# CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4] # CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4]
# CHECK-TRAP: ddiv $zero, $24, $12 # encoding: [0x03,0x0c,0x00,0x1e] # CHECK-TRAP: ddiv $zero, $24, $12 # encoding: [0x03,0x0c,0x00,0x1e]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff] # CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-TRAP: bne $12, $1, 12 # encoding: [0x15,0x81,0x00,0x03] # CHECK-TRAP: bne $12, $1, .Ltmp1 # encoding: [0x15,0x81,A,A]
# CHECK-TRAP: # fixup A - offset: 0, value: .Ltmp1-4, kind: fixup_Mips_PC16
# CHECK-TRAP: addiu $1, $zero, 1 # encoding: [0x24,0x01,0x00,0x01] # CHECK-TRAP: addiu $1, $zero, 1 # encoding: [0x24,0x01,0x00,0x01]
# CHECK-TRAP: dsll32 $1, $1, 31 # encoding: [0x00,0x01,0x0f,0xfc] # CHECK-TRAP: dsll32 $1, $1, 31 # encoding: [0x00,0x01,0x0f,0xfc]
# CHECK-TRAP: teq $24, $1, 6 # encoding: [0x03,0x01,0x01,0xb4] # CHECK-TRAP: teq $24, $1, 6 # encoding: [0x03,0x01,0x01,0xb4]
# CHECK-TRAP: .Ltmp1:
# CHECK-TRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12] # CHECK-TRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12]
ddiv $25,$0 ddiv $25,$0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
ddiv $0,$9 ddiv $0,$9
# CHECK-NOTRAP: bne $9, $zero, 8 # encoding: [0x15,0x20,0x00,0x02]
# CHECK-NOTRAP: ddiv $zero, $zero, $9 # encoding: [0x00,0x09,0x00,0x1e] # CHECK-NOTRAP: ddiv $zero, $zero, $9 # encoding: [0x00,0x09,0x00,0x1e]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-NOTRAP: bne $9, $1, 20 # encoding: [0x15,0x21,0x00,0x05]
# CHECK-NOTRAP: addiu $1, $zero, 1 # encoding: [0x24,0x01,0x00,0x01]
# CHECK-NOTRAP: dsll32 $1, $1, 31 # encoding: [0x00,0x01,0x0f,0xfc]
# CHECK-NOTRAP: bne $zero, $1, 8 # encoding: [0x14,0x01,0x00,0x02]
# CHECK-NOTRAP: sll $zero, $zero, 0 # encoding: [0x00,0x00,0x00,0x00]
# CHECK-NOTRAP: break 6 # encoding: [0x00,0x06,0x00,0x0d]
# CHECK-NOTRAP: mflo $zero # encoding: [0x00,0x00,0x00,0x12]
# CHECK-TRAP: teq $9, $zero, 7 # encoding: [0x01,0x20,0x01,0xf4] # CHECK-TRAP: teq $9, $zero, 7 # encoding: [0x01,0x20,0x01,0xf4]
# CHECK-TRAP: ddiv $zero, $zero, $9 # encoding: [0x00,0x09,0x00,0x1e] # CHECK-TRAP: ddiv $zero, $zero, $9 # encoding: [0x00,0x09,0x00,0x1e]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff] # CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-TRAP: bne $9, $1, 12 # encoding: [0x15,0x21,0x00,0x03] # CHECK-TRAP: bne $9, $1, .Ltmp2 # encoding: [0x15,0x21,A,A]
# CHECK-TRAP: # fixup A - offset: 0, value: .Ltmp2-4, kind: fixup_Mips_PC16
# CHECK-TRAP: addiu $1, $zero, 1 # encoding: [0x24,0x01,0x00,0x01] # CHECK-TRAP: addiu $1, $zero, 1 # encoding: [0x24,0x01,0x00,0x01]
# CHECK-TRAP: dsll32 $1, $1, 31 # encoding: [0x00,0x01,0x0f,0xfc] # CHECK-TRAP: dsll32 $1, $1, 31 # encoding: [0x00,0x01,0x0f,0xfc]
# CHECK-TRAP: teq $zero, $1, 6 # encoding: [0x00,0x01,0x01,0xb4] # CHECK-TRAP: teq $zero, $1, 6 # encoding: [0x00,0x01,0x01,0xb4]
# CHECH-TRAP: .Ltmp2:
# CHECK-TRAP: mflo $zero # encoding: [0x00,0x00,0x00,0x12] # CHECK-TRAP: mflo $zero # encoding: [0x00,0x00,0x00,0x12]
ddiv $0,$0 ddiv $0,$0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
ddiv $4,0 ddiv $4,0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
ddiv $0,0 ddiv $0,0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
ddiv $4,1 ddiv $4,1
# CHECK-NOTRAP: move $4, $4 # encoding: [0x00,0x80,0x20,0x21] # CHECK-NOTRAP: move $4, $4 # encoding: [0x00,0x80,0x20,0x25]
# CHECK-TRAP: move $4, $4 # encoding: [0x00,0x80,0x20,0x21] # CHECK-TRAP: move $4, $4 # encoding: [0x00,0x80,0x20,0x25]
ddiv $4,-1 ddiv $4,-1
# CHECK-NOTRAP: dsub $4, $zero, $4 # encoding: [0x00,0x04,0x20,0x2e] # CHECK-NOTRAP: dsub $4, $zero, $4 # encoding: [0x00,0x04,0x20,0x2e]
# CHECK-TRAP: dsub $4, $zero, $4 # encoding: [0x00,0x04,0x20,0x2e] # CHECK-TRAP: dsub $4, $zero, $4 # encoding: [0x00,0x04,0x20,0x2e]
ddiv $4,2 ddiv $4,2
# CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x24,0x01,0x00,0x02] # CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x24,0x01,0x00,0x02]
# CHECK-NOTRAP: ddiv $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1e] # CHECK-NOTRAP: ddiv $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1e]
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
# CHECK-TRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38] # CHECK-TRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38]
# CHECK-TRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff] # CHECK-TRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff]
# CHECK-TRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38] # CHECK-TRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38]
# CHECK-TRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff] # CHECK-TRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff]
# CHECK-TRAP: ddiv $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1e] # CHECK-TRAP: ddiv $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1e]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] # CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
ddiv $4,$5,$6 ddiv $4,$5,$6
# CHECK-NOTRAP: bne $6, $zero, 8 # encoding: [0x14,0xc0,0x00,0x02] # CHECK-NOTRAP: bne $6, $zero, .Ltmp6 # encoding: [0x14,0xc0,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp6-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: ddiv $zero, $5, $6 # encoding: [0x00,0xa6,0x00,0x1e] # CHECK-NOTRAP: ddiv $zero, $5, $6 # encoding: [0x00,0xa6,0x00,0x1e]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-NOTRAP: .Ltmp6:
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff] # CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-NOTRAP: bne $6, $1, 20 # encoding: [0x14,0xc1,0x00,0x05] # CHECK-NOTRAP: bne $6, $1, .Ltmp7 # encoding: [0x14,0xc1,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp7-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: addiu $1, $zero, 1 # encoding: [0x24,0x01,0x00,0x01] # CHECK-NOTRAP: addiu $1, $zero, 1 # encoding: [0x24,0x01,0x00,0x01]
# CHECK-NOTRAP: dsll32 $1, $1, 31 # encoding: [0x00,0x01,0x0f,0xfc] # CHECK-NOTRAP: dsll32 $1, $1, 31 # encoding: [0x00,0x01,0x0f,0xfc]
# CHECK-NOTRAP: bne $5, $1, 8 # encoding: [0x14,0xa1,0x00,0x02] # CHECK-NOTRAP: bne $5, $1, .Ltmp7 # encoding: [0x14,0xa1,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp7-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: sll $zero, $zero, 0 # encoding: [0x00,0x00,0x00,0x00] # CHECK-NOTRAP: sll $zero, $zero, 0 # encoding: [0x00,0x00,0x00,0x00]
# CHECK-NOTRAP: break 6 # encoding: [0x00,0x06,0x00,0x0d] # CHECK-NOTRAP: break 6 # encoding: [0x00,0x06,0x00,0x0d]
# CHECK-NOTRAP: .Ltmp7:
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] # CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4] # CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4]
# CHECK-TRAP: ddiv $zero, $5, $6 # encoding: [0x00,0xa6,0x00,0x1e] # CHECK-TRAP: ddiv $zero, $5, $6 # encoding: [0x00,0xa6,0x00,0x1e]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff] # CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-TRAP: bne $6, $1, 12 # encoding: [0x14,0xc1,0x00,0x03] # CHECK-TRAP: bne $6, $1, .Ltmp3 # encoding: [0x14,0xc1,A,A]
# CHECK-TRAP: # fixup A - offset: 0, value: .Ltmp3-4, kind: fixup_Mips_PC16
# CHECK-TRAP: addiu $1, $zero, 1 # encoding: [0x24,0x01,0x00,0x01] # CHECK-TRAP: addiu $1, $zero, 1 # encoding: [0x24,0x01,0x00,0x01]
# CHECK-TRAP: dsll32 $1, $1, 31 # encoding: [0x00,0x01,0x0f,0xfc] # CHECK-TRAP: dsll32 $1, $1, 31 # encoding: [0x00,0x01,0x0f,0xfc]
# CHECK-TRAP: teq $5, $1, 6 # encoding: [0x00,0xa1,0x01,0xb4] # CHECK-TRAP: teq $5, $1, 6 # encoding: [0x00,0xa1,0x01,0xb4]
# CHECK-TRAP: .Ltmp3:
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] # CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
ddiv $4,$5,$0 ddiv $4,$5,$0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
ddiv $4,$0,$0 ddiv $4,$0,$0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
ddiv $0,$4,$5 ddiv $0,$4,$5
# CHECK-NOTRAP: ddiv $zero, $4, $5 # encoding: [0x00,0x85,0x00,0x1e] # CHECK-NOTRAP: ddiv $zero, $4, $5 # encoding: [0x00,0x85,0x00,0x1e]
# CHECK-TRAP: ddiv $zero, $4, $5 # encoding: [0x00,0x85,0x00,0x1e] # CHECK-TRAP: ddiv $zero, $4, $5 # encoding: [0x00,0x85,0x00,0x1e]
ddiv $4,$0,0 ddiv $4,$0,0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
ddiv $4,$5,0 ddiv $4,$5,0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
ddiv $4,$5,1 ddiv $4,$5,1
# CHECK-NOTRAP: move $4, $5 # encoding: [0x00,0xa0,0x20,0x21] # CHECK-NOTRAP: move $4, $5 # encoding: [0x00,0xa0,0x20,0x25]
# CHECK-TRAP: move $4, $5 # encoding: [0x00,0xa0,0x20,0x21] # CHECK-TRAP: move $4, $5 # encoding: [0x00,0xa0,0x20,0x25]
ddiv $4,$5,-1 ddiv $4,$5,-1
# CHECK-NOTRAP: dsub $4, $zero, $5 # encoding: [0x00,0x05,0x20,0x2e] # CHECK-NOTRAP: dsub $4, $zero, $5 # encoding: [0x00,0x05,0x20,0x2e]
# CHECK-TRAP: dsub $4, $zero, $5 # encoding: [0x00,0x05,0x20,0x2e] # CHECK-TRAP: dsub $4, $zero, $5 # encoding: [0x00,0x05,0x20,0x2e]
ddiv $4,$5,2 ddiv $4,$5,2
# CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x24,0x01,0x00,0x02] # CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x24,0x01,0x00,0x02]
# CHECK-NOTRAP: ddiv $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1e] # CHECK-NOTRAP: ddiv $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1e]
▲ Show 20 Lines • Show All 79 Lines • ▼ Show 20 Lines# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
ddiv $4,$5,0xfffffffff ddiv $4,$5,0xfffffffff
# CHECK-NOTRAP: addiu $1, $zero, 15 # encoding: [0x24,0x01,0x00,0x0f] # CHECK-NOTRAP: addiu $1, $zero, 15 # encoding: [0x24,0x01,0x00,0x0f]
# CHECK-NOTRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38] # CHECK-NOTRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38]
# CHECK-NOTRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff] # CHECK-NOTRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff]
# CHECK-NOTRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38] # CHECK-NOTRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38]
# CHECK-NOTRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff] # CHECK-NOTRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff]
# CHECK-NOTRAP: ddiv $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1e] # CHECK-NOTRAP: ddiv $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1e]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] # CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: addiu $1, $zero, 15 # encoding: [0x24,0x01,0x00,0x0f] # CHECK-TRAP: addiu $1, $zero, 15 # encoding: [0x24,0x01,0x00,0x0f]
# CHECK-TRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38] # CHECK-TRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38]
# CHECK-TRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff] # CHECK-TRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff]
# CHECK-TRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38] # CHECK-TRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38]
# CHECK-TRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff] # CHECK-TRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff]
# CHECK-TRAP: ddiv $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1e] # CHECK-TRAP: ddiv $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1e]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] # CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]

llvm/trunk/test/MC/Mips/macro-ddivu.s

# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips64r2 | \ # RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r2 | \
# RUN: FileCheck %s --check-prefix=CHECK-NOTRAP # RUN: FileCheck %s --check-prefix=CHECK-NOTRAP
# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips64r2 \ # RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r2 \
# RUN: -mattr=+use-tcc-in-div | FileCheck %s --check-prefix=CHECK-TRAP # RUN: -mattr=+use-tcc-in-div | FileCheck %s --check-prefix=CHECK-TRAP
ddivu $25,$11 ddivu $25,$11
# CHECK-NOTRAP: bne $11, $zero, 8 # encoding: [0x15,0x60,0x00,0x02] # CHECK-NOTRAP: bne $11, $zero, .Ltmp0 # encoding: [0x15,0x60,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp0-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: ddivu $zero, $25, $11 # encoding: [0x03,0x2b,0x00,0x1f] # CHECK-NOTRAP: ddivu $zero, $25, $11 # encoding: [0x03,0x2b,0x00,0x1f]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-NOTRAP: .Ltmp0
# CHECK-NOTRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12] # CHECK-NOTRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12]
# CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4] # CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4]
# CHECK-TRAP: ddivu $zero, $25, $11 # encoding: [0x03,0x2b,0x00,0x1f] # CHECK-TRAP: ddivu $zero, $25, $11 # encoding: [0x03,0x2b,0x00,0x1f]
# CHECK-TRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12] # CHECK-TRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12]
ddivu $24,$12 ddivu $24,$12
# CHECK-NOTRAP: bne $12, $zero, 8 # encoding: [0x15,0x80,0x00,0x02] # CHECK-NOTRAP: bne $12, $zero, .Ltmp1 # encoding: [0x15,0x80,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp1-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: ddivu $zero, $24, $12 # encoding: [0x03,0x0c,0x00,0x1f] # CHECK-NOTRAP: ddivu $zero, $24, $12 # encoding: [0x03,0x0c,0x00,0x1f]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-NOTRAP: .Ltmp1
# CHECK-NOTRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12] # CHECK-NOTRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12]
# CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4] # CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4]
# CHECK-TRAP: ddivu $zero, $24, $12 # encoding: [0x03,0x0c,0x00,0x1f] # CHECK-TRAP: ddivu $zero, $24, $12 # encoding: [0x03,0x0c,0x00,0x1f]
# CHECK-TRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12] # CHECK-TRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12]
ddivu $25,$0 ddivu $25,$0
# CHECK-NOTRAP: bne $zero, $zero, 8 # encoding: [0x14,0x00,0x00,0x02]
# CHECK-NOTRAP: ddivu $zero, $25, $zero # encoding: [0x03,0x20,0x00,0x1f]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-NOTRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
# CHECK-TRAP: ddivu $zero, $25, $zero # encoding: [0x03,0x20,0x00,0x1f]
# CHECK-TRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12]
ddivu $0,$9 ddivu $0,$9
# CHECK-NOTRAP: bne $9, $zero, 8 # encoding: [0x15,0x20,0x00,0x02] # CHECK-NOTRAP: bne $9, $zero, .Ltmp2 # encoding: [0x15,0x20,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp2-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: ddivu $zero, $zero, $9 # encoding: [0x00,0x09,0x00,0x1f] # CHECK-NOTRAP: ddivu $zero, $zero, $9 # encoding: [0x00,0x09,0x00,0x1f]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-NOTRAP: .Ltmp2
# CHECK-NOTRAP: mflo $zero # encoding: [0x00,0x00,0x00,0x12] # CHECK-NOTRAP: mflo $zero # encoding: [0x00,0x00,0x00,0x12]
# CHECK-TRAP: teq $9, $zero, 7 # encoding: [0x01,0x20,0x01,0xf4] # CHECK-TRAP: teq $9, $zero, 7 # encoding: [0x01,0x20,0x01,0xf4]
# CHECK-TRAP: ddivu $zero, $zero, $9 # encoding: [0x00,0x09,0x00,0x1f] # CHECK-TRAP: ddivu $zero, $zero, $9 # encoding: [0x00,0x09,0x00,0x1f]
# CHECK-TRAP: mflo $zero # encoding: [0x00,0x00,0x00,0x12] # CHECK-TRAP: mflo $zero # encoding: [0x00,0x00,0x00,0x12]
ddivu $0,$0 ddivu $0,$0
# CHECK-NOTRAP: bne $zero, $zero, 8 # encoding: [0x14,0x00,0x00,0x02]
# CHECK-NOTRAP: ddivu $zero, $zero, $zero # encoding: [0x00,0x00,0x00,0x1f]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-NOTRAP: mflo $zero # encoding: [0x00,0x00,0x00,0x12]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
# CHECK-TRAP: ddivu $zero, $zero, $zero # encoding: [0x00,0x00,0x00,0x1f]
# CHECK-TRAP: mflo $zero # encoding: [0x00,0x00,0x00,0x12]
ddivu $4,0 ddivu $4,0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
ddivu $0,0 ddivu $0,0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
ddivu $4,1 ddivu $4,1
# CHECK-NOTRAP: move $4, $4 # encoding: [0x00,0x80,0x20,0x21] # CHECK-NOTRAP: move $4, $4 # encoding: [0x00,0x80,0x20,0x25]
# CHECK-TRAP: move $4, $4 # encoding: [0x00,0x80,0x20,0x21] # CHECK-TRAP: move $4, $4 # encoding: [0x00,0x80,0x20,0x25]
ddivu $4,-1 ddivu $4,-1
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff] # CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-NOTRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f] # CHECK-NOTRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] # CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff] # CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f] # CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] # CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
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# CHECK-TRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38] # CHECK-TRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38]
# CHECK-TRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff] # CHECK-TRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff]
# CHECK-TRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38] # CHECK-TRAP: dsll $1, $1, 16 # encoding: [0x00,0x01,0x0c,0x38]
# CHECK-TRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff] # CHECK-TRAP: ori $1, $1, 65535 # encoding: [0x34,0x21,0xff,0xff]
# CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f] # CHECK-TRAP: ddivu $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] # CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
ddivu $4,$5,$6 ddivu $4,$5,$6
# CHECK-NOTRAP: bne $6, $zero, 8 # encoding: [0x14,0xc0,0x00,0x02] # CHECK-NOTRAP: bne $6, $zero, .Ltmp3 # encoding: [0x14,0xc0,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: .Ltmp3-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: ddivu $zero, $5, $6 # encoding: [0x00,0xa6,0x00,0x1f] # CHECK-NOTRAP: ddivu $zero, $5, $6 # encoding: [0x00,0xa6,0x00,0x1f]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-NOTRAP: .Ltmp3:
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] # CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4] # CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4]
# CHECK-TRAP: ddivu $zero, $5, $6 # encoding: [0x00,0xa6,0x00,0x1f] # CHECK-TRAP: ddivu $zero, $5, $6 # encoding: [0x00,0xa6,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] # CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
ddivu $4,$5,$0 ddivu $4,$5,$0
# CHECK-NOTRAP: bne $zero, $zero, 8 # encoding: [0x14,0x00,0x00,0x02]
# CHECK-NOTRAP: ddivu $zero, $5, $zero # encoding: [0x00,0xa0,0x00,0x1f]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
# CHECK-TRAP: ddivu $zero, $5, $zero # encoding: [0x00,0xa0,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
ddivu $4,$0,$0 ddivu $4,$0,$0
# CHECK-NOTRAP: bne $zero, $zero, 8 # encoding: [0x14,0x00,0x00,0x02]
# CHECK-NOTRAP: ddivu $zero, $zero, $zero # encoding: [0x00,0x00,0x00,0x1f]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
# CHECK-TRAP: ddivu $zero, $zero, $zero # encoding: [0x00,0x00,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
ddivu $0, $4, $5 ddivu $0, $4, $5
# CHECK-NOTRAP: ddivu $zero, $4, $5 # encoding: [0x00,0x85,0x00,0x1f] # CHECK-NOTRAP: ddivu $zero, $4, $5 # encoding: [0x00,0x85,0x00,0x1f]
# CHECK-TRAP: ddivu $zero, $4, $5 # encoding: [0x00,0x85,0x00,0x1f] # CHECK-TRAP: ddivu $zero, $4, $5 # encoding: [0x00,0x85,0x00,0x1f]
ddivu $4,$5,0 ddivu $4,$5,0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
ddivu $4,$0,0 ddivu $4,$0,0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
ddivu $0,$0,0 ddivu $0,$0,0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
ddivu $4,$5,1 ddivu $4,$5,1
# CHECK-NOTRAP: move $4, $5 # encoding: [0x00,0xa0,0x20,0x21] # CHECK-NOTRAP: move $4, $5 # encoding: [0x00,0xa0,0x20,0x25]
# CHECK-TRAP: move $4, $5 # encoding: [0x00,0xa0,0x20,0x21] # CHECK-TRAP: move $4, $5 # encoding: [0x00,0xa0,0x20,0x25]
ddivu $4,$5,-1 ddivu $4,$5,-1
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff] # CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-NOTRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f] # CHECK-NOTRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] # CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff] # CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-TRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f] # CHECK-TRAP: ddivu $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1f]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] # CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
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llvm/trunk/test/MC/Mips/macro-div-bad.s

# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r6 2>&1 | \ # RUN: not llvm-mc %s -arch=mips -mcpu=mips32r6 2>&1 | \
# RUN: FileCheck %s --check-prefix=R6 # RUN: FileCheck %s --check-prefix=R6
# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64r6 2>&1 | \ # RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64r6 2>&1 | \
# RUN: FileCheck %s --check-prefix=R6 # RUN: FileCheck %s --check-prefix=R6
# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 2>&1 | \ # RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 2>&1 | \
# RUN: FileCheck %s --check-prefix=NOT-R6 # RUN: FileCheck %s --check-prefix=NOT-R6
# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 2>&1 | \ # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 2>&1 | \
# RUN: FileCheck %s --check-prefix=NOT-R6 # RUN: FileCheck %s --check-prefix=NOT-R6
.text .text
div $25, $11 div $25, 11
# R6: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled # R6: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled
div $25, $0 div $25, $0
# NOT-R6: :[[@LINE-1]]:3: warning: division by zero # NOT-R6: :[[@LINE-1]]:3: warning: division by zero
div $0,$0 div $0,$0
# NOT-R6: :[[@LINE-1]]:3: warning: dividing zero by zero # NOT-R6: :[[@LINE-1]]:3: warning: dividing zero by zero

llvm/trunk/test/MC/Mips/macro-div.s

# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 | \ # RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 | \
# RUN: FileCheck %s --check-prefix=CHECK-NOTRAP # RUN: FileCheck %s --check-prefix=CHECK-NOTRAP
# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 \ # RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 \
# RUN: -mattr=+use-tcc-in-div | FileCheck %s --check-prefix=CHECK-TRAP # RUN: -mattr=+use-tcc-in-div | FileCheck %s --check-prefix=CHECK-TRAP
div $25,$11 div $25,$11
# CHECK-NOTRAP: bnez $11, 8 # encoding: [0x15,0x60,0x00,0x02] # CHECK-NOTRAP: bnez $11, $tmp0 # encoding: [0x15,0x60,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: ($tmp0)-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: div $zero, $25, $11 # encoding: [0x03,0x2b,0x00,0x1a] # CHECK-NOTRAP: div $zero, $25, $11 # encoding: [0x03,0x2b,0x00,0x1a]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-NOTRAP: $tmp0:
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff] # CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-NOTRAP: bne $11, $1, 16 # encoding: [0x15,0x61,0x00,0x04] # CHECK-NOTRAP: bne $11, $1, $tmp1 # encoding: [0x15,0x61,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: ($tmp1)-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: lui $1, 32768 # encoding: [0x3c,0x01,0x80,0x00] # CHECK-NOTRAP: lui $1, 32768 # encoding: [0x3c,0x01,0x80,0x00]
# CHECK-NOTRAP: bne $25, $1, 8 # encoding: [0x17,0x21,0x00,0x02] # CHECK-NOTRAP: bne $25, $1, $tmp1 # encoding: [0x17,0x21,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: ($tmp1)-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: nop # encoding: [0x00,0x00,0x00,0x00] # CHECK-NOTRAP: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK-NOTRAP: break 6 # encoding: [0x00,0x06,0x00,0x0d] # CHECK-NOTRAP: break 6 # encoding: [0x00,0x06,0x00,0x0d]
# CHECK-NOTRAP: $tmp1:
# CHECK-NOTRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12] # CHECK-NOTRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12]
# CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4] # CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4]
# CHECK-TRAP: div $zero, $25, $11 # encoding: [0x03,0x2b,0x00,0x1a] # CHECK-TRAP: div $zero, $25, $11 # encoding: [0x03,0x2b,0x00,0x1a]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff] # CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-TRAP: bne $11, $1, 8 # encoding: [0x15,0x61,0x00,0x02] # CHECK-TRAP: bne $11, $1, $tmp0 # encoding: [0x15,0x61,A,A]
# CHECK-TRAP: # fixup A - offset: 0, value: ($tmp0)-4, kind: fixup_Mips_PC16
# CHECK-TRAP: lui $1, 32768 # encoding: [0x3c,0x01,0x80,0x00] # CHECK-TRAP: lui $1, 32768 # encoding: [0x3c,0x01,0x80,0x00]
# CHECK-TRAP: teq $25, $1, 6 # encoding: [0x03,0x21,0x01,0xb4] # CHECK-TRAP: teq $25, $1, 6 # encoding: [0x03,0x21,0x01,0xb4]
# CHECK-TRAP: $tmp0:
# CHECK-TRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12] # CHECK-TRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12]
div $24,$12 div $24,$12
# CHECK-NOTRAP: bnez $12, 8 # encoding: [0x15,0x80,0x00,0x02] # CHECK-NOTRAP: bnez $12, $tmp2 # encoding: [0x15,0x80,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: ($tmp2)-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: div $zero, $24, $12 # encoding: [0x03,0x0c,0x00,0x1a] # CHECK-NOTRAP: div $zero, $24, $12 # encoding: [0x03,0x0c,0x00,0x1a]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-NOTRAP: $tmp2:
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff] # CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-NOTRAP: bne $12, $1, 16 # encoding: [0x15,0x81,0x00,0x04] # CHECK-NOTRAP: bne $12, $1, $tmp3 # encoding: [0x15,0x81,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: ($tmp3)-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: lui $1, 32768 # encoding: [0x3c,0x01,0x80,0x00] # CHECK-NOTRAP: lui $1, 32768 # encoding: [0x3c,0x01,0x80,0x00]
# CHECK-NOTRAP: bne $24, $1, 8 # encoding: [0x17,0x01,0x00,0x02] # CHECK-NOTRAP: bne $24, $1, $tmp3 # encoding: [0x17,0x01,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: ($tmp3)-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: nop # encoding: [0x00,0x00,0x00,0x00] # CHECK-NOTRAP: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK-NOTRAP: break 6 # encoding: [0x00,0x06,0x00,0x0d] # CHECK-NOTRAP: break 6 # encoding: [0x00,0x06,0x00,0x0d]
# CHECK-NOTRAP: $tmp3:
# CHECK-NOTRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12] # CHECK-NOTRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12]
# CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4] # CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4]
# CHECK-TRAP: div $zero, $24, $12 # encoding: [0x03,0x0c,0x00,0x1a] # CHECK-TRAP: div $zero, $24, $12 # encoding: [0x03,0x0c,0x00,0x1a]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff] # CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-TRAP: bne $12, $1, 8 # encoding: [0x15,0x81,0x00,0x02] # CHECK-TRAP: bne $12, $1, $tmp1 # encoding: [0x15,0x81,A,A]
# CHECK-TRAP: # fixup A - offset: 0, value: ($tmp1)-4, kind: fixup_Mips_PC16
# CHECK-TRAP: lui $1, 32768 # encoding: [0x3c,0x01,0x80,0x00] # CHECK-TRAP: lui $1, 32768 # encoding: [0x3c,0x01,0x80,0x00]
# CHECK-TRAP: teq $24, $1, 6 # encoding: [0x03,0x01,0x01,0xb4] # CHECK-TRAP: teq $24, $1, 6 # encoding: [0x03,0x01,0x01,0xb4]
# CHECK-TRAP: $tmp1:
# CHECK-TRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12] # CHECK-TRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12]
div $25,$0 div $25,$0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
div $0,$9 div $0,$9
# CHECK-NOTRAP: div $zero, $zero, $9 # encoding: [0x00,0x09,0x00,0x1a] # CHECK-NOTRAP: div $zero, $zero, $9 # encoding: [0x00,0x09,0x00,0x1a]
# CHECK-TRAP: div $zero, $zero, $9 # encoding: [0x00,0x09,0x00,0x1a] # CHECK-TRAP: div $zero, $zero, $9 # encoding: [0x00,0x09,0x00,0x1a]
div $0,$0 div $0,$0
# CHECK-NOTRAP: div $zero, $zero, $zero # encoding: [0x00,0x00,0x00,0x1a] # CHECK-NOTRAP: div $zero, $zero, $zero # encoding: [0x00,0x00,0x00,0x1a]
# CHECK-TRAP: div $zero, $zero, $zero # encoding: [0x00,0x00,0x00,0x1a] # CHECK-TRAP: div $zero, $zero, $zero # encoding: [0x00,0x00,0x00,0x1a]
div $4,0 div $4,0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
div $0,0 div $0,0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
div $4,1 div $4,1
# CHECK-NOTRAP: move $4, $4 # encoding: [0x00,0x80,0x20,0x21] # CHECK-NOTRAP: move $4, $4 # encoding: [0x00,0x80,0x20,0x25]
# CHECK-TRAP: move $4, $4 # encoding: [0x00,0x80,0x20,0x21] # CHECK-TRAP: move $4, $4 # encoding: [0x00,0x80,0x20,0x25]
div $4,-1 div $4,-1
# CHECK-NOTRAP: neg $4, $4 # encoding: [0x00,0x04,0x20,0x22] # CHECK-NOTRAP: neg $4, $4 # encoding: [0x00,0x04,0x20,0x22]
# CHECK-TRAP: neg $4, $4 # encoding: [0x00,0x04,0x20,0x22] # CHECK-TRAP: neg $4, $4 # encoding: [0x00,0x04,0x20,0x22]
div $4,2 div $4,2
# CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x24,0x01,0x00,0x02] # CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x24,0x01,0x00,0x02]
# CHECK-NOTRAP: div $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1a] # CHECK-NOTRAP: div $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1a]
Show All 32 Lines
# CHECK-NOTRAP: div $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1a] # CHECK-NOTRAP: div $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1a]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] # CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: lui $1, 1 # encoding: [0x3c,0x01,0x00,0x01] # CHECK-TRAP: lui $1, 1 # encoding: [0x3c,0x01,0x00,0x01]
# CHECK-TRAP: ori $1, $1, 42405 # encoding: [0x34,0x21,0xa5,0xa5] # CHECK-TRAP: ori $1, $1, 42405 # encoding: [0x34,0x21,0xa5,0xa5]
# CHECK-TRAP: div $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1a] # CHECK-TRAP: div $zero, $4, $1 # encoding: [0x00,0x81,0x00,0x1a]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] # CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
div $4,$5,$6 div $4,$5,$6
# CHECK-NOTRAP: bnez $6, 8 # encoding: [0x14,0xc0,0x00,0x02] # CHECK-NOTRAP: bnez $6, $tmp4 # encoding: [0x14,0xc0,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: ($tmp4)-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: div $zero, $5, $6 # encoding: [0x00,0xa6,0x00,0x1a] # CHECK-NOTRAP: div $zero, $5, $6 # encoding: [0x00,0xa6,0x00,0x1a]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-NOTRAP: $tmp4:
# CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff] # CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-NOTRAP: bne $6, $1, 16 # encoding: [0x14,0xc1,0x00,0x04] # CHECK-NOTRAP: bne $6, $1, $tmp5 # encoding: [0x14,0xc1,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: ($tmp5)-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: lui $1, 32768 # encoding: [0x3c,0x01,0x80,0x00] # CHECK-NOTRAP: lui $1, 32768 # encoding: [0x3c,0x01,0x80,0x00]
# CHECK-NOTRAP: bne $5, $1, 8 # encoding: [0x14,0xa1,0x00,0x02] # CHECK-NOTRAP: bne $5, $1, $tmp5 # encoding: [0x14,0xa1,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: ($tmp5)-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: nop # encoding: [0x00,0x00,0x00,0x00] # CHECK-NOTRAP: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK-NOTRAP: break 6 # encoding: [0x00,0x06,0x00,0x0d] # CHECK-NOTRAP: break 6 # encoding: [0x00,0x06,0x00,0x0d]
# CHECK-NOTRAP: $tmp5:
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] # CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4] # CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4]
# CHECK-TRAP: div $zero, $5, $6 # encoding: [0x00,0xa6,0x00,0x1a] # CHECK-TRAP: div $zero, $5, $6 # encoding: [0x00,0xa6,0x00,0x1a]
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff] # CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0x24,0x01,0xff,0xff]
# CHECK-TRAP: bne $6, $1, 8 # encoding: [0x14,0xc1,0x00,0x02] # CHECK-TRAP: bne $6, $1, $tmp2 # encoding: [0x14,0xc1,A,A]
# CHECK-TRAP: # fixup A - offset: 0, value: ($tmp2)-4, kind: fixup_Mips_PC16
# CHECK-TRAP: lui $1, 32768 # encoding: [0x3c,0x01,0x80,0x00] # CHECK-TRAP: lui $1, 32768 # encoding: [0x3c,0x01,0x80,0x00]
# CHECK-TRAP: teq $5, $1, 6 # encoding: [0x00,0xa1,0x01,0xb4] # CHECK-TRAP: teq $5, $1, 6 # encoding: [0x00,0xa1,0x01,0xb4]
# CHECK-TRAP: $tmp2:
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] # CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
div $4,$5,$0 div $4,$5,$0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
div $4,$0,$0 div $4,$0,$0
# CHECK-NOTRAP: div $zero, $zero, $zero # encoding: [0x00,0x00,0x00,0x1a] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-TRAP: div $zero, $zero, $zero # encoding: [0x00,0x00,0x00,0x1a] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
div $0,$4,$5 div $0,$4,$5
# CHECK-NOTRAP: div $zero, $4, $5 # encoding: [0x00,0x85,0x00,0x1a] # CHECK-NOTRAP: div $zero, $4, $5 # encoding: [0x00,0x85,0x00,0x1a]
# CHECK-TRAP: div $zero, $4, $5 # encoding: [0x00,0x85,0x00,0x1a] # CHECK-TRAP: div $zero, $4, $5 # encoding: [0x00,0x85,0x00,0x1a]
div $4,$5,0 div $4,$5,0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
div $4,$0,0 div $4,$0,0
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
div $4,$5,1 div $4,$5,1
# CHECK-NOTRAP: move $4, $5 # encoding: [0x00,0xa0,0x20,0x21] # CHECK-NOTRAP: move $4, $5 # encoding: [0x00,0xa0,0x20,0x25]
# CHECK-TRAP: move $4, $5 # encoding: [0x00,0xa0,0x20,0x21] # CHECK-TRAP: move $4, $5 # encoding: [0x00,0xa0,0x20,0x25]
div $4,$5,-1 div $4,$5,-1
# CHECK-NOTRAP: neg $4, $5 # encoding: [0x00,0x05,0x20,0x22] # CHECK-NOTRAP: neg $4, $5 # encoding: [0x00,0x05,0x20,0x22]
# CHECK-TRAP: neg $4, $5 # encoding: [0x00,0x05,0x20,0x22] # CHECK-TRAP: neg $4, $5 # encoding: [0x00,0x05,0x20,0x22]
div $4,$5,2 div $4,$5,2
# CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x24,0x01,0x00,0x02] # CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x24,0x01,0x00,0x02]
# CHECK-NOTRAP: div $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1a] # CHECK-NOTRAP: div $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1a]
Show All 29 Lines# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
div $4,$5,0x1a5a5 div $4,$5,0x1a5a5
# CHECK-NOTRAP: lui $1, 1 # encoding: [0x3c,0x01,0x00,0x01] # CHECK-NOTRAP: lui $1, 1 # encoding: [0x3c,0x01,0x00,0x01]
# CHECK-NOTRAP: ori $1, $1, 42405 # encoding: [0x34,0x21,0xa5,0xa5] # CHECK-NOTRAP: ori $1, $1, 42405 # encoding: [0x34,0x21,0xa5,0xa5]
# CHECK-NOTRAP: div $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1a] # CHECK-NOTRAP: div $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1a]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] # CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
# CHECK-TRAP: lui $1, 1 # encoding: [0x3c,0x01,0x00,0x01] # CHECK-TRAP: lui $1, 1 # encoding: [0x3c,0x01,0x00,0x01]
# CHECK-TRAP: ori $1, $1, 42405 # encoding: [0x34,0x21,0xa5,0xa5] # CHECK-TRAP: ori $1, $1, 42405 # encoding: [0x34,0x21,0xa5,0xa5]
# CHECK-TRAP: div $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1a] # CHECK-TRAP: div $zero, $5, $1 # encoding: [0x00,0xa1,0x00,0x1a]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] # CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
No newline at end of file

llvm/trunk/test/MC/Mips/macro-divu-bad.s

# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r6 2>&1 | \ # RUN: not llvm-mc %s -arch=mips -mcpu=mips32r6 2>&1 | \
# RUN: FileCheck %s --check-prefix=R6 # RUN: FileCheck %s --check-prefix=R6
# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64r6 2>&1 | \ # RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64r6 2>&1 | \
# RUN: FileCheck %s --check-prefix=R6 # RUN: FileCheck %s --check-prefix=R6
# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 2>&1 | \ # RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 2>&1 | \
# RUN: FileCheck %s --check-prefix=NOT-R6 # RUN: FileCheck %s --check-prefix=NOT-R6
# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 2>&1 | \ # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 2>&1 | \
# RUN: FileCheck %s --check-prefix=NOT-R6 # RUN: FileCheck %s --check-prefix=NOT-R6
.text .text
divu $25, $11 divu $25, 11
# R6: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled # R6: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled
divu $25, $0 divu $25, $0
# NOT-R6: :[[@LINE-1]]:3: warning: division by zero # NOT-R6: :[[@LINE-1]]:3: warning: division by zero
divu $0,$0 divu $0,$0
# NOT-R6: :[[@LINE-1]]:3: warning: dividing zero by zero # NOT-R6: :[[@LINE-1]]:3: warning: dividing zero by zero

llvm/trunk/test/MC/Mips/macro-divu.s

# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 | \ # RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 | \
# RUN: FileCheck %s --check-prefix=CHECK-NOTRAP # RUN: FileCheck %s --check-prefix=CHECK-NOTRAP
# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 \ # RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 \
# RUN: -mattr=+use-tcc-in-div | FileCheck %s --check-prefix=CHECK-TRAP # RUN: -mattr=+use-tcc-in-div | FileCheck %s --check-prefix=CHECK-TRAP
divu $25,$11 divu $25,$11
# CHECK-NOTRAP: bnez $11, 8 # encoding: [0x15,0x60,0x00,0x02] # CHECK-NOTRAP: bnez $11, $tmp0 # encoding: [0x15,0x60,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: ($tmp0)-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: divu $zero, $25, $11 # encoding: [0x03,0x2b,0x00,0x1b] # CHECK-NOTRAP: divu $zero, $25, $11 # encoding: [0x03,0x2b,0x00,0x1b]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-NOTRAP: $tmp0:
# CHECK-NOTRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12] # CHECK-NOTRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12]
divu $24,$12 divu $24,$12
# CHECK-NOTRAP: bnez $12, 8 # encoding: [0x15,0x80,0x00,0x02] # CHECK-NOTRAP: bnez $12, $tmp1 # encoding: [0x15,0x80,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: ($tmp1)-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: divu $zero, $24, $12 # encoding: [0x03,0x0c,0x00,0x1b] # CHECK-NOTRAP: divu $zero, $24, $12 # encoding: [0x03,0x0c,0x00,0x1b]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-NOTRAP: $tmp1:
# CHECK-NOTRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12] # CHECK-NOTRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12]
divu $25,$0 divu $25,$0
# CHECK-NOTRAP: bnez $zero, 8 # encoding: [0x14,0x00,0x00,0x02]
# CHECK-NOTRAP: divu $zero, $25, $zero # encoding: [0x03,0x20,0x00,0x1b]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-NOTRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12]
divu $0,$9 divu $0,$9
# CHECK-NOTRAP: divu $zero, $zero, $9 # encoding: [0x00,0x09,0x00,0x1b] # CHECK-NOTRAP: divu $zero, $zero, $9 # encoding: [0x00,0x09,0x00,0x1b]
divu $0,$0 divu $0,$0
# CHECK-NOTRAP: divu $zero, $zero, $zero # encoding: [0x00,0x00,0x00,0x1b] # CHECK-NOTRAP: divu $zero, $zero, $zero # encoding: [0x00,0x00,0x00,0x1b]
divu $4,$5,$6 divu $4,$5,$6
# CHECK-NOTRAP: bnez $6, 8 # encoding: [0x14,0xc0,0x00,0x02] # CHECK-NOTRAP: bnez $6, $tmp2 # encoding: [0x14,0xc0,A,A]
# CHECK-NOTRAP: # fixup A - offset: 0, value: ($tmp2)-4, kind: fixup_Mips_PC16
# CHECK-NOTRAP: divu $zero, $5, $6 # encoding: [0x00,0xa6,0x00,0x1b] # CHECK-NOTRAP: divu $zero, $5, $6 # encoding: [0x00,0xa6,0x00,0x1b]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-NOTRAP: $tmp2:
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] # CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
divu $4,$5,$0 divu $4,$5,$0
# CHECK-NOTRAP: bnez $zero, 8 # encoding: [0x14,0x00,0x00,0x02]
# CHECK-NOTRAP: divu $zero, $5, $zero # encoding: [0x00,0xa0,0x00,0x1b]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
divu $4,$0,$0 divu $4,$0,$0
# CHECK-NOTRAP: bnez $zero, 8 # encoding: [0x14,0x00,0x00,0x02]
# CHECK-NOTRAP: divu $zero, $zero, $zero # encoding: [0x00,0x00,0x00,0x1b]
# CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK-NOTRAP: break 7 # encoding: [0x00,0x07,0x00,0x0d]
# CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
divu $0, $4, $5 divu $0, $4, $5
# CHECK-NOTRAP: divu $zero, $4, $5 # encoding: [0x00,0x85,0x00,0x1b] # CHECK-NOTRAP: divu $zero, $4, $5 # encoding: [0x00,0x85,0x00,0x1b]
divu $25, $11 divu $25, $11
# CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4] # CHECK-TRAP: teq $11, $zero, 7 # encoding: [0x01,0x60,0x01,0xf4]
# CHECK-TRAP: divu $zero, $25, $11 # encoding: [0x03,0x2b,0x00,0x1b] # CHECK-TRAP: divu $zero, $25, $11 # encoding: [0x03,0x2b,0x00,0x1b]
# CHECK-TRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12] # CHECK-TRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12]
divu $24,$12 divu $24,$12
# CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4] # CHECK-TRAP: teq $12, $zero, 7 # encoding: [0x01,0x80,0x01,0xf4]
# CHECK-TRAP: divu $zero, $24, $12 # encoding: [0x03,0x0c,0x00,0x1b] # CHECK-TRAP: divu $zero, $24, $12 # encoding: [0x03,0x0c,0x00,0x1b]
# CHECK-TRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12] # CHECK-TRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12]
divu $25,$0 divu $25,$0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
# CHECK-TRAP: divu $zero, $25, $zero # encoding: [0x03,0x20,0x00,0x1b]
# CHECK-TRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12]
divu $0,$9 divu $0,$9
# CHECK-TRAP: divu $zero, $zero, $9 # encoding: [0x00,0x09,0x00,0x1b] # CHECK-TRAP: divu $zero, $zero, $9 # encoding: [0x00,0x09,0x00,0x1b]
divu $0,$0 divu $0,$0
# CHECK-TRAP: divu $zero, $zero, $zero # encoding: [0x00,0x00,0x00,0x1b] # CHECK-TRAP: divu $zero, $zero, $zero # encoding: [0x00,0x00,0x00,0x1b]
divu $4,$5,$6 divu $4,$5,$6
# CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4] # CHECK-TRAP: teq $6, $zero, 7 # encoding: [0x00,0xc0,0x01,0xf4]
# CHECK-TRAP: divu $zero, $5, $6 # encoding: [0x00,0xa6,0x00,0x1b] # CHECK-TRAP: divu $zero, $5, $6 # encoding: [0x00,0xa6,0x00,0x1b]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] # CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
divu $4,$5,$0 divu $4,$5,$0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
# CHECK-TRAP: divu $zero, $5, $zero # encoding: [0x00,0xa0,0x00,0x1b]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
divu $4,$0,$0 divu $4,$0,$0
# CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4] # CHECK-TRAP: teq $zero, $zero, 7 # encoding: [0x00,0x00,0x01,0xf4]
# CHECK-TRAP: divu $zero, $zero, $zero # encoding: [0x00,0x00,0x00,0x1b] # CHECK-TRAP: divu $zero, $zero, $zero # encoding: [0x00,0x00,0x00,0x1b]
# CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] # CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
divu $0, $4, $5 divu $0, $4, $5
# CHECK-TRAP: divu $zero, $4, $5 # encoding: [0x00,0x85,0x00,0x1b] # CHECK-TRAP: divu $zero, $4, $5 # encoding: [0x00,0x85,0x00,0x1b]
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