[X86] Added INT1 instruction and fixed register usage.

[cray]

Summary

Documentation on INT1 can be found here:
http://www.rcollins.org/secrets/opcodes/ICEBP.html

[craig.topper]

I'd prefer not to use an undocumented instruction in codegen unless gcc or other major compiler does. Do you know if they do?

[cray]

I will work on searching through our bug reports to try and figure out what generated the undocumented instruction. We have been using this patch since llvm 3.2, so I can't remember what generated this instruction.

I don't agree with it being generated by the compiler in a normal circumstance either, but i would say that it should be available to the assembler, or an intrinsic.

[cray]

I can remove the int1 from the intrinsic. No other compiler will generate this, and it is normally generated by certain debuggers. I was able to find out that this was documented in the AMD opcode map.

I also found out that this instruction is supported by intel XED. https://github.com/intelxed/xed/blob/eb45a282de284ec2574e2b54460b37b7e587996c/datafiles/xed-isa.txt#L8238

[cray]

I just found out NASM generates this opcode for both x86 and x64. In the manual it refers to it as icebp, and says that it accepts the alias int1. I was thinking about renaming this instruction to icebp so that it is not generated by a typo in assembly. Also, the lit tests seem to match int $1 when the check line is int1

[cray]

Changed the mnemonic for INT1 to icebp, and removed it from codegen.

[craig.topper]

lib/Target/X86/X86InstrSystem.td

35

The instructions don't really modify ESP or EFLAGS. I would expect them to be restored when the interrupt handler returned. So from the perspective of the code with the INT insturction they aren't changed.

[cray]

lib/Target/X86/X86InstrSystem.td

35

The flags are pushed onto the stack, and if the INT causes an exception they will not be popped from the stack when the exception handler is called.
I can put together an example of this if you would like.

[cray]

lib/Target/X86/X86InstrSystem.td

35

I explained that poorly in my previous comment. The following is taken from the intel manual:

Flags Affected
The EFLAGS register is pushed onto the stack. The IF, TF, NT, AC, RF, and VM flags may be cleared, depending on
the mode of operation of the processor when the INT instruction is executed (see the “Operation” section). If the
interrupt uses a task gate, any flags may be set or cleared, controlled by the EFLAGS image in the new task’s TSS.

Also, in the case of windows SEH, the stack should be unwound, but the flags will not be restored.

[craig.topper]

LGTM

lib/Target/X86/X86InstrSystem.td

-//===-- X86InstrSystem.td - System Instructions ------------*- tablegen -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file describes the X86 instructions that are generally used in
-// privileged modes.  These are not typically used by the compiler, but are
-// supported for the assembler and disassembler.
-//
-//===----------------------------------------------------------------------===//
-
-let SchedRW = [WriteSystem] in {
-let Defs = [RAX, RDX] in
-  def RDTSC : I<0x31, RawFrm, (outs), (ins), "rdtsc", [(X86rdtsc)], IIC_RDTSC>,
-              TB;
-
-let Defs = [RAX, RCX, RDX] in
-  def RDTSCP : I<0x01, MRM_F9, (outs), (ins), "rdtscp", [(X86rdtscp)]>, TB;
-
-// CPU flow control instructions
-
-let mayLoad = 1, mayStore = 0, hasSideEffects = 1 in {
-  def TRAP    : I<0x0B, RawFrm, (outs), (ins), "ud2", [(trap)]>, TB;
-  def UD2B    : I<0xB9, RawFrm, (outs), (ins), "ud2b", []>, TB;
-}
-
-def HLT : I<0xF4, RawFrm, (outs), (ins), "hlt", [], IIC_HLT>;
-def RSM : I<0xAA, RawFrm, (outs), (ins), "rsm", [], IIC_RSM>, TB;
-
-// Interrupt and SysCall Instructions.
-let Uses = [EFLAGS] in
-  def INTO : I<0xce, RawFrm, (outs), (ins), "into", []>;
-def INT3 : I<0xcc, RawFrm, (outs), (ins), "int3",
-              [(int_x86_int (i8 3))], IIC_INT3>;
-} // SchedRW
-
-// The long form of "int $3" turns into int3 as a size optimization.
-// FIXME: This doesn't work because InstAlias can't match immediate constants.
-//def : InstAlias<"int\t$3", (INT3)>;
-
-let SchedRW = [WriteSystem] in {
-
-def INT : Ii8<0xcd, RawFrm, (outs), (ins u8imm:$trap), "int\t$trap",
-              [(int_x86_int imm:$trap)], IIC_INT>;
-
-
-def SYSCALL  : I<0x05, RawFrm, (outs), (ins), "syscall", [], IIC_SYSCALL>, TB;
-def SYSRET   : I<0x07, RawFrm, (outs), (ins), "sysret{l}", [], IIC_SYSCALL>, TB;
-def SYSRET64 :RI<0x07, RawFrm, (outs), (ins), "sysret{q}", [], IIC_SYSCALL>, TB,
-               Requires<[In64BitMode]>;
-
-def SYSENTER : I<0x34, RawFrm, (outs), (ins), "sysenter", [],
-                 IIC_SYS_ENTER_EXIT>, TB;
-
-def SYSEXIT   : I<0x35, RawFrm, (outs), (ins), "sysexit{l}", [],
-                 IIC_SYS_ENTER_EXIT>, TB;
-def SYSEXIT64 :RI<0x35, RawFrm, (outs), (ins), "sysexit{q}", [],
-                 IIC_SYS_ENTER_EXIT>, TB, Requires<[In64BitMode]>;
-} // SchedRW
-
-def : Pat<(debugtrap),
-          (INT3)>, Requires<[NotPS4]>;
-def : Pat<(debugtrap),
-          (INT (i8 0x41))>, Requires<[IsPS4]>;
-
-//===----------------------------------------------------------------------===//
-//  Input/Output Instructions.
-//
-let SchedRW = [WriteSystem] in {
-let Defs = [AL], Uses = [DX] in
-def IN8rr  : I<0xEC, RawFrm, (outs), (ins),
-               "in{b}\t{%dx, %al|al, dx}", [], IIC_IN_RR>;
-let Defs = [AX], Uses = [DX] in
-def IN16rr : I<0xED, RawFrm, (outs), (ins),
-               "in{w}\t{%dx, %ax|ax, dx}", [], IIC_IN_RR>,  OpSize16;
-let Defs = [EAX], Uses = [DX] in
-def IN32rr : I<0xED, RawFrm, (outs), (ins),
-               "in{l}\t{%dx, %eax|eax, dx}", [], IIC_IN_RR>, OpSize32;
-
-let Defs = [AL] in
-def IN8ri  : Ii8<0xE4, RawFrm, (outs), (ins u8imm:$port),
-                  "in{b}\t{$port, %al|al, $port}", [], IIC_IN_RI>;
-let Defs = [AX] in
-def IN16ri : Ii8<0xE5, RawFrm, (outs), (ins u8imm:$port),
-                  "in{w}\t{$port, %ax|ax, $port}", [], IIC_IN_RI>, OpSize16;
-let Defs = [EAX] in
-def IN32ri : Ii8<0xE5, RawFrm, (outs), (ins u8imm:$port),
-                  "in{l}\t{$port, %eax|eax, $port}", [], IIC_IN_RI>, OpSize32;
-
-let Uses = [DX, AL] in
-def OUT8rr  : I<0xEE, RawFrm, (outs), (ins),
-                "out{b}\t{%al, %dx|dx, al}", [], IIC_OUT_RR>;
-let Uses = [DX, AX] in
-def OUT16rr : I<0xEF, RawFrm, (outs), (ins),
-                "out{w}\t{%ax, %dx|dx, ax}", [], IIC_OUT_RR>, OpSize16;
-let Uses = [DX, EAX] in
-def OUT32rr : I<0xEF, RawFrm, (outs), (ins),
-                "out{l}\t{%eax, %dx|dx, eax}", [], IIC_OUT_RR>, OpSize32;
-
-let Uses = [AL] in
-def OUT8ir  : Ii8<0xE6, RawFrm, (outs), (ins u8imm:$port),
-                   "out{b}\t{%al, $port|$port, al}", [], IIC_OUT_IR>;
-let Uses = [AX] in
-def OUT16ir : Ii8<0xE7, RawFrm, (outs), (ins u8imm:$port),
-                   "out{w}\t{%ax, $port|$port, ax}", [], IIC_OUT_IR>, OpSize16;
-let Uses = [EAX] in
-def OUT32ir : Ii8<0xE7, RawFrm, (outs), (ins u8imm:$port),
-                  "out{l}\t{%eax, $port|$port, eax}", [], IIC_OUT_IR>, OpSize32;
-
-} // SchedRW
-
-//===----------------------------------------------------------------------===//
-// Moves to and from debug registers
-
-let SchedRW = [WriteSystem] in {
-def MOV32rd : I<0x21, MRMDestReg, (outs GR32:$dst), (ins DEBUG_REG:$src),
-                "mov{l}\t{$src, $dst|$dst, $src}", [], IIC_MOV_REG_DR>, TB,
-                Requires<[Not64BitMode]>;
-def MOV64rd : I<0x21, MRMDestReg, (outs GR64:$dst), (ins DEBUG_REG:$src),
-                "mov{q}\t{$src, $dst|$dst, $src}", [], IIC_MOV_REG_DR>, TB,
-                Requires<[In64BitMode]>;
-
-def MOV32dr : I<0x23, MRMSrcReg, (outs DEBUG_REG:$dst), (ins GR32:$src),
-                "mov{l}\t{$src, $dst|$dst, $src}", [], IIC_MOV_DR_REG>, TB,
-                Requires<[Not64BitMode]>;
-def MOV64dr : I<0x23, MRMSrcReg, (outs DEBUG_REG:$dst), (ins GR64:$src),
-                "mov{q}\t{$src, $dst|$dst, $src}", [], IIC_MOV_DR_REG>, TB,
-                Requires<[In64BitMode]>;
-} // SchedRW
-
-//===----------------------------------------------------------------------===//
-// Moves to and from control registers
-
-let SchedRW = [WriteSystem] in {
-def MOV32rc : I<0x20, MRMDestReg, (outs GR32:$dst), (ins CONTROL_REG:$src),
-                "mov{l}\t{$src, $dst|$dst, $src}", [], IIC_MOV_REG_CR>, TB,
-                Requires<[Not64BitMode]>;
-def MOV64rc : I<0x20, MRMDestReg, (outs GR64:$dst), (ins CONTROL_REG:$src),
-                "mov{q}\t{$src, $dst|$dst, $src}", [], IIC_MOV_REG_CR>, TB,
-                Requires<[In64BitMode]>;
-
-def MOV32cr : I<0x22, MRMSrcReg, (outs CONTROL_REG:$dst), (ins GR32:$src),
-                "mov{l}\t{$src, $dst|$dst, $src}", [], IIC_MOV_CR_REG>, TB,
-                Requires<[Not64BitMode]>;
-def MOV64cr : I<0x22, MRMSrcReg, (outs CONTROL_REG:$dst), (ins GR64:$src),
-                "mov{q}\t{$src, $dst|$dst, $src}", [], IIC_MOV_CR_REG>, TB,
-                Requires<[In64BitMode]>;
-} // SchedRW
-
-//===----------------------------------------------------------------------===//
-// Segment override instruction prefixes
-
-def CS_PREFIX : I<0x2E, RawFrm, (outs), (ins), "cs", []>;
-def SS_PREFIX : I<0x36, RawFrm, (outs), (ins), "ss", []>;
-def DS_PREFIX : I<0x3E, RawFrm, (outs), (ins), "ds", []>;
-def ES_PREFIX : I<0x26, RawFrm, (outs), (ins), "es", []>;
-def FS_PREFIX : I<0x64, RawFrm, (outs), (ins), "fs", []>;
-def GS_PREFIX : I<0x65, RawFrm, (outs), (ins), "gs", []>;
-
-
-//===----------------------------------------------------------------------===//
-// Moves to and from segment registers.
-//
-
-let SchedRW = [WriteMove] in {
-def MOV16rs : I<0x8C, MRMDestReg, (outs GR16:$dst), (ins SEGMENT_REG:$src),
-                "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV_REG_SR>, OpSize16;
-def MOV32rs : I<0x8C, MRMDestReg, (outs GR32:$dst), (ins SEGMENT_REG:$src),
-                "mov{l}\t{$src, $dst|$dst, $src}", [], IIC_MOV_REG_SR>, OpSize32;
-def MOV64rs : RI<0x8C, MRMDestReg, (outs GR64:$dst), (ins SEGMENT_REG:$src),
-                 "mov{q}\t{$src, $dst|$dst, $src}", [], IIC_MOV_REG_SR>;
-
-def MOV16ms : I<0x8C, MRMDestMem, (outs), (ins i16mem:$dst, SEGMENT_REG:$src),
-                "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV_MEM_SR>, OpSize16;
-def MOV32ms : I<0x8C, MRMDestMem, (outs), (ins i32mem:$dst, SEGMENT_REG:$src),
-                "mov{l}\t{$src, $dst|$dst, $src}", [], IIC_MOV_MEM_SR>, OpSize32;
-def MOV64ms : RI<0x8C, MRMDestMem, (outs), (ins i64mem:$dst, SEGMENT_REG:$src),
-                 "mov{q}\t{$src, $dst|$dst, $src}", [], IIC_MOV_MEM_SR>;
-
-def MOV16sr : I<0x8E, MRMSrcReg, (outs SEGMENT_REG:$dst), (ins GR16:$src),
-                "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV_SR_REG>, OpSize16;
-def MOV32sr : I<0x8E, MRMSrcReg, (outs SEGMENT_REG:$dst), (ins GR32:$src),
-                "mov{l}\t{$src, $dst|$dst, $src}", [], IIC_MOV_SR_REG>, OpSize32;
-def MOV64sr : RI<0x8E, MRMSrcReg, (outs SEGMENT_REG:$dst), (ins GR64:$src),
-                 "mov{q}\t{$src, $dst|$dst, $src}", [], IIC_MOV_SR_REG>;
-
-def MOV16sm : I<0x8E, MRMSrcMem, (outs SEGMENT_REG:$dst), (ins i16mem:$src),
-                "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV_SR_MEM>, OpSize16;
-def MOV32sm : I<0x8E, MRMSrcMem, (outs SEGMENT_REG:$dst), (ins i32mem:$src),
-                "mov{l}\t{$src, $dst|$dst, $src}", [], IIC_MOV_SR_MEM>, OpSize32;
-def MOV64sm : RI<0x8E, MRMSrcMem, (outs SEGMENT_REG:$dst), (ins i64mem:$src),
-                 "mov{q}\t{$src, $dst|$dst, $src}", [], IIC_MOV_SR_MEM>;
-} // SchedRW
-
-//===----------------------------------------------------------------------===//
-// Segmentation support instructions.
-
-let SchedRW = [WriteSystem] in {
-def SWAPGS : I<0x01, MRM_F8, (outs), (ins), "swapgs", [], IIC_SWAPGS>, TB;
-
-def LAR16rm : I<0x02, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src),
-                "lar{w}\t{$src, $dst|$dst, $src}", [], IIC_LAR_RM>, TB,
-                OpSize16;
-def LAR16rr : I<0x02, MRMSrcReg, (outs GR16:$dst), (ins GR16:$src),
-                "lar{w}\t{$src, $dst|$dst, $src}", [], IIC_LAR_RR>, TB,
-                OpSize16;
-
-// i16mem operand in LAR32rm and GR32 operand in LAR32rr is not a typo.
-def LAR32rm : I<0x02, MRMSrcMem, (outs GR32:$dst), (ins i16mem:$src),
-                "lar{l}\t{$src, $dst|$dst, $src}", [], IIC_LAR_RM>, TB,
-                OpSize32;
-def LAR32rr : I<0x02, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src),
-                "lar{l}\t{$src, $dst|$dst, $src}", [], IIC_LAR_RR>, TB,
-                OpSize32;
-// i16mem operand in LAR64rm and GR32 operand in LAR32rr is not a typo.
-def LAR64rm : RI<0x02, MRMSrcMem, (outs GR64:$dst), (ins i16mem:$src),
-                 "lar{q}\t{$src, $dst|$dst, $src}", [], IIC_LAR_RM>, TB;
-def LAR64rr : RI<0x02, MRMSrcReg, (outs GR64:$dst), (ins GR32:$src),
-                 "lar{q}\t{$src, $dst|$dst, $src}", [], IIC_LAR_RR>, TB;
-
-def LSL16rm : I<0x03, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src),
-                "lsl{w}\t{$src, $dst|$dst, $src}", [], IIC_LSL_RM>, TB,
-                OpSize16;
-def LSL16rr : I<0x03, MRMSrcReg, (outs GR16:$dst), (ins GR16:$src),
-                "lsl{w}\t{$src, $dst|$dst, $src}", [], IIC_LSL_RR>, TB,
-                OpSize16;
-def LSL32rm : I<0x03, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
-                "lsl{l}\t{$src, $dst|$dst, $src}", [], IIC_LSL_RM>, TB,
-                OpSize32;
-def LSL32rr : I<0x03, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src),
-                "lsl{l}\t{$src, $dst|$dst, $src}", [], IIC_LSL_RR>, TB,
-                OpSize32;
-def LSL64rm : RI<0x03, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src),
-                 "lsl{q}\t{$src, $dst|$dst, $src}", [], IIC_LSL_RM>, TB;
-def LSL64rr : RI<0x03, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src),
-                 "lsl{q}\t{$src, $dst|$dst, $src}", [], IIC_LSL_RR>, TB;
-
-def INVLPG : I<0x01, MRM7m, (outs), (ins i8mem:$addr), "invlpg\t$addr",
-               [], IIC_INVLPG>, TB;
-
-def STR16r : I<0x00, MRM1r, (outs GR16:$dst), (ins),
-               "str{w}\t$dst", [], IIC_STR>, TB, OpSize16;
-def STR32r : I<0x00, MRM1r, (outs GR32:$dst), (ins),
-               "str{l}\t$dst", [], IIC_STR>, TB, OpSize32;
-def STR64r : RI<0x00, MRM1r, (outs GR64:$dst), (ins),
-                "str{q}\t$dst", [], IIC_STR>, TB;
-def STRm   : I<0x00, MRM1m, (outs), (ins i16mem:$dst),
-               "str{w}\t$dst", [], IIC_STR>, TB;
-
-def LTRr : I<0x00, MRM3r, (outs), (ins GR16:$src),
-             "ltr{w}\t$src", [], IIC_LTR>, TB;
-def LTRm : I<0x00, MRM3m, (outs), (ins i16mem:$src),
-             "ltr{w}\t$src", [], IIC_LTR>, TB;
-
-def PUSHCS16 : I<0x0E, RawFrm, (outs), (ins),
-                 "push{w}\t{%cs|cs}", [], IIC_PUSH_SR>,
-                 OpSize16, Requires<[Not64BitMode]>;
-def PUSHCS32 : I<0x0E, RawFrm, (outs), (ins),
-                 "push{l}\t{%cs|cs}", [], IIC_PUSH_CS>,
-                 OpSize32, Requires<[Not64BitMode]>;
-def PUSHSS16 : I<0x16, RawFrm, (outs), (ins),
-                 "push{w}\t{%ss|ss}", [], IIC_PUSH_SR>,
-                 OpSize16, Requires<[Not64BitMode]>;
-def PUSHSS32 : I<0x16, RawFrm, (outs), (ins),
-                 "push{l}\t{%ss|ss}", [], IIC_PUSH_SR>,
-                 OpSize32, Requires<[Not64BitMode]>;
-def PUSHDS16 : I<0x1E, RawFrm, (outs), (ins),
-                 "push{w}\t{%ds|ds}", [], IIC_PUSH_SR>,
-                 OpSize16, Requires<[Not64BitMode]>;
-def PUSHDS32 : I<0x1E, RawFrm, (outs), (ins),
-                 "push{l}\t{%ds|ds}", [], IIC_PUSH_SR>,
-                 OpSize32, Requires<[Not64BitMode]>;
-def PUSHES16 : I<0x06, RawFrm, (outs), (ins),
-                 "push{w}\t{%es|es}", [], IIC_PUSH_SR>,
-                 OpSize16, Requires<[Not64BitMode]>;
-def PUSHES32 : I<0x06, RawFrm, (outs), (ins),
-                 "push{l}\t{%es|es}", [], IIC_PUSH_SR>,
-                 OpSize32, Requires<[Not64BitMode]>;
-def PUSHFS16 : I<0xa0, RawFrm, (outs), (ins),
-                 "push{w}\t{%fs|fs}", [], IIC_PUSH_SR>, OpSize16, TB;
-def PUSHFS32 : I<0xa0, RawFrm, (outs), (ins),
-                 "push{l}\t{%fs|fs}", [], IIC_PUSH_SR>, TB,
-               OpSize32, Requires<[Not64BitMode]>;
-def PUSHGS16 : I<0xa8, RawFrm, (outs), (ins),
-                 "push{w}\t{%gs|gs}", [], IIC_PUSH_SR>, OpSize16, TB;
-def PUSHGS32 : I<0xa8, RawFrm, (outs), (ins),
-                 "push{l}\t{%gs|gs}", [], IIC_PUSH_SR>, TB,
-               OpSize32, Requires<[Not64BitMode]>;
-def PUSHFS64 : I<0xa0, RawFrm, (outs), (ins),
-                 "push{q}\t{%fs|fs}", [], IIC_PUSH_SR>, TB,
-               OpSize32, Requires<[In64BitMode]>;
-def PUSHGS64 : I<0xa8, RawFrm, (outs), (ins),
-                 "push{q}\t{%gs|gs}", [], IIC_PUSH_SR>, TB,
-               OpSize32, Requires<[In64BitMode]>;
-
-// No "pop cs" instruction.
-def POPSS16 : I<0x17, RawFrm, (outs), (ins),
-                "pop{w}\t{%ss|ss}", [], IIC_POP_SR_SS>,
-              OpSize16, Requires<[Not64BitMode]>;
-def POPSS32 : I<0x17, RawFrm, (outs), (ins),
-                "pop{l}\t{%ss|ss}", [], IIC_POP_SR_SS>,
-              OpSize32, Requires<[Not64BitMode]>;
-
-def POPDS16 : I<0x1F, RawFrm, (outs), (ins),
-                "pop{w}\t{%ds|ds}", [], IIC_POP_SR>,
-              OpSize16, Requires<[Not64BitMode]>;
-def POPDS32 : I<0x1F, RawFrm, (outs), (ins),
-                "pop{l}\t{%ds|ds}", [], IIC_POP_SR>,
-              OpSize32, Requires<[Not64BitMode]>;
-
-def POPES16 : I<0x07, RawFrm, (outs), (ins),
-                "pop{w}\t{%es|es}", [], IIC_POP_SR>,
-              OpSize16, Requires<[Not64BitMode]>;
-def POPES32 : I<0x07, RawFrm, (outs), (ins),
-                "pop{l}\t{%es|es}", [], IIC_POP_SR>,
-              OpSize32, Requires<[Not64BitMode]>;
-
-def POPFS16 : I<0xa1, RawFrm, (outs), (ins),
-                "pop{w}\t{%fs|fs}", [], IIC_POP_SR>, OpSize16, TB;
-def POPFS32 : I<0xa1, RawFrm, (outs), (ins),
-                "pop{l}\t{%fs|fs}", [], IIC_POP_SR>, TB,
-              OpSize32, Requires<[Not64BitMode]>;
-def POPFS64 : I<0xa1, RawFrm, (outs), (ins),
-                "pop{q}\t{%fs|fs}", [], IIC_POP_SR>, TB,
-              OpSize32, Requires<[In64BitMode]>;
-
-def POPGS16 : I<0xa9, RawFrm, (outs), (ins),
-                "pop{w}\t{%gs|gs}", [], IIC_POP_SR>, OpSize16, TB;
-def POPGS32 : I<0xa9, RawFrm, (outs), (ins),
-                "pop{l}\t{%gs|gs}", [], IIC_POP_SR>, TB,
-              OpSize32, Requires<[Not64BitMode]>;
-def POPGS64 : I<0xa9, RawFrm, (outs), (ins),
-                "pop{q}\t{%gs|gs}", [], IIC_POP_SR>, TB,
-              OpSize32, Requires<[In64BitMode]>;
-
-
-def LDS16rm : I<0xc5, MRMSrcMem, (outs GR16:$dst), (ins opaque32mem:$src),
-                "lds{w}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, OpSize16,
-                Requires<[Not64BitMode]>;
-def LDS32rm : I<0xc5, MRMSrcMem, (outs GR32:$dst), (ins opaque48mem:$src),
-                "lds{l}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, OpSize32,
-                Requires<[Not64BitMode]>;
-
-def LSS16rm : I<0xb2, MRMSrcMem, (outs GR16:$dst), (ins opaque32mem:$src),
-                "lss{w}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, TB, OpSize16;
-def LSS32rm : I<0xb2, MRMSrcMem, (outs GR32:$dst), (ins opaque48mem:$src),
-                "lss{l}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, TB, OpSize32;
-def LSS64rm : RI<0xb2, MRMSrcMem, (outs GR64:$dst), (ins opaque80mem:$src),
-                 "lss{q}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, TB;
-
-def LES16rm : I<0xc4, MRMSrcMem, (outs GR16:$dst), (ins opaque32mem:$src),
-                "les{w}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, OpSize16,
-                Requires<[Not64BitMode]>;
-def LES32rm : I<0xc4, MRMSrcMem, (outs GR32:$dst), (ins opaque48mem:$src),
-                "les{l}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, OpSize32,
-                Requires<[Not64BitMode]>;
-
-def LFS16rm : I<0xb4, MRMSrcMem, (outs GR16:$dst), (ins opaque32mem:$src),
-                "lfs{w}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, TB, OpSize16;
-def LFS32rm : I<0xb4, MRMSrcMem, (outs GR32:$dst), (ins opaque48mem:$src),
-                "lfs{l}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, TB, OpSize32;
-def LFS64rm : RI<0xb4, MRMSrcMem, (outs GR64:$dst), (ins opaque80mem:$src),
-                 "lfs{q}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, TB;
-
-def LGS16rm : I<0xb5, MRMSrcMem, (outs GR16:$dst), (ins opaque32mem:$src),
-                "lgs{w}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, TB, OpSize16;
-def LGS32rm : I<0xb5, MRMSrcMem, (outs GR32:$dst), (ins opaque48mem:$src),
-                "lgs{l}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, TB, OpSize32;
-
-def LGS64rm : RI<0xb5, MRMSrcMem, (outs GR64:$dst), (ins opaque80mem:$src),
-                 "lgs{q}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, TB;
-
-
-def VERRr : I<0x00, MRM4r, (outs), (ins GR16:$seg),
-              "verr\t$seg", [], IIC_VERR>, TB;
-def VERRm : I<0x00, MRM4m, (outs), (ins i16mem:$seg),
-              "verr\t$seg", [], IIC_VERR>, TB;
-def VERWr : I<0x00, MRM5r, (outs), (ins GR16:$seg),
-              "verw\t$seg", [], IIC_VERW_MEM>, TB;
-def VERWm : I<0x00, MRM5m, (outs), (ins i16mem:$seg),
-              "verw\t$seg", [], IIC_VERW_REG>, TB;
-} // SchedRW
-
-//===----------------------------------------------------------------------===//
-// Descriptor-table support instructions
-
-let SchedRW = [WriteSystem] in {
-def SGDT16m : I<0x01, MRM0m, (outs), (ins opaque48mem:$dst),
-              "sgdt{w}\t$dst", [], IIC_SGDT>, TB, OpSize16, Requires<[Not64BitMode]>;
-def SGDT32m : I<0x01, MRM0m, (outs), (ins opaque48mem:$dst),
-              "sgdt{l}\t$dst", [], IIC_SGDT>, OpSize32, TB, Requires <[Not64BitMode]>;
-def SGDT64m : I<0x01, MRM0m, (outs), (ins opaque80mem:$dst),
-              "sgdt{q}\t$dst", [], IIC_SGDT>, TB, Requires <[In64BitMode]>;
-def SIDT16m : I<0x01, MRM1m, (outs), (ins opaque48mem:$dst),
-              "sidt{w}\t$dst", [], IIC_SIDT>, TB, OpSize16, Requires<[Not64BitMode]>;
-def SIDT32m : I<0x01, MRM1m, (outs), (ins opaque48mem:$dst),
-              "sidt{l}\t$dst", []>, OpSize32, TB, Requires <[Not64BitMode]>;
-def SIDT64m : I<0x01, MRM1m, (outs), (ins opaque80mem:$dst),
-              "sidt{q}\t$dst", []>, TB, Requires <[In64BitMode]>;
-def SLDT16r : I<0x00, MRM0r, (outs GR16:$dst), (ins),
-                "sldt{w}\t$dst", [], IIC_SLDT>, TB, OpSize16;
-def SLDT16m : I<0x00, MRM0m, (outs), (ins i16mem:$dst),
-                "sldt{w}\t$dst", [], IIC_SLDT>, TB;
-def SLDT32r : I<0x00, MRM0r, (outs GR32:$dst), (ins),
-                "sldt{l}\t$dst", [], IIC_SLDT>, OpSize32, TB;
-
-// LLDT is not interpreted specially in 64-bit mode because there is no sign
-//   extension.
-def SLDT64r : RI<0x00, MRM0r, (outs GR64:$dst), (ins),
-                 "sldt{q}\t$dst", [], IIC_SLDT>, TB;
-def SLDT64m : RI<0x00, MRM0m, (outs), (ins i16mem:$dst),
-                 "sldt{q}\t$dst", [], IIC_SLDT>, TB;
-
-def LGDT16m : I<0x01, MRM2m, (outs), (ins opaque48mem:$src),
-              "lgdt{w}\t$src", [], IIC_LGDT>, TB, OpSize16, Requires<[Not64BitMode]>;
-def LGDT32m : I<0x01, MRM2m, (outs), (ins opaque48mem:$src),
-              "lgdt{l}\t$src", [], IIC_LGDT>, OpSize32, TB, Requires<[Not64BitMode]>;
-def LGDT64m : I<0x01, MRM2m, (outs), (ins opaque80mem:$src),
-              "lgdt{q}\t$src", [], IIC_LGDT>, TB, Requires<[In64BitMode]>;
-def LIDT16m : I<0x01, MRM3m, (outs), (ins opaque48mem:$src),
-              "lidt{w}\t$src", [], IIC_LIDT>, TB, OpSize16, Requires<[Not64BitMode]>;
-def LIDT32m : I<0x01, MRM3m, (outs), (ins opaque48mem:$src),
-              "lidt{l}\t$src", [], IIC_LIDT>, OpSize32, TB, Requires<[Not64BitMode]>;
-def LIDT64m : I<0x01, MRM3m, (outs), (ins opaque80mem:$src),
-              "lidt{q}\t$src", [], IIC_LIDT>, TB, Requires<[In64BitMode]>;
-def LLDT16r : I<0x00, MRM2r, (outs), (ins GR16:$src),
-                "lldt{w}\t$src", [], IIC_LLDT_REG>, TB;
-def LLDT16m : I<0x00, MRM2m, (outs), (ins i16mem:$src),
-                "lldt{w}\t$src", [], IIC_LLDT_MEM>, TB;
-} // SchedRW
-
-//===----------------------------------------------------------------------===//
-// Specialized register support
-let SchedRW = [WriteSystem] in {
-let Uses = [EAX, ECX, EDX] in
-def WRMSR : I<0x30, RawFrm, (outs), (ins), "wrmsr", [], IIC_WRMSR>, TB;
-let Defs = [EAX, EDX], Uses = [ECX] in
-def RDMSR : I<0x32, RawFrm, (outs), (ins), "rdmsr", [], IIC_RDMSR>, TB;
-
-let Defs = [RAX, RDX], Uses = [ECX] in
-  def RDPMC : I<0x33, RawFrm, (outs), (ins), "rdpmc", [(X86rdpmc)], IIC_RDPMC>,
-              TB;
-
-def SMSW16r : I<0x01, MRM4r, (outs GR16:$dst), (ins),
-                "smsw{w}\t$dst", [], IIC_SMSW>, OpSize16, TB;
-def SMSW32r : I<0x01, MRM4r, (outs GR32:$dst), (ins),
-                "smsw{l}\t$dst", [], IIC_SMSW>, OpSize32, TB;
-// no m form encodable; use SMSW16m
-def SMSW64r : RI<0x01, MRM4r, (outs GR64:$dst), (ins),
-                 "smsw{q}\t$dst", [], IIC_SMSW>, TB;
-
-// For memory operands, there is only a 16-bit form
-def SMSW16m : I<0x01, MRM4m, (outs), (ins i16mem:$dst),
-                "smsw{w}\t$dst", [], IIC_SMSW>, TB;
-
-def LMSW16r : I<0x01, MRM6r, (outs), (ins GR16:$src),
-                "lmsw{w}\t$src", [], IIC_LMSW_MEM>, TB;
-def LMSW16m : I<0x01, MRM6m, (outs), (ins i16mem:$src),
-                "lmsw{w}\t$src", [], IIC_LMSW_REG>, TB;
-
-let Defs = [EAX, EBX, ECX, EDX], Uses = [EAX, ECX] in
-  def CPUID : I<0xA2, RawFrm, (outs), (ins), "cpuid", [], IIC_CPUID>, TB;
-} // SchedRW
-
-//===----------------------------------------------------------------------===//
-// Cache instructions
-let SchedRW = [WriteSystem] in {
-def INVD : I<0x08, RawFrm, (outs), (ins), "invd", [], IIC_INVD>, TB;
-def WBINVD : I<0x09, RawFrm, (outs), (ins), "wbinvd", [], IIC_INVD>, TB;
-} // SchedRW
-
-//===----------------------------------------------------------------------===//
-// XSAVE instructions
-let SchedRW = [WriteSystem] in {
-let Predicates = [HasXSAVE] in {
-let Defs = [EDX, EAX], Uses = [ECX] in
-  def XGETBV : I<0x01, MRM_D0, (outs), (ins), "xgetbv", []>, TB;
-
-let Uses = [EDX, EAX, ECX] in
-  def XSETBV : I<0x01, MRM_D1, (outs), (ins), 
-                "xsetbv", 
-                [(int_x86_xsetbv ECX, EDX, EAX)]>, TB;
-
-} // HasXSAVE
-
-let Uses = [EDX, EAX] in {
-let Predicates = [HasXSAVE] in {
-  def XSAVE : I<0xAE, MRM4m, (outs), (ins opaque512mem:$dst),
-                "xsave\t$dst",
-                [(int_x86_xsave addr:$dst, EDX, EAX)]>, TB;
-  def XSAVE64 : RI<0xAE, MRM4m, (outs), (ins opaque512mem:$dst),
-                   "xsave64\t$dst",
-                   [(int_x86_xsave64 addr:$dst, EDX, EAX)]>, TB, Requires<[In64BitMode]>;
-  def XRSTOR : I<0xAE, MRM5m, (outs), (ins opaque512mem:$dst),
-                 "xrstor\t$dst",
-                 [(int_x86_xrstor addr:$dst, EDX, EAX)]>, TB;
-  def XRSTOR64 : RI<0xAE, MRM5m, (outs), (ins opaque512mem:$dst),
-                    "xrstor64\t$dst",
-                    [(int_x86_xrstor64 addr:$dst, EDX, EAX)]>, TB, Requires<[In64BitMode]>;
-}
-let Predicates = [HasXSAVEOPT] in {
-  def XSAVEOPT : I<0xAE, MRM6m, (outs), (ins opaque512mem:$dst),
-                   "xsaveopt\t$dst",
-                   [(int_x86_xsaveopt addr:$dst, EDX, EAX)]>, PS;
-  def XSAVEOPT64 : RI<0xAE, MRM6m, (outs), (ins opaque512mem:$dst),
-                      "xsaveopt64\t$dst",
-                      [(int_x86_xsaveopt64 addr:$dst, EDX, EAX)]>, PS, Requires<[In64BitMode]>;
-}
-let Predicates = [HasXSAVEC] in {
-  def XSAVEC : I<0xC7, MRM4m, (outs), (ins opaque512mem:$dst),
-                 "xsavec\t$dst",
-                 [(int_x86_xsavec addr:$dst, EDX, EAX)]>, TB;
-  def XSAVEC64 : RI<0xC7, MRM4m, (outs), (ins opaque512mem:$dst),
-                   "xsavec64\t$dst",
-                   [(int_x86_xsavec64 addr:$dst, EDX, EAX)]>, TB, Requires<[In64BitMode]>;
-}
-let Predicates = [HasXSAVES] in {
-  def XSAVES : I<0xC7, MRM5m, (outs), (ins opaque512mem:$dst),
-                 "xsaves\t$dst",
-                 [(int_x86_xsaves addr:$dst, EDX, EAX)]>, TB;
-  def XSAVES64 : RI<0xC7, MRM5m, (outs), (ins opaque512mem:$dst),
-                    "xsaves64\t$dst",
-                    [(int_x86_xsaves64 addr:$dst, EDX, EAX)]>, TB, Requires<[In64BitMode]>;
-  def XRSTORS : I<0xC7, MRM3m, (outs), (ins opaque512mem:$dst),
-                  "xrstors\t$dst",
-                  [(int_x86_xrstors addr:$dst, EDX, EAX)]>, TB;
-  def XRSTORS64 : RI<0xC7, MRM3m, (outs), (ins opaque512mem:$dst),
-                     "xrstors64\t$dst",
-                     [(int_x86_xrstors64 addr:$dst, EDX, EAX)]>, TB, Requires<[In64BitMode]>;
-}
-} // Uses
-} // SchedRW
-
-//===----------------------------------------------------------------------===//
-// VIA PadLock crypto instructions
-let Defs = [RAX, RDI], Uses = [RDX, RDI] in
-  def XSTORE : I<0xa7, MRM_C0, (outs), (ins), "xstore", []>, TB;
-
-def : InstAlias<"xstorerng", (XSTORE)>;
-
-let Defs = [RSI, RDI], Uses = [RBX, RDX, RSI, RDI] in {
-  def XCRYPTECB : I<0xa7, MRM_C8, (outs), (ins), "xcryptecb", []>, TB;
-  def XCRYPTCBC : I<0xa7, MRM_D0, (outs), (ins), "xcryptcbc", []>, TB;
-  def XCRYPTCTR : I<0xa7, MRM_D8, (outs), (ins), "xcryptctr", []>, TB;
-  def XCRYPTCFB : I<0xa7, MRM_E0, (outs), (ins), "xcryptcfb", []>, TB;
-  def XCRYPTOFB : I<0xa7, MRM_E8, (outs), (ins), "xcryptofb", []>, TB;
-}
-
-let Defs = [RAX, RSI, RDI], Uses = [RAX, RSI, RDI] in {
-  def XSHA1 : I<0xa6, MRM_C8, (outs), (ins), "xsha1", []>, TB;
-  def XSHA256 : I<0xa6, MRM_D0, (outs), (ins), "xsha256", []>, TB;
-}
-let Defs = [RAX, RDX, RSI], Uses = [RAX, RSI] in
-  def MONTMUL : I<0xa6, MRM_C0, (outs), (ins), "montmul", []>, TB;
-//==-----------------------------------------------------------------------===//
-// PKU  - enable protection key
-let usesCustomInserter = 1 in {
-  def WRPKRU : PseudoI<(outs), (ins GR32:$src),
-                [(int_x86_wrpkru GR32:$src)]>;
-  def RDPKRU : PseudoI<(outs GR32:$dst), (ins),
-                [(set GR32:$dst, (int_x86_rdpkru))]>;
-}
-
-let Defs = [EAX, EDX], Uses = [ECX] in
-  def RDPKRUr : I<0x01, MRM_EE, (outs), (ins), "rdpkru", []>, TB;
-let Uses = [EAX, ECX, EDX] in
-  def WRPKRUr : I<0x01, MRM_EF, (outs), (ins), "wrpkru", []>, TB;
-
-//===----------------------------------------------------------------------===//
-// FS/GS Base Instructions
-let Predicates = [HasFSGSBase, In64BitMode] in {
-  def RDFSBASE : I<0xAE, MRM0r, (outs GR32:$dst), (ins),
-                   "rdfsbase{l}\t$dst",
-                   [(set GR32:$dst, (int_x86_rdfsbase_32))]>, XS;
-  def RDFSBASE64 : RI<0xAE, MRM0r, (outs GR64:$dst), (ins),
-                     "rdfsbase{q}\t$dst",
-                     [(set GR64:$dst, (int_x86_rdfsbase_64))]>, XS;
-  def RDGSBASE : I<0xAE, MRM1r, (outs GR32:$dst), (ins),
-                   "rdgsbase{l}\t$dst",
-                   [(set GR32:$dst, (int_x86_rdgsbase_32))]>, XS;
-  def RDGSBASE64 : RI<0xAE, MRM1r, (outs GR64:$dst), (ins),
-                     "rdgsbase{q}\t$dst",
-                     [(set GR64:$dst, (int_x86_rdgsbase_64))]>, XS;
-  def WRFSBASE : I<0xAE, MRM2r, (outs), (ins GR32:$src),
-                   "wrfsbase{l}\t$src",
-                   [(int_x86_wrfsbase_32 GR32:$src)]>, XS;
-  def WRFSBASE64 : RI<0xAE, MRM2r, (outs), (ins GR64:$src),
-                      "wrfsbase{q}\t$src",
-                      [(int_x86_wrfsbase_64 GR64:$src)]>, XS;
-  def WRGSBASE : I<0xAE, MRM3r, (outs), (ins GR32:$src),
-                   "wrgsbase{l}\t$src",
-                   [(int_x86_wrgsbase_32 GR32:$src)]>, XS;
-  def WRGSBASE64 : RI<0xAE, MRM3r, (outs), (ins GR64:$src),
-                      "wrgsbase{q}\t$src",
-                      [(int_x86_wrgsbase_64 GR64:$src)]>, XS;
-}
-
-//===----------------------------------------------------------------------===//
-// INVPCID Instruction
-def INVPCID32 : I<0x82, MRMSrcMem, (outs), (ins GR32:$src1, i128mem:$src2),
-                "invpcid\t{$src2, $src1|$src1, $src2}", []>, T8PD,
-                Requires<[Not64BitMode]>;
-def INVPCID64 : I<0x82, MRMSrcMem, (outs), (ins GR64:$src1, i128mem:$src2),
-                "invpcid\t{$src2, $src1|$src1, $src2}", []>, T8PD,
-                Requires<[In64BitMode]>;
-
-//===----------------------------------------------------------------------===//
-// SMAP Instruction
-let Defs = [EFLAGS] in {
-  def CLAC : I<0x01, MRM_CA, (outs), (ins), "clac", []>, TB;
-  def STAC : I<0x01, MRM_CB, (outs), (ins), "stac", []>, TB;
-}
-
-//===----------------------------------------------------------------------===//
-// SMX Instruction
-let Uses = [RAX, RBX, RCX, RDX], Defs = [RAX, RBX, RCX] in {
-  def GETSEC : I<0x37, RawFrm, (outs), (ins), "getsec", []>, TB;
-}
+//===-- X86InstrSystem.td - System Instructions ------------*- tablegen -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file describes the X86 instructions that are generally used in
+// privileged modes.  These are not typically used by the compiler, but are
+// supported for the assembler and disassembler.
+//
+//===----------------------------------------------------------------------===//
+
+let SchedRW = [WriteSystem] in {
+let Defs = [RAX, RDX] in
+  def RDTSC : I<0x31, RawFrm, (outs), (ins), "rdtsc", [(X86rdtsc)], IIC_RDTSC>,
+              TB;
+
+let Defs = [RAX, RCX, RDX] in
+  def RDTSCP : I<0x01, MRM_F9, (outs), (ins), "rdtscp", [(X86rdtscp)]>, TB;
+
+// CPU flow control instructions
+
+let mayLoad = 1, mayStore = 0, hasSideEffects = 1 in {
+  def TRAP    : I<0x0B, RawFrm, (outs), (ins), "ud2", [(trap)]>, TB;
+  def UD2B    : I<0xB9, RawFrm, (outs), (ins), "ud2b", []>, TB;
+}
+
+def HLT : I<0xF4, RawFrm, (outs), (ins), "hlt", [], IIC_HLT>;
+def RSM : I<0xAA, RawFrm, (outs), (ins), "rsm", [], IIC_RSM>, TB;
+
+// Interrupt and SysCall Instructions.
+let Uses = [ESP, EFLAGS], Defs = [ESP, EFLAGS] in {
+  def INTO : I<0xce, RawFrm, (outs), (ins), "into", []>;
+
+  // ICEBP is an undocumented instruction, but it does show up in
+  // the AMD opcode map, and other assemblers/disassemblers.
+  // It is a 1 byte form of INT 1
+  def ICEBP : I<0xf1, RawFrm, (outs), (ins), "icebp", []>;
+
+  def INT3 : I<0xcc, RawFrm, (outs), (ins), "int3",
+             [(int_x86_int (i8 3))], IIC_INT3>;
+
+  def INT  : Ii8<0xcd, RawFrm, (outs), (ins u8imm:$trap), "int\t$trap",
+             [(int_x86_int imm:$trap)], IIC_INT>;
+
+}
+} // SchedRW
+
+// The long form of "int $3" turns into int3 as a size optimization.
+// FIXME: This doesn't work because InstAlias can't match immediate constants.
+//def : InstAlias<"int\t$3", (INT3)>;
+
+let SchedRW = [WriteSystem] in {
+
+def SYSCALL  : I<0x05, RawFrm, (outs), (ins), "syscall", [], IIC_SYSCALL>, TB;
+def SYSRET   : I<0x07, RawFrm, (outs), (ins), "sysret{l}", [], IIC_SYSCALL>, TB;
+def SYSRET64 :RI<0x07, RawFrm, (outs), (ins), "sysret{q}", [], IIC_SYSCALL>, TB,
+               Requires<[In64BitMode]>;
+
+def SYSENTER : I<0x34, RawFrm, (outs), (ins), "sysenter", [],
+                 IIC_SYS_ENTER_EXIT>, TB;
+
+def SYSEXIT   : I<0x35, RawFrm, (outs), (ins), "sysexit{l}", [],
+                 IIC_SYS_ENTER_EXIT>, TB;
+def SYSEXIT64 :RI<0x35, RawFrm, (outs), (ins), "sysexit{q}", [],
+                 IIC_SYS_ENTER_EXIT>, TB, Requires<[In64BitMode]>;
+} // SchedRW
+
+def : Pat<(debugtrap),
+          (INT3)>, Requires<[NotPS4]>;
+def : Pat<(debugtrap),
+          (INT (i8 0x41))>, Requires<[IsPS4]>;
+
+//===----------------------------------------------------------------------===//
+//  Input/Output Instructions.
+//
+let SchedRW = [WriteSystem] in {
+let Defs = [AL], Uses = [DX] in
+def IN8rr  : I<0xEC, RawFrm, (outs), (ins),
+               "in{b}\t{%dx, %al|al, dx}", [], IIC_IN_RR>;
+let Defs = [AX], Uses = [DX] in
+def IN16rr : I<0xED, RawFrm, (outs), (ins),
+               "in{w}\t{%dx, %ax|ax, dx}", [], IIC_IN_RR>,  OpSize16;
+let Defs = [EAX], Uses = [DX] in
+def IN32rr : I<0xED, RawFrm, (outs), (ins),
+               "in{l}\t{%dx, %eax|eax, dx}", [], IIC_IN_RR>, OpSize32;
+
+let Defs = [AL] in
+def IN8ri  : Ii8<0xE4, RawFrm, (outs), (ins u8imm:$port),
+                  "in{b}\t{$port, %al|al, $port}", [], IIC_IN_RI>;
+let Defs = [AX] in
+def IN16ri : Ii8<0xE5, RawFrm, (outs), (ins u8imm:$port),
+                  "in{w}\t{$port, %ax|ax, $port}", [], IIC_IN_RI>, OpSize16;
+let Defs = [EAX] in
+def IN32ri : Ii8<0xE5, RawFrm, (outs), (ins u8imm:$port),
+                  "in{l}\t{$port, %eax|eax, $port}", [], IIC_IN_RI>, OpSize32;
+
+let Uses = [DX, AL] in
+def OUT8rr  : I<0xEE, RawFrm, (outs), (ins),
+                "out{b}\t{%al, %dx|dx, al}", [], IIC_OUT_RR>;
+let Uses = [DX, AX] in
+def OUT16rr : I<0xEF, RawFrm, (outs), (ins),
+                "out{w}\t{%ax, %dx|dx, ax}", [], IIC_OUT_RR>, OpSize16;
+let Uses = [DX, EAX] in
+def OUT32rr : I<0xEF, RawFrm, (outs), (ins),
+                "out{l}\t{%eax, %dx|dx, eax}", [], IIC_OUT_RR>, OpSize32;
+
+let Uses = [AL] in
+def OUT8ir  : Ii8<0xE6, RawFrm, (outs), (ins u8imm:$port),
+                   "out{b}\t{%al, $port|$port, al}", [], IIC_OUT_IR>;
+let Uses = [AX] in
+def OUT16ir : Ii8<0xE7, RawFrm, (outs), (ins u8imm:$port),
+                   "out{w}\t{%ax, $port|$port, ax}", [], IIC_OUT_IR>, OpSize16;
+let Uses = [EAX] in
+def OUT32ir : Ii8<0xE7, RawFrm, (outs), (ins u8imm:$port),
+                  "out{l}\t{%eax, $port|$port, eax}", [], IIC_OUT_IR>, OpSize32;
+
+} // SchedRW
+
+//===----------------------------------------------------------------------===//
+// Moves to and from debug registers
+
+let SchedRW = [WriteSystem] in {
+def MOV32rd : I<0x21, MRMDestReg, (outs GR32:$dst), (ins DEBUG_REG:$src),
+                "mov{l}\t{$src, $dst|$dst, $src}", [], IIC_MOV_REG_DR>, TB,
+                Requires<[Not64BitMode]>;
+def MOV64rd : I<0x21, MRMDestReg, (outs GR64:$dst), (ins DEBUG_REG:$src),
+                "mov{q}\t{$src, $dst|$dst, $src}", [], IIC_MOV_REG_DR>, TB,
+                Requires<[In64BitMode]>;
+
+def MOV32dr : I<0x23, MRMSrcReg, (outs DEBUG_REG:$dst), (ins GR32:$src),
+                "mov{l}\t{$src, $dst|$dst, $src}", [], IIC_MOV_DR_REG>, TB,
+                Requires<[Not64BitMode]>;
+def MOV64dr : I<0x23, MRMSrcReg, (outs DEBUG_REG:$dst), (ins GR64:$src),
+                "mov{q}\t{$src, $dst|$dst, $src}", [], IIC_MOV_DR_REG>, TB,
+                Requires<[In64BitMode]>;
+} // SchedRW
+
+//===----------------------------------------------------------------------===//
+// Moves to and from control registers
+
+let SchedRW = [WriteSystem] in {
+def MOV32rc : I<0x20, MRMDestReg, (outs GR32:$dst), (ins CONTROL_REG:$src),
+                "mov{l}\t{$src, $dst|$dst, $src}", [], IIC_MOV_REG_CR>, TB,
+                Requires<[Not64BitMode]>;
+def MOV64rc : I<0x20, MRMDestReg, (outs GR64:$dst), (ins CONTROL_REG:$src),
+                "mov{q}\t{$src, $dst|$dst, $src}", [], IIC_MOV_REG_CR>, TB,
+                Requires<[In64BitMode]>;
+
+def MOV32cr : I<0x22, MRMSrcReg, (outs CONTROL_REG:$dst), (ins GR32:$src),
+                "mov{l}\t{$src, $dst|$dst, $src}", [], IIC_MOV_CR_REG>, TB,
+                Requires<[Not64BitMode]>;
+def MOV64cr : I<0x22, MRMSrcReg, (outs CONTROL_REG:$dst), (ins GR64:$src),
+                "mov{q}\t{$src, $dst|$dst, $src}", [], IIC_MOV_CR_REG>, TB,
+                Requires<[In64BitMode]>;
+} // SchedRW
+
+//===----------------------------------------------------------------------===//
+// Segment override instruction prefixes
+
+def CS_PREFIX : I<0x2E, RawFrm, (outs), (ins), "cs", []>;
+def SS_PREFIX : I<0x36, RawFrm, (outs), (ins), "ss", []>;
+def DS_PREFIX : I<0x3E, RawFrm, (outs), (ins), "ds", []>;
+def ES_PREFIX : I<0x26, RawFrm, (outs), (ins), "es", []>;
+def FS_PREFIX : I<0x64, RawFrm, (outs), (ins), "fs", []>;
+def GS_PREFIX : I<0x65, RawFrm, (outs), (ins), "gs", []>;
+
+
+//===----------------------------------------------------------------------===//
+// Moves to and from segment registers.
+//
+
+let SchedRW = [WriteMove] in {
+def MOV16rs : I<0x8C, MRMDestReg, (outs GR16:$dst), (ins SEGMENT_REG:$src),
+                "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV_REG_SR>, OpSize16;
+def MOV32rs : I<0x8C, MRMDestReg, (outs GR32:$dst), (ins SEGMENT_REG:$src),
+                "mov{l}\t{$src, $dst|$dst, $src}", [], IIC_MOV_REG_SR>, OpSize32;
+def MOV64rs : RI<0x8C, MRMDestReg, (outs GR64:$dst), (ins SEGMENT_REG:$src),
+                 "mov{q}\t{$src, $dst|$dst, $src}", [], IIC_MOV_REG_SR>;
+
+def MOV16ms : I<0x8C, MRMDestMem, (outs), (ins i16mem:$dst, SEGMENT_REG:$src),
+                "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV_MEM_SR>, OpSize16;
+def MOV32ms : I<0x8C, MRMDestMem, (outs), (ins i32mem:$dst, SEGMENT_REG:$src),
+                "mov{l}\t{$src, $dst|$dst, $src}", [], IIC_MOV_MEM_SR>, OpSize32;
+def MOV64ms : RI<0x8C, MRMDestMem, (outs), (ins i64mem:$dst, SEGMENT_REG:$src),
+                 "mov{q}\t{$src, $dst|$dst, $src}", [], IIC_MOV_MEM_SR>;
+
+def MOV16sr : I<0x8E, MRMSrcReg, (outs SEGMENT_REG:$dst), (ins GR16:$src),
+                "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV_SR_REG>, OpSize16;
+def MOV32sr : I<0x8E, MRMSrcReg, (outs SEGMENT_REG:$dst), (ins GR32:$src),
+                "mov{l}\t{$src, $dst|$dst, $src}", [], IIC_MOV_SR_REG>, OpSize32;
+def MOV64sr : RI<0x8E, MRMSrcReg, (outs SEGMENT_REG:$dst), (ins GR64:$src),
+                 "mov{q}\t{$src, $dst|$dst, $src}", [], IIC_MOV_SR_REG>;
+
+def MOV16sm : I<0x8E, MRMSrcMem, (outs SEGMENT_REG:$dst), (ins i16mem:$src),
+                "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV_SR_MEM>, OpSize16;
+def MOV32sm : I<0x8E, MRMSrcMem, (outs SEGMENT_REG:$dst), (ins i32mem:$src),
+                "mov{l}\t{$src, $dst|$dst, $src}", [], IIC_MOV_SR_MEM>, OpSize32;
+def MOV64sm : RI<0x8E, MRMSrcMem, (outs SEGMENT_REG:$dst), (ins i64mem:$src),
+                 "mov{q}\t{$src, $dst|$dst, $src}", [], IIC_MOV_SR_MEM>;
+} // SchedRW
+
+//===----------------------------------------------------------------------===//
+// Segmentation support instructions.
+
+let SchedRW = [WriteSystem] in {
+def SWAPGS : I<0x01, MRM_F8, (outs), (ins), "swapgs", [], IIC_SWAPGS>, TB;
+
+def LAR16rm : I<0x02, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src),
+                "lar{w}\t{$src, $dst|$dst, $src}", [], IIC_LAR_RM>, TB,
+                OpSize16;
+def LAR16rr : I<0x02, MRMSrcReg, (outs GR16:$dst), (ins GR16:$src),
+                "lar{w}\t{$src, $dst|$dst, $src}", [], IIC_LAR_RR>, TB,
+                OpSize16;
+
+// i16mem operand in LAR32rm and GR32 operand in LAR32rr is not a typo.
+def LAR32rm : I<0x02, MRMSrcMem, (outs GR32:$dst), (ins i16mem:$src),
+                "lar{l}\t{$src, $dst|$dst, $src}", [], IIC_LAR_RM>, TB,
+                OpSize32;
+def LAR32rr : I<0x02, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src),
+                "lar{l}\t{$src, $dst|$dst, $src}", [], IIC_LAR_RR>, TB,
+                OpSize32;
+// i16mem operand in LAR64rm and GR32 operand in LAR32rr is not a typo.
+def LAR64rm : RI<0x02, MRMSrcMem, (outs GR64:$dst), (ins i16mem:$src),
+                 "lar{q}\t{$src, $dst|$dst, $src}", [], IIC_LAR_RM>, TB;
+def LAR64rr : RI<0x02, MRMSrcReg, (outs GR64:$dst), (ins GR32:$src),
+                 "lar{q}\t{$src, $dst|$dst, $src}", [], IIC_LAR_RR>, TB;
+
+def LSL16rm : I<0x03, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src),
+                "lsl{w}\t{$src, $dst|$dst, $src}", [], IIC_LSL_RM>, TB,
+                OpSize16;
+def LSL16rr : I<0x03, MRMSrcReg, (outs GR16:$dst), (ins GR16:$src),
+                "lsl{w}\t{$src, $dst|$dst, $src}", [], IIC_LSL_RR>, TB,
+                OpSize16;
+def LSL32rm : I<0x03, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
+                "lsl{l}\t{$src, $dst|$dst, $src}", [], IIC_LSL_RM>, TB,
+                OpSize32;
+def LSL32rr : I<0x03, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src),
+                "lsl{l}\t{$src, $dst|$dst, $src}", [], IIC_LSL_RR>, TB,
+                OpSize32;
+def LSL64rm : RI<0x03, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src),
+                 "lsl{q}\t{$src, $dst|$dst, $src}", [], IIC_LSL_RM>, TB;
+def LSL64rr : RI<0x03, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src),
+                 "lsl{q}\t{$src, $dst|$dst, $src}", [], IIC_LSL_RR>, TB;
+
+def INVLPG : I<0x01, MRM7m, (outs), (ins i8mem:$addr), "invlpg\t$addr",
+               [], IIC_INVLPG>, TB;
+
+def STR16r : I<0x00, MRM1r, (outs GR16:$dst), (ins),
+               "str{w}\t$dst", [], IIC_STR>, TB, OpSize16;
+def STR32r : I<0x00, MRM1r, (outs GR32:$dst), (ins),
+               "str{l}\t$dst", [], IIC_STR>, TB, OpSize32;
+def STR64r : RI<0x00, MRM1r, (outs GR64:$dst), (ins),
+                "str{q}\t$dst", [], IIC_STR>, TB;
+def STRm   : I<0x00, MRM1m, (outs), (ins i16mem:$dst),
+               "str{w}\t$dst", [], IIC_STR>, TB;
+
+def LTRr : I<0x00, MRM3r, (outs), (ins GR16:$src),
+             "ltr{w}\t$src", [], IIC_LTR>, TB;
+def LTRm : I<0x00, MRM3m, (outs), (ins i16mem:$src),
+             "ltr{w}\t$src", [], IIC_LTR>, TB;
+
+def PUSHCS16 : I<0x0E, RawFrm, (outs), (ins),
+                 "push{w}\t{%cs|cs}", [], IIC_PUSH_SR>,
+                 OpSize16, Requires<[Not64BitMode]>;
+def PUSHCS32 : I<0x0E, RawFrm, (outs), (ins),
+                 "push{l}\t{%cs|cs}", [], IIC_PUSH_CS>,
+                 OpSize32, Requires<[Not64BitMode]>;
+def PUSHSS16 : I<0x16, RawFrm, (outs), (ins),
+                 "push{w}\t{%ss|ss}", [], IIC_PUSH_SR>,
+                 OpSize16, Requires<[Not64BitMode]>;
+def PUSHSS32 : I<0x16, RawFrm, (outs), (ins),
+                 "push{l}\t{%ss|ss}", [], IIC_PUSH_SR>,
+                 OpSize32, Requires<[Not64BitMode]>;
+def PUSHDS16 : I<0x1E, RawFrm, (outs), (ins),
+                 "push{w}\t{%ds|ds}", [], IIC_PUSH_SR>,
+                 OpSize16, Requires<[Not64BitMode]>;
+def PUSHDS32 : I<0x1E, RawFrm, (outs), (ins),
+                 "push{l}\t{%ds|ds}", [], IIC_PUSH_SR>,
+                 OpSize32, Requires<[Not64BitMode]>;
+def PUSHES16 : I<0x06, RawFrm, (outs), (ins),
+                 "push{w}\t{%es|es}", [], IIC_PUSH_SR>,
+                 OpSize16, Requires<[Not64BitMode]>;
+def PUSHES32 : I<0x06, RawFrm, (outs), (ins),
+                 "push{l}\t{%es|es}", [], IIC_PUSH_SR>,
+                 OpSize32, Requires<[Not64BitMode]>;
+def PUSHFS16 : I<0xa0, RawFrm, (outs), (ins),
+                 "push{w}\t{%fs|fs}", [], IIC_PUSH_SR>, OpSize16, TB;
+def PUSHFS32 : I<0xa0, RawFrm, (outs), (ins),
+                 "push{l}\t{%fs|fs}", [], IIC_PUSH_SR>, TB,
+               OpSize32, Requires<[Not64BitMode]>;
+def PUSHGS16 : I<0xa8, RawFrm, (outs), (ins),
+                 "push{w}\t{%gs|gs}", [], IIC_PUSH_SR>, OpSize16, TB;
+def PUSHGS32 : I<0xa8, RawFrm, (outs), (ins),
+                 "push{l}\t{%gs|gs}", [], IIC_PUSH_SR>, TB,
+               OpSize32, Requires<[Not64BitMode]>;
+def PUSHFS64 : I<0xa0, RawFrm, (outs), (ins),
+                 "push{q}\t{%fs|fs}", [], IIC_PUSH_SR>, TB,
+               OpSize32, Requires<[In64BitMode]>;
+def PUSHGS64 : I<0xa8, RawFrm, (outs), (ins),
+                 "push{q}\t{%gs|gs}", [], IIC_PUSH_SR>, TB,
+               OpSize32, Requires<[In64BitMode]>;
+
+// No "pop cs" instruction.
+def POPSS16 : I<0x17, RawFrm, (outs), (ins),
+                "pop{w}\t{%ss|ss}", [], IIC_POP_SR_SS>,
+              OpSize16, Requires<[Not64BitMode]>;
+def POPSS32 : I<0x17, RawFrm, (outs), (ins),
+                "pop{l}\t{%ss|ss}", [], IIC_POP_SR_SS>,
+              OpSize32, Requires<[Not64BitMode]>;
+
+def POPDS16 : I<0x1F, RawFrm, (outs), (ins),
+                "pop{w}\t{%ds|ds}", [], IIC_POP_SR>,
+              OpSize16, Requires<[Not64BitMode]>;
+def POPDS32 : I<0x1F, RawFrm, (outs), (ins),
+                "pop{l}\t{%ds|ds}", [], IIC_POP_SR>,
+              OpSize32, Requires<[Not64BitMode]>;
+
+def POPES16 : I<0x07, RawFrm, (outs), (ins),
+                "pop{w}\t{%es|es}", [], IIC_POP_SR>,
+              OpSize16, Requires<[Not64BitMode]>;
+def POPES32 : I<0x07, RawFrm, (outs), (ins),
+                "pop{l}\t{%es|es}", [], IIC_POP_SR>,
+              OpSize32, Requires<[Not64BitMode]>;
+
+def POPFS16 : I<0xa1, RawFrm, (outs), (ins),
+                "pop{w}\t{%fs|fs}", [], IIC_POP_SR>, OpSize16, TB;
+def POPFS32 : I<0xa1, RawFrm, (outs), (ins),
+                "pop{l}\t{%fs|fs}", [], IIC_POP_SR>, TB,
+              OpSize32, Requires<[Not64BitMode]>;
+def POPFS64 : I<0xa1, RawFrm, (outs), (ins),
+                "pop{q}\t{%fs|fs}", [], IIC_POP_SR>, TB,
+              OpSize32, Requires<[In64BitMode]>;
+
+def POPGS16 : I<0xa9, RawFrm, (outs), (ins),
+                "pop{w}\t{%gs|gs}", [], IIC_POP_SR>, OpSize16, TB;
+def POPGS32 : I<0xa9, RawFrm, (outs), (ins),
+                "pop{l}\t{%gs|gs}", [], IIC_POP_SR>, TB,
+              OpSize32, Requires<[Not64BitMode]>;
+def POPGS64 : I<0xa9, RawFrm, (outs), (ins),
+                "pop{q}\t{%gs|gs}", [], IIC_POP_SR>, TB,
+              OpSize32, Requires<[In64BitMode]>;
+
+
+def LDS16rm : I<0xc5, MRMSrcMem, (outs GR16:$dst), (ins opaque32mem:$src),
+                "lds{w}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, OpSize16,
+                Requires<[Not64BitMode]>;
+def LDS32rm : I<0xc5, MRMSrcMem, (outs GR32:$dst), (ins opaque48mem:$src),
+                "lds{l}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, OpSize32,
+                Requires<[Not64BitMode]>;
+
+def LSS16rm : I<0xb2, MRMSrcMem, (outs GR16:$dst), (ins opaque32mem:$src),
+                "lss{w}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, TB, OpSize16;
+def LSS32rm : I<0xb2, MRMSrcMem, (outs GR32:$dst), (ins opaque48mem:$src),
+                "lss{l}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, TB, OpSize32;
+def LSS64rm : RI<0xb2, MRMSrcMem, (outs GR64:$dst), (ins opaque80mem:$src),
+                 "lss{q}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, TB;
+
+def LES16rm : I<0xc4, MRMSrcMem, (outs GR16:$dst), (ins opaque32mem:$src),
+                "les{w}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, OpSize16,
+                Requires<[Not64BitMode]>;
+def LES32rm : I<0xc4, MRMSrcMem, (outs GR32:$dst), (ins opaque48mem:$src),
+                "les{l}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, OpSize32,
+                Requires<[Not64BitMode]>;
+
+def LFS16rm : I<0xb4, MRMSrcMem, (outs GR16:$dst), (ins opaque32mem:$src),
+                "lfs{w}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, TB, OpSize16;
+def LFS32rm : I<0xb4, MRMSrcMem, (outs GR32:$dst), (ins opaque48mem:$src),
+                "lfs{l}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, TB, OpSize32;
+def LFS64rm : RI<0xb4, MRMSrcMem, (outs GR64:$dst), (ins opaque80mem:$src),
+                 "lfs{q}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, TB;
+
+def LGS16rm : I<0xb5, MRMSrcMem, (outs GR16:$dst), (ins opaque32mem:$src),
+                "lgs{w}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, TB, OpSize16;
+def LGS32rm : I<0xb5, MRMSrcMem, (outs GR32:$dst), (ins opaque48mem:$src),
+                "lgs{l}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, TB, OpSize32;
+
+def LGS64rm : RI<0xb5, MRMSrcMem, (outs GR64:$dst), (ins opaque80mem:$src),
+                 "lgs{q}\t{$src, $dst|$dst, $src}", [], IIC_LXS>, TB;
+
+
+def VERRr : I<0x00, MRM4r, (outs), (ins GR16:$seg),
+              "verr\t$seg", [], IIC_VERR>, TB;
+def VERRm : I<0x00, MRM4m, (outs), (ins i16mem:$seg),
+              "verr\t$seg", [], IIC_VERR>, TB;
+def VERWr : I<0x00, MRM5r, (outs), (ins GR16:$seg),
+              "verw\t$seg", [], IIC_VERW_MEM>, TB;
+def VERWm : I<0x00, MRM5m, (outs), (ins i16mem:$seg),
+              "verw\t$seg", [], IIC_VERW_REG>, TB;
+} // SchedRW
+
+//===----------------------------------------------------------------------===//
+// Descriptor-table support instructions
+
+let SchedRW = [WriteSystem] in {
+def SGDT16m : I<0x01, MRM0m, (outs), (ins opaque48mem:$dst),
+              "sgdt{w}\t$dst", [], IIC_SGDT>, TB, OpSize16, Requires<[Not64BitMode]>;
+def SGDT32m : I<0x01, MRM0m, (outs), (ins opaque48mem:$dst),
+              "sgdt{l}\t$dst", [], IIC_SGDT>, OpSize32, TB, Requires <[Not64BitMode]>;
+def SGDT64m : I<0x01, MRM0m, (outs), (ins opaque80mem:$dst),
+              "sgdt{q}\t$dst", [], IIC_SGDT>, TB, Requires <[In64BitMode]>;
+def SIDT16m : I<0x01, MRM1m, (outs), (ins opaque48mem:$dst),
+              "sidt{w}\t$dst", [], IIC_SIDT>, TB, OpSize16, Requires<[Not64BitMode]>;
+def SIDT32m : I<0x01, MRM1m, (outs), (ins opaque48mem:$dst),
+              "sidt{l}\t$dst", []>, OpSize32, TB, Requires <[Not64BitMode]>;
+def SIDT64m : I<0x01, MRM1m, (outs), (ins opaque80mem:$dst),
+              "sidt{q}\t$dst", []>, TB, Requires <[In64BitMode]>;
+def SLDT16r : I<0x00, MRM0r, (outs GR16:$dst), (ins),
+                "sldt{w}\t$dst", [], IIC_SLDT>, TB, OpSize16;
+def SLDT16m : I<0x00, MRM0m, (outs), (ins i16mem:$dst),
+                "sldt{w}\t$dst", [], IIC_SLDT>, TB;
+def SLDT32r : I<0x00, MRM0r, (outs GR32:$dst), (ins),
+                "sldt{l}\t$dst", [], IIC_SLDT>, OpSize32, TB;
+
+// LLDT is not interpreted specially in 64-bit mode because there is no sign
+//   extension.
+def SLDT64r : RI<0x00, MRM0r, (outs GR64:$dst), (ins),
+                 "sldt{q}\t$dst", [], IIC_SLDT>, TB;
+def SLDT64m : RI<0x00, MRM0m, (outs), (ins i16mem:$dst),
+                 "sldt{q}\t$dst", [], IIC_SLDT>, TB;
+
+def LGDT16m : I<0x01, MRM2m, (outs), (ins opaque48mem:$src),
+              "lgdt{w}\t$src", [], IIC_LGDT>, TB, OpSize16, Requires<[Not64BitMode]>;
+def LGDT32m : I<0x01, MRM2m, (outs), (ins opaque48mem:$src),
+              "lgdt{l}\t$src", [], IIC_LGDT>, OpSize32, TB, Requires<[Not64BitMode]>;
+def LGDT64m : I<0x01, MRM2m, (outs), (ins opaque80mem:$src),
+              "lgdt{q}\t$src", [], IIC_LGDT>, TB, Requires<[In64BitMode]>;
+def LIDT16m : I<0x01, MRM3m, (outs), (ins opaque48mem:$src),
+              "lidt{w}\t$src", [], IIC_LIDT>, TB, OpSize16, Requires<[Not64BitMode]>;
+def LIDT32m : I<0x01, MRM3m, (outs), (ins opaque48mem:$src),
+              "lidt{l}\t$src", [], IIC_LIDT>, OpSize32, TB, Requires<[Not64BitMode]>;
+def LIDT64m : I<0x01, MRM3m, (outs), (ins opaque80mem:$src),
+              "lidt{q}\t$src", [], IIC_LIDT>, TB, Requires<[In64BitMode]>;
+def LLDT16r : I<0x00, MRM2r, (outs), (ins GR16:$src),
+                "lldt{w}\t$src", [], IIC_LLDT_REG>, TB;
+def LLDT16m : I<0x00, MRM2m, (outs), (ins i16mem:$src),
+                "lldt{w}\t$src", [], IIC_LLDT_MEM>, TB;
+} // SchedRW
+
+//===----------------------------------------------------------------------===//
+// Specialized register support
+let SchedRW = [WriteSystem] in {
+let Uses = [EAX, ECX, EDX] in
+def WRMSR : I<0x30, RawFrm, (outs), (ins), "wrmsr", [], IIC_WRMSR>, TB;
+let Defs = [EAX, EDX], Uses = [ECX] in
+def RDMSR : I<0x32, RawFrm, (outs), (ins), "rdmsr", [], IIC_RDMSR>, TB;
+
+let Defs = [RAX, RDX], Uses = [ECX] in
+  def RDPMC : I<0x33, RawFrm, (outs), (ins), "rdpmc", [(X86rdpmc)], IIC_RDPMC>,
+              TB;
+
+def SMSW16r : I<0x01, MRM4r, (outs GR16:$dst), (ins),
+                "smsw{w}\t$dst", [], IIC_SMSW>, OpSize16, TB;
+def SMSW32r : I<0x01, MRM4r, (outs GR32:$dst), (ins),
+                "smsw{l}\t$dst", [], IIC_SMSW>, OpSize32, TB;
+// no m form encodable; use SMSW16m
+def SMSW64r : RI<0x01, MRM4r, (outs GR64:$dst), (ins),
+                 "smsw{q}\t$dst", [], IIC_SMSW>, TB;
+
+// For memory operands, there is only a 16-bit form
+def SMSW16m : I<0x01, MRM4m, (outs), (ins i16mem:$dst),
+                "smsw{w}\t$dst", [], IIC_SMSW>, TB;
+
+def LMSW16r : I<0x01, MRM6r, (outs), (ins GR16:$src),
+                "lmsw{w}\t$src", [], IIC_LMSW_MEM>, TB;
+def LMSW16m : I<0x01, MRM6m, (outs), (ins i16mem:$src),
+                "lmsw{w}\t$src", [], IIC_LMSW_REG>, TB;
+
+let Defs = [EAX, EBX, ECX, EDX], Uses = [EAX, ECX] in
+  def CPUID : I<0xA2, RawFrm, (outs), (ins), "cpuid", [], IIC_CPUID>, TB;
+} // SchedRW
+
+//===----------------------------------------------------------------------===//
+// Cache instructions
+let SchedRW = [WriteSystem] in {
+def INVD : I<0x08, RawFrm, (outs), (ins), "invd", [], IIC_INVD>, TB;
+def WBINVD : I<0x09, RawFrm, (outs), (ins), "wbinvd", [], IIC_INVD>, TB;
+} // SchedRW
+
+//===----------------------------------------------------------------------===//
+// XSAVE instructions
+let SchedRW = [WriteSystem] in {
+let Predicates = [HasXSAVE] in {
+let Defs = [EDX, EAX], Uses = [ECX] in
+  def XGETBV : I<0x01, MRM_D0, (outs), (ins), "xgetbv", []>, TB;
+
+let Uses = [EDX, EAX, ECX] in
+  def XSETBV : I<0x01, MRM_D1, (outs), (ins), 
+                "xsetbv", 
+                [(int_x86_xsetbv ECX, EDX, EAX)]>, TB;
+
+} // HasXSAVE
+
+let Uses = [EDX, EAX] in {
+let Predicates = [HasXSAVE] in {
+  def XSAVE : I<0xAE, MRM4m, (outs), (ins opaque512mem:$dst),
+                "xsave\t$dst",
+                [(int_x86_xsave addr:$dst, EDX, EAX)]>, TB;
+  def XSAVE64 : RI<0xAE, MRM4m, (outs), (ins opaque512mem:$dst),
+                   "xsave64\t$dst",
+                   [(int_x86_xsave64 addr:$dst, EDX, EAX)]>, TB, Requires<[In64BitMode]>;
+  def XRSTOR : I<0xAE, MRM5m, (outs), (ins opaque512mem:$dst),
+                 "xrstor\t$dst",
+                 [(int_x86_xrstor addr:$dst, EDX, EAX)]>, TB;
+  def XRSTOR64 : RI<0xAE, MRM5m, (outs), (ins opaque512mem:$dst),
+                    "xrstor64\t$dst",
+                    [(int_x86_xrstor64 addr:$dst, EDX, EAX)]>, TB, Requires<[In64BitMode]>;
+}
+let Predicates = [HasXSAVEOPT] in {
+  def XSAVEOPT : I<0xAE, MRM6m, (outs), (ins opaque512mem:$dst),
+                   "xsaveopt\t$dst",
+                   [(int_x86_xsaveopt addr:$dst, EDX, EAX)]>, PS;
+  def XSAVEOPT64 : RI<0xAE, MRM6m, (outs), (ins opaque512mem:$dst),
+                      "xsaveopt64\t$dst",
+                      [(int_x86_xsaveopt64 addr:$dst, EDX, EAX)]>, PS, Requires<[In64BitMode]>;
+}
+let Predicates = [HasXSAVEC] in {
+  def XSAVEC : I<0xC7, MRM4m, (outs), (ins opaque512mem:$dst),
+                 "xsavec\t$dst",
+                 [(int_x86_xsavec addr:$dst, EDX, EAX)]>, TB;
+  def XSAVEC64 : RI<0xC7, MRM4m, (outs), (ins opaque512mem:$dst),
+                   "xsavec64\t$dst",
+                   [(int_x86_xsavec64 addr:$dst, EDX, EAX)]>, TB, Requires<[In64BitMode]>;
+}
+let Predicates = [HasXSAVES] in {
+  def XSAVES : I<0xC7, MRM5m, (outs), (ins opaque512mem:$dst),
+                 "xsaves\t$dst",
+                 [(int_x86_xsaves addr:$dst, EDX, EAX)]>, TB;
+  def XSAVES64 : RI<0xC7, MRM5m, (outs), (ins opaque512mem:$dst),
+                    "xsaves64\t$dst",
+                    [(int_x86_xsaves64 addr:$dst, EDX, EAX)]>, TB, Requires<[In64BitMode]>;
+  def XRSTORS : I<0xC7, MRM3m, (outs), (ins opaque512mem:$dst),
+                  "xrstors\t$dst",
+                  [(int_x86_xrstors addr:$dst, EDX, EAX)]>, TB;
+  def XRSTORS64 : RI<0xC7, MRM3m, (outs), (ins opaque512mem:$dst),
+                     "xrstors64\t$dst",
+                     [(int_x86_xrstors64 addr:$dst, EDX, EAX)]>, TB, Requires<[In64BitMode]>;
+}
+} // Uses
+} // SchedRW
+
+//===----------------------------------------------------------------------===//
+// VIA PadLock crypto instructions
+let Defs = [RAX, RDI], Uses = [RDX, RDI] in
+  def XSTORE : I<0xa7, MRM_C0, (outs), (ins), "xstore", []>, TB;
+
+def : InstAlias<"xstorerng", (XSTORE)>;
+
+let Defs = [RSI, RDI], Uses = [RBX, RDX, RSI, RDI] in {
+  def XCRYPTECB : I<0xa7, MRM_C8, (outs), (ins), "xcryptecb", []>, TB;
+  def XCRYPTCBC : I<0xa7, MRM_D0, (outs), (ins), "xcryptcbc", []>, TB;
+  def XCRYPTCTR : I<0xa7, MRM_D8, (outs), (ins), "xcryptctr", []>, TB;
+  def XCRYPTCFB : I<0xa7, MRM_E0, (outs), (ins), "xcryptcfb", []>, TB;
+  def XCRYPTOFB : I<0xa7, MRM_E8, (outs), (ins), "xcryptofb", []>, TB;
+}
+
+let Defs = [RAX, RSI, RDI], Uses = [RAX, RSI, RDI] in {
+  def XSHA1 : I<0xa6, MRM_C8, (outs), (ins), "xsha1", []>, TB;
+  def XSHA256 : I<0xa6, MRM_D0, (outs), (ins), "xsha256", []>, TB;
+}
+let Defs = [RAX, RDX, RSI], Uses = [RAX, RSI] in
+  def MONTMUL : I<0xa6, MRM_C0, (outs), (ins), "montmul", []>, TB;
+//==-----------------------------------------------------------------------===//
+// PKU  - enable protection key
+let usesCustomInserter = 1 in {
+  def WRPKRU : PseudoI<(outs), (ins GR32:$src),
+                [(int_x86_wrpkru GR32:$src)]>;
+  def RDPKRU : PseudoI<(outs GR32:$dst), (ins),
+                [(set GR32:$dst, (int_x86_rdpkru))]>;
+}
+
+let Defs = [EAX, EDX], Uses = [ECX] in
+  def RDPKRUr : I<0x01, MRM_EE, (outs), (ins), "rdpkru", []>, TB;
+let Uses = [EAX, ECX, EDX] in
+  def WRPKRUr : I<0x01, MRM_EF, (outs), (ins), "wrpkru", []>, TB;
+
+//===----------------------------------------------------------------------===//
+// FS/GS Base Instructions
+let Predicates = [HasFSGSBase, In64BitMode] in {
+  def RDFSBASE : I<0xAE, MRM0r, (outs GR32:$dst), (ins),
+                   "rdfsbase{l}\t$dst",
+                   [(set GR32:$dst, (int_x86_rdfsbase_32))]>, XS;
+  def RDFSBASE64 : RI<0xAE, MRM0r, (outs GR64:$dst), (ins),
+                     "rdfsbase{q}\t$dst",
+                     [(set GR64:$dst, (int_x86_rdfsbase_64))]>, XS;
+  def RDGSBASE : I<0xAE, MRM1r, (outs GR32:$dst), (ins),
+                   "rdgsbase{l}\t$dst",
+                   [(set GR32:$dst, (int_x86_rdgsbase_32))]>, XS;
+  def RDGSBASE64 : RI<0xAE, MRM1r, (outs GR64:$dst), (ins),
+                     "rdgsbase{q}\t$dst",
+                     [(set GR64:$dst, (int_x86_rdgsbase_64))]>, XS;
+  def WRFSBASE : I<0xAE, MRM2r, (outs), (ins GR32:$src),
+                   "wrfsbase{l}\t$src",
+                   [(int_x86_wrfsbase_32 GR32:$src)]>, XS;
+  def WRFSBASE64 : RI<0xAE, MRM2r, (outs), (ins GR64:$src),
+                      "wrfsbase{q}\t$src",
+                      [(int_x86_wrfsbase_64 GR64:$src)]>, XS;
+  def WRGSBASE : I<0xAE, MRM3r, (outs), (ins GR32:$src),
+                   "wrgsbase{l}\t$src",
+                   [(int_x86_wrgsbase_32 GR32:$src)]>, XS;
+  def WRGSBASE64 : RI<0xAE, MRM3r, (outs), (ins GR64:$src),
+                      "wrgsbase{q}\t$src",
+                      [(int_x86_wrgsbase_64 GR64:$src)]>, XS;
+}
+
+//===----------------------------------------------------------------------===//
+// INVPCID Instruction
+def INVPCID32 : I<0x82, MRMSrcMem, (outs), (ins GR32:$src1, i128mem:$src2),
+                "invpcid\t{$src2, $src1|$src1, $src2}", []>, T8PD,
+                Requires<[Not64BitMode]>;
+def INVPCID64 : I<0x82, MRMSrcMem, (outs), (ins GR64:$src1, i128mem:$src2),
+                "invpcid\t{$src2, $src1|$src1, $src2}", []>, T8PD,
+                Requires<[In64BitMode]>;
+
+//===----------------------------------------------------------------------===//
+// SMAP Instruction
+let Defs = [EFLAGS] in {
+  def CLAC : I<0x01, MRM_CA, (outs), (ins), "clac", []>, TB;
+  def STAC : I<0x01, MRM_CB, (outs), (ins), "stac", []>, TB;
+}
+
+//===----------------------------------------------------------------------===//
+// SMX Instruction
+let Uses = [RAX, RBX, RCX, RDX], Defs = [RAX, RBX, RCX] in {
+  def GETSEC : I<0x37, RawFrm, (outs), (ins), "getsec", []>, TB;
+}

test/CodeGen/X86/int-intrinsic.ll

-; RUN: llc < %s -march=x86    | FileCheck %s
-; RUN: llc < %s -march=x86-64 | FileCheck %s
-
-declare void @llvm.x86.int(i8) nounwind
-
-; CHECK: int3
-; CHECK: ret
-define void @primitive_int3 () {
-bb.entry:
-  call void @llvm.x86.int(i8 3) nounwind
-  ret void
-}
-
-; CHECK: int  $128
-; CHECK: ret
-define void @primitive_int128 () {
-bb.entry:
-  call void @llvm.x86.int(i8 128) nounwind
-  ret void
-}
+; RUN: llc < %s -march=x86    | FileCheck %s
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+
+declare void @llvm.x86.int(i8) nounwind
+
+; CHECK: int  $1
+; CHECK: ret
+define void @primitive_int1 () {
+bb.entry:
+  call void @llvm.x86.int(i8 1) nounwind
+  ret void
+}
+
+; CHECK: int3
+; CHECK: ret
+define void @primitive_int3 () {
+bb.entry:
+  call void @llvm.x86.int(i8 3) nounwind
+  ret void
+}
+
+; CHECK: int  $128
+; CHECK: ret
+define void @primitive_int128 () {
+bb.entry:
+  call void @llvm.x86.int(i8 128) nounwind
+  ret void
+}

test/MC/Disassembler/X86/simple-tests.txt

-# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 | FileCheck %s
-
-# CHECK: int  $33
-0xCD 0x21 
-
-# CHECK: int  $33
-0xCD 0x21
-
-# CHECK: jrcxz -127
-0xe3 0x81
-
-# CHECK: jecxz -127
-0x67 0xe3 0x81
-
-# CHECK: addb %al, (%rax)
-0 0
-
-# CHECK: callq  -1234
-0xe8 0x2e 0xfb 0xff 0xff
-
-# CHECK: lfence
-0x0f 0xae 0xe8
-
-# CHECK: mfence
-0x0f 0xae 0xf0
-
-# CHECK: monitor
-0x0f 0x01 0xc8
-
-# CHECK: mwait
-0x0f 0x01 0xc9
-
-# CHECK: vmcall
-0x0f 0x01 0xc1
-
-# CHECK: vmfunc
-0x0f 0x01 0xd4
-
-# CHECK: vmlaunch
-0x0f 0x01 0xc2
-
-# CHECK: vmresume
-0x0f 0x01 0xc3
-
-# CHECK: vmxoff
-0x0f 0x01 0xc4
-
-# CHECK: swapgs
-0x0f 0x01 0xf8
-
-# CHECK: rdtscp
-0x0f 0x01 0xf9
-
-# CHECK: monitorx 
-0x0f 0x01 0xfa
-
-# CHECK: mwaitx 
-0x0f 0x01 0xfb
-
-# CHECK: vmxon
-0xf3 0x0f 0xc7 0x30
-
-# CHECK: vmptrld
-0x0f 0xc7 0x30
-
-# CHECK: vmptrst
-0x0f 0xc7 0x38
-
-# CHECK: vmrun
-0x0f 0x01 0xd8
-
-# CHECK: vmmcall
-0x0f 0x01 0xd9
-
-# CHECK: vmload
-0x0f 0x01 0xda
-
-# CHECK: vmsave
-0x0f 0x01 0xdb
-
-# CHECK: stgi
-0x0f 0x01 0xdc
-
-# CHECK: clgi
-0x0f 0x01 0xdd
-
-# CHECK: skinit
-0x0f 0x01 0xde
-
-# CHECK: invlpga
-0x0f 0x01 0xdf
-
-# CHECK: movl $0, -4(%rbp)
-0xc7 0x45 0xfc 0x00 0x00 0x00 0x00
-
-# CHECK: movq %cr0, %rcx
-0x0f 0x20 0xc1
-
-# CHECK: leaw 4(%esp), %cx
-0x67 0x66 0x8d 0x4c 0x24 0x04 
-
-# CHECK: leal 4(%esp), %ecx
-0x67 0x8d 0x4c 0x24 0x04 
-
-# CHECK: leaq 4(%esp), %rcx
-0x67 0x48 0x8d 0x4c 0x24 0x04 
-
-# CHECK: leaw 4(%rsp), %cx
-0x66 0x8d 0x4c 0x24 0x04 
-
-# CHECK: leal 4(%rsp), %ecx
-0x8d 0x4c 0x24 0x04 
-
-# CHECK: leaq 4(%rsp), %rcx
-0x48 0x8d 0x4c 0x24 0x04 
-
-# CHECK: enter  $1, $2
-0xc8 0x01 0x00 0x02
-
-# CHECK: movw $47416, -66(%rbp)
-0x66 0xc7 0x45 0xbe 0x38 0xb9
-
-# CHECK: vaddpd %ymm13, %ymm1, %ymm0
-0xc4 0xc1 0x75 0x58 0xc5
-
-# CHECK: vaddps %ymm3, %ymm1, %ymm0
-0xc5 0xf4 0x58 0xc3
-
-# CHECK: vandpd %ymm13, %ymm1, %ymm0
-0xc4 0xc1 0x75 0x54 0xc5
-
-# CHECK: vandps %ymm3, %ymm1, %ymm0
-0xc5 0xf4 0x54 0xc3
-
-# CHECK: vzeroall
-0xc5 0xfc 0x77
-
-# CHECK: vcvtps2pd %xmm0, %ymm0
-0xc5 0xfc 0x5a 0xc0
-
-# CHECK: vandps (%rdx), %xmm1, %xmm7
-0xc5 0xf0 0x54 0x3a
-
-# CHECK: vcvtss2si %xmm0, %eax
-0xc5 0xfa 0x2d 0xc0
-
-# CHECK: vcvtsd2si %xmm0, %eax
-0xc5 0xfb 0x2d 0xc0
-
-# CHECK: vcvtsd2si %xmm0, %rax
-0xc4 0xe1 0xfb 0x2d 0xc0
-
-# CHECK: vcvtsd2si %xmm0, %rax
-0xc4 0xe1 0xff 0x2d 0xc0
-
-# CHECK: vmaskmovpd %xmm0, %xmm1, (%rax)
-0xc4 0xe2 0x71 0x2f 0x00
-
-# CHECK: vmovapd %xmm0, %xmm2
-0xc5 0xf9 0x28 0xd0
-
-# Check X86 immediates print as signed values by default.  radr://8795217
-# CHECK: andq $-16, %rsp
-0x48 0x83 0xe4 0xf0
-
-# Check these special case instructions that the immediate is not sign-extend.
-# CHECK: blendps $129, %xmm2, %xmm1
-0x66 0x0f 0x3a 0x0c 0xca 0x81
-
-# CHECK: blendpd $129, %xmm2, %xmm1
-0x66 0x0f 0x3a 0x0d 0xca 0x81
-
-# CHECK: pblendw $129, %xmm2, %xmm1
-0x66 0x0f 0x3a 0x0e 0xca 0x81
-
-# CHECK: mpsadbw $129, %xmm2, %xmm1
-0x66 0x0f 0x3a 0x42 0xca 0x81
-
-# CHECK: dpps $129, %xmm2, %xmm1
-0x66 0x0f 0x3a 0x40 0xca 0x81
-
-# CHECK: dppd $129, %xmm2, %xmm1
-0x66 0x0f 0x3a 0x41 0xca 0x81
-
-# CHECK: insertps $129, %xmm2, %xmm1
-0x66 0x0f 0x3a 0x21 0xca 0x81
-
-# CHECK: vblendps $129, %ymm2, %ymm5, %ymm1
-0xc4 0xe3 0x55 0x0c 0xca 0x81
-
-# CHECK: vblendps $129, (%rax), %ymm5, %ymm1
-0xc4 0xe3 0x55 0x0c 0x08 0x81
-
-# CHECK: vblendpd $129, %ymm2, %ymm5, %ymm1
-0xc4 0xe3 0x55 0x0d 0xca 0x81
-
-# CHECK: vblendpd $129, (%rax), %ymm5, %ymm1
-0xc4 0xe3 0x55 0x0d 0x08 0x81
-
-# CHECK: vpblendw $129, %xmm2, %xmm5, %xmm1
-0xc4 0xe3 0x51 0x0e 0xca 0x81
-
-# CHECK: vmpsadbw $129, %xmm2, %xmm5, %xmm1
-0xc4 0xe3 0x51 0x42 0xca 0x81
-
-# CHECK: vdpps $129, %ymm2, %ymm5, %ymm1
-0xc4 0xe3 0x55 0x40 0xca 0x81
-
-# CHECK: vdpps $129, (%rax), %ymm5, %ymm1
-0xc4 0xe3 0x55 0x40 0x08 0x81
-
-# CHECK: vdppd $129, %xmm2, %xmm5, %xmm1
-0xc4 0xe3 0x51 0x41 0xca 0x81
-
-# CHECK: vinsertps $129, %xmm3, %xmm2, %xmm1
-0xc4 0xe3 0x69 0x21 0xcb 0x81
-
-# CHECK: pause
-0xf3 0x90
-
-# CHECK: addl %eax, %edi
-0x01 0xc7
-
-# CHECK: addl %edi, %eax
-0x03 0xc7
-
-# CHECK: movl %eax, %edi
-0x89 0xc7
-
-# CHECK: movl %edi, %eax
-0x8b 0xc7
-
-# CHECK: movups %xmm1, %xmm0
-0x0f 0x10 0xc1
-
-# CHECK: movups %xmm0, %xmm1
-0x0f 0x11 0xc1
-
-# CHECK: movaps %xmm1, %xmm0
-0x0f 0x28 0xc1
-
-# CHECK: movaps %xmm0, %xmm1
-0x0f 0x29 0xc1
-
-# CHECK: movupd %xmm1, %xmm0
-0x66 0x0f 0x10 0xc1
-
-# CHECK: movupd %xmm0, %xmm1
-0x66 0x0f 0x11 0xc1
-
-# CHECK: movapd %xmm1, %xmm0
-0x66 0x0f 0x28 0xc1
-
-# CHECK: movapd %xmm0, %xmm1
-0x66 0x0f 0x29 0xc1
-
-# CHECK: vmovups %xmm1, %xmm0
-0xc5 0xf8 0x10 0xc1
-
-# CHECK: vmovups %xmm0, %xmm1
-0xc5 0xf8 0x11 0xc1
-
-# CHECK: vmovaps %xmm1, %xmm0
-0xc5 0xf8 0x28 0xc1
-
-# CHECK: vmovaps %xmm0, %xmm1
-0xc5 0xf8 0x29 0xc1
-
-# CHECK: vmovupd %xmm1, %xmm0
-0xc5 0xf9 0x10 0xc1
-
-# CHECK: vmovupd %xmm0, %xmm1
-0xc5 0xf9 0x11 0xc1
-
-# CHECK: vmovapd %xmm1, %xmm0
-0xc5 0xf9 0x28 0xc1
-
-# CHECK: vmovapd %xmm0, %xmm1
-0xc5 0xf9 0x29 0xc1
-
-# CHECK: vmovups %ymm1, %ymm0
-0xc5 0xfc 0x10 0xc1
-
-# CHECK: vmovups %ymm0, %ymm1
-0xc5 0xfc 0x11 0xc1
-
-# CHECK: vmovups %ymm0, %ymm1
-0xc4 0xe1 0xfc 0x11 0xc1
-
-# CHECK: vmovaps %ymm1, %ymm0
-0xc5 0xfc 0x28 0xc1
-
-# CHECK: vmovaps %ymm0, %ymm1
-0xc5 0xfc 0x29 0xc1
-
-# CHECK: movdqa %xmm1, %xmm0
-0x66 0x0f 0x6f 0xc1
-
-# CHECK: movdqa %xmm0, %xmm1
-0x66 0x0f 0x7f 0xc1
-
-# CHECK: movdqu %xmm1, %xmm0
-0xf3 0x0f 0x6f 0xc1
-
-# CHECK: movdqu %xmm0, %xmm1
-0xf3 0x0f 0x7f 0xc1
-
-# CHECK: vmovdqa %xmm1, %xmm0
-0xc5 0xf9 0x6f 0xc1
-
-# CHECK: vmovdqa %xmm0, %xmm1
-0xc5 0xf9 0x7f 0xc1
-
-# CHECK: vmovdqa %ymm1, %ymm0
-0xc5 0xfd 0x6f 0xc1
-
-# CHECK: vmovdqa %ymm0, %ymm1
-0xc5 0xfd 0x7f 0xc1
-
-# CHECK: vmovdqu %xmm1, %xmm0
-0xc5 0xfa 0x6f 0xc1
-
-# CHECK: vmovdqu %xmm0, %xmm1
-0xc5 0xfa 0x7f 0xc1
-
-# CHECK: vmovdqu %ymm1, %ymm0
-0xc5 0xfe 0x6f 0xc1
-
-# CHECK: vmovdqu %ymm0, %ymm1
-0xc5 0xfe 0x7f 0xc1
-
-# CHECK: vblendvps %xmm4, %xmm1, %xmm2, %xmm3
-0xc4 0xe3 0x69 0x4a 0xd9 0x41
-
-# CHECK: vroundpd $0, %xmm0, %xmm0
-0xc4 0xe3 0x79 0x09 0xc0 0x00
-
-# CHECK: vroundps $0, %xmm0, %xmm0
-0xc4 0xe3 0x79 0x08 0xc0 0x00
-
-# CHECK: vroundpd $0, %ymm0, %ymm0
-0xc4 0xe3 0x7d 0x09 0xc0 0x00
-
-# CHECK: vroundps $0, %ymm0, %ymm0
-0xc4 0xe3 0x7d 0x08 0xc0 0x00
-
-# CHECK: vroundss $0, %xmm0, %xmm0, %xmm0
-0xc4 0xe3 0x79 0x0a 0xc0 0x00
-
-# CHECK: vroundsd $0, %xmm0, %xmm0, %xmm0
-0xc4 0xe3 0x79 0x0b 0xc0 0x00
-
-# CHECK: crc32b %al, %eax
-0xf2 0x0f 0x38 0xf0 0xc0
-
-# CHECK: crc32w %ax, %eax
-0x66 0xf2 0x0f 0x38 0xf1 0xc0
-
-# CHECK: crc32l %eax, %eax
-0xf2 0x0f 0x38 0xf1 0xc0
-
-# CHECK: crc32q %rax, %rax
-0xf2 0x48 0x0f 0x38 0xf1 0xc0
-
-# CHECK: invept (%rax), %rax
-0x66 0x0f 0x38 0x80 0x00
-
-# CHECK: invvpid (%rax), %rax
-0x66 0x0f 0x38 0x81 0x00
-
-# CHECK: invpcid (%rax), %rax
-0x66 0x0f 0x38 0x82 0x00
-
-# CHECK: nop
-0x90
-
-# CHECK: xchgl %r8d, %eax
-0x41 0x90
-
-# CHECK: xchgq %r8, %rax
-0x49 0x90
-
-# CHECK: xchgl %r9d, %eax
-0x41 0x91
-
-# CHECK: xchgq %r9, %rax
-0x49 0x91
-
-# CHECK: xchgl %ecx, %eax
-0x91
-
-# CHECK: xchgq %rcx, %rax
-0x48 0x91
-
-# CHECK: addb $0, %al
-0x04 0x00
-
-# CHECK: addw $0, %ax
-0x66 0x05 0x00 0x00
-
-# CHECK: addl $0, %eax
-0x05 0x00 0x00 0x00 0x00
-
-# CHECK: addq $0, %rax
-0x48 0x05 0x00 0x00 0x00 0x00
-
-# CHECK: adcb $0, %al
-0x14 0x00
-
-# CHECK: adcw $0, %ax
-0x66 0x15 0x00 0x00
-
-# CHECK: adcl $0, %eax
-0x15 0x00 0x00 0x00 0x00
-
-# CHECK: adcq $0, %rax
-0x48 0x15 0x00 0x00 0x00 0x00
-
-# CHECK: cmpb $0, %al
-0x3c 0x00
-
-# CHECK: cmpw $0, %ax
-0x66 0x3d 0x00 0x00
-
-# CHECK: cmpl $0, %eax
-0x3d 0x00 0x00 0x00 0x00
-
-# CHECK: cmpq $0, %rax
-0x48 0x3d 0x00 0x00 0x00 0x00
-
-# CHECK: testb $0, %al
-0xa8 0x00
-
-# CHECK: testw $0, %ax
-0x66 0xa9 0x00 0x00
-
-# CHECK: testl $0, %eax
-0xa9 0x00 0x00 0x00 0x00
-
-# CHECK: testq $0, %rax
-0x48 0xa9 0x00 0x00 0x00 0x00
-
-# CHECK: vaddps %xmm3, %xmm15, %xmm0
-0xc4 0xe1 0x00 0x58 0xc3
-
-# CHECK: movbel (%rax), %eax
-0x0f 0x38 0xf0 0x00
-
-# CHECK: movbel %eax, (%rax)
-0x0f 0x38 0xf1 0x00
-
-# CHECK: movbew (%rax), %ax
-0x66 0x0f 0x38 0xf0 0x00
-
-# CHECK: movbew %ax, (%rax)
-0x66 0x0f 0x38 0xf1 0x00
-
-# CHECK: movbeq (%rax), %rax
-0x48 0x0f 0x38 0xf0 0x00
-
-# CHECK: movbeq %rax, (%rax)
-0x48 0x0f 0x38 0xf1 0x00
-
-# CHECK: rdrandw %ax
-0x66 0x0f 0xc7 0xf0
-
-# CHECK: rdrandl %eax
-0x0f 0xc7 0xf0
-
-# CHECK: rdrandq %rax
-0x48 0x0f 0xc7 0xf0
-
-# CHECK: vroundss $0, %xmm0, %xmm0, %xmm0
-0xc4 0xe3 0x7d 0x0a 0xc0 0x00
-
-# CHECK: vroundsd $0, %xmm0, %xmm0, %xmm0
-0xc4 0xe3 0x7d 0x0b 0xc0 0x00
-
-# CHECK: vcvtsd2si %xmm0, %eax
-0xc4 0xe1 0x7f 0x2d 0xc0
-
-# CHECK: vcvtsd2si %xmm0, %rax
-0xc4 0xe1 0xff 0x2d 0xc0
-
-# CHECK: vucomisd %xmm1, %xmm0
-0xc5 0xfd 0x2e 0xc1
-
-# CHECK: vucomiss %xmm1, %xmm0
-0xc5 0xfc 0x2e 0xc1
-
-# CHECK: vcomisd %xmm1, %xmm0
-0xc5 0xfd 0x2f 0xc1
-
-# CHECK: vcomiss %xmm1, %xmm0
-0xc5 0xfc 0x2f 0xc1
-
-# CHECK: vaddss %xmm1, %xmm0, %xmm0
-0xc5 0xfe 0x58 0xc1
-
-# CHECK: xsave (%rax)
-0x0f 0xae 0x20
-
-# CHECK: xrstor (%rax)
-0x0f 0xae 0x28
-
-# CHECK: xsaveopt (%rax)
-0x0f 0xae 0x30
-
-# CHECK: rdfsbasel %eax
-0xf3 0x0f 0xae 0xc0
-
-# CHECK: rdgsbasel %eax
-0xf3 0x0f 0xae 0xc8
-
-# CHECK: wrfsbasel %eax
-0xf3 0x0f 0xae 0xd0
-
-# CHECK: wrgsbasel %eax
-0xf3 0x0f 0xae 0xd8
-
-# CHECK: rdfsbaseq %rax
-0xf3 0x48 0x0f 0xae 0xc0
-
-# CHECK: rdgsbaseq %rax
-0xf3 0x48 0x0f 0xae 0xc8
-
-# CHECK: wrfsbaseq %rax
-0xf3 0x48 0x0f 0xae 0xd0
-
-# CHECK: wrgsbaseq %rax
-0xf3 0x48 0x0f 0xae 0xd8
-
-# CHECK: vcvtph2ps %xmm0, %xmm0
-0xc4 0xe2 0x79 0x13 0xc0
-
-# CHECK: vcvtph2ps (%rax), %xmm0
-0xc4 0xe2 0x79 0x13 0x00
-
-# CHECK: vcvtph2ps %xmm0, %ymm0
-0xc4 0xe2 0x7d 0x13 0xc0
-
-# CHECK: vcvtph2ps (%rax), %ymm0
-0xc4 0xe2 0x7d 0x13 0x00
-
-# CHECK: vcvtps2ph $0, %xmm0, %xmm0
-0xc4 0xe3 0x79 0x1d 0xc0 0x00
-
-# CHECK: vcvtps2ph $0, %xmm0, (%rax)
-0xc4 0xe3 0x79 0x1d 0x00 0x00
-
-# CHECK: vcvtps2ph $0, %ymm0, %xmm0
-0xc4 0xe3 0x7d 0x1d 0xc0 0x00
-
-# CHECK: vcvtps2ph $0, %ymm0, (%rax)
-0xc4 0xe3 0x7d 0x1d 0x00 0x00
-
-# CHECK: popcntl %eax, %eax
-0xf3 0x0f 0xb8 0xc0
-
-# CHECK: popcntw %ax, %ax
-0x66 0xf3 0x0f 0xb8 0xc0
-
-# CHECK: popcntq %rax, %rax
-0xf3 0x48 0x0f 0xb8 0xc0
-
-# CHECK: lzcntl %eax, %eax
-0xf3 0x0f 0xbd 0xc0
-
-# CHECK: lzcntw %ax, %ax
-0x66 0xf3 0x0f 0xbd 0xc0
-
-# CHECK: lzcntq %rax, %rax
-0xf3 0x48 0x0f 0xbd 0xc0
-
-# CHECK: tzcntl %eax, %eax
-0xf3 0x0f 0xbc 0xc0
-
-# CHECK: tzcntw %ax, %ax
-0x66 0xf3 0x0f 0xbc 0xc0
-
-# CHECK: tzcntq %rax, %rax
-0xf3 0x48 0x0f 0xbc 0xc0
-
-# CHECK: andnl %ecx, %r15d, %eax
-0xc4 0xe2 0x00 0xf2 0xc1
-
-# CHECK: andnq %rax, %r15, %rax
-0xc4 0xe2 0x80 0xf2 0xc0
-
-# CHECK: andnl (%rax), %r15d, %eax
-0xc4 0xe2 0x00 0xf2 0x00
-
-# CHECK: andnq (%rax), %r15, %rax
-0xc4 0xe2 0x80 0xf2 0x00
-
-# CHECK: blsrl (%rax), %r15d
-0xc4 0xe2 0x00 0xf3 0x08
-
-# CHECK: blsrq (%rax), %r15
-0xc4 0xe2 0x80 0xf3 0x08
-
-# CHECK: blsmskl (%rax), %r15d
-0xc4 0xe2 0x00 0xf3 0x10
-
-# CHECK: blsmskq (%rax), %r15
-0xc4 0xe2 0x80 0xf3 0x10
-
-# CHECK: blsil (%rax), %r15d
-0xc4 0xe2 0x00 0xf3 0x18
-
-# CHECK: blsiq (%rax), %r15
-0xc4 0xe2 0x80 0xf3 0x18
-
-# CHECK: bextrl %r12d, (%rax), %r10d
-0xc4 0x62 0x18 0xf7 0x10
-
-# CHECK: bextrl %r12d, %r11d, %r10d
-0xc4 0x42 0x18 0xf7 0xd3
-
-# CHECK: bextrq %r12, (%rax), %r10
-0xc4 0x62 0x98 0xf7 0x10
-
-# CHECK: bextrq %r12, %r11, %r10
-0xc4 0x42 0x98 0xf7 0xd3
-
-# CHECK: bzhil %r12d, (%rax), %r10d
-0xc4 0x62 0x18 0xf5 0x10
-
-# CHECK: bzhil %r12d, %r11d, %r10d
-0xc4 0x42 0x18 0xf5 0xd3
-
-# CHECK: bzhiq %r12, (%rax), %r10
-0xc4 0x62 0x98 0xf5 0x10
-
-# CHECK: bzhiq %r12, %r11, %r10
-0xc4 0x42 0x98 0xf5 0xd3
-
-# CHECK: pextl %r12d, %r11d, %r10d
-0xc4 0x42 0x22 0xf5 0xd4
-
-# CHECK: pextl (%rax), %r11d, %r10d
-0xc4 0x62 0x22 0xf5 0x10
-
-# CHECK: pextq %r12, %r11, %r10
-0xc4 0x42 0xa2 0xf5 0xd4
-
-# CHECK: pextq (%rax), %r11, %r10
-0xc4 0x62 0xa2 0xf5 0x10
-
-# CHECK: pdepl %r12d, %r11d, %r10d
-0xc4 0x42 0x23 0xf5 0xd4
-
-# CHECK: pdepl (%rax), %r11d, %r10d
-0xc4 0x62 0x23 0xf5 0x10
-
-# CHECK: pdepq %r12, %r11, %r10
-0xc4 0x42 0xa3 0xf5 0xd4
-
-# CHECK: pdepq (%rax), %r11, %r10
-0xc4 0x62 0xa3 0xf5 0x10
-
-# CHECK: mulxl %r12d, %r11d, %r10d
-0xc4 0x42 0x23 0xf6 0xd4
-
-# CHECK: mulxl (%rax), %r11d, %r10d
-0xc4 0x62 0x23 0xf6 0x10
-
-# CHECK: mulxq %r12, %r11, %r10
-0xc4 0x42 0xa3 0xf6 0xd4
-
-# CHECK: mulxq (%rax), %r11, %r10
-0xc4 0x62 0xa3 0xf6 0x10
-
-# CHECK: rorxl $1, %r12d, %r10d
-0xc4 0x43 0x7b 0xf0 0xd4 0x01
-
-# CHECK: rorxl $31, (%rax), %r10d
-0xc4 0x63 0x7b 0xf0 0x10 0x1f
-
-# CHECK: rorxq $1, %r12, %r10
-0xc4 0x43 0xfb 0xf0 0xd4 0x01
-
-# CHECK: rorxq $63, (%rax), %r10
-0xc4 0x63 0xfb 0xf0 0x10 0x3f
-
-# CHECK: shlxl %r12d, (%rax), %r10d
-0xc4 0x62 0x19 0xf7 0x10
-
-# CHECK: shlxl %r12d, %r11d, %r10d
-0xc4 0x42 0x19 0xf7 0xd3
-
-# CHECK: shlxq %r12, (%rax), %r10
-0xc4 0x62 0x99 0xf7 0x10
-
-# CHECK: shlxq %r12, %r11, %r10
-0xc4 0x42 0x99 0xf7 0xd3
-
-# CHECK: sarxl %r12d, (%rax), %r10d
-0xc4 0x62 0x1a 0xf7 0x10
-
-# CHECK: sarxl %r12d, %r11d, %r10d
-0xc4 0x42 0x1a 0xf7 0xd3
-
-# CHECK: sarxq %r12, (%rax), %r10
-0xc4 0x62 0x9a 0xf7 0x10
-
-# CHECK: sarxq %r12, %r11, %r10
-0xc4 0x42 0x9a 0xf7 0xd3
-
-# CHECK: shrxl %r12d, (%rax), %r10d
-0xc4 0x62 0x1b 0xf7 0x10
-
-# CHECK: shrxl %r12d, %r11d, %r10d
-0xc4 0x42 0x1b 0xf7 0xd3
-
-# CHECK: shrxq %r12, (%rax), %r10
-0xc4 0x62 0x9b 0xf7 0x10
-
-# CHECK: shrxq %r12, %r11, %r10
-0xc4 0x42 0x9b 0xf7 0xd3
-
-# CHECK: vfmadd132ps %xmm11, %xmm12, %xmm10
-0xc4 0x42 0x19 0x98 0xd3
-
-# CHECK: vfmadd132pd %xmm11, %xmm12, %xmm10
-0xc4 0x42 0x99 0x98 0xd3
-
-# CHECK: vfmadd132ps %ymm11, %ymm12, %ymm10
-0xc4 0x42 0x1d 0x98 0xd3
-
-# CHECK: vfmadd132pd %ymm11, %ymm12, %ymm10
-0xc4 0x42 0x9d 0x98 0xd3
-
-# CHECK: vfmadd132ps (%rax), %xmm12, %xmm10
-0xc4 0x62 0x19 0x98 0x10
-
-# CHECK: vfmadd132pd (%rax), %xmm12, %xmm10
-0xc4 0x62 0x99 0x98 0x10
-
-# CHECK: vfmadd132ps (%rax), %ymm12, %ymm10
-0xc4 0x62 0x1d 0x98 0x10
-
-# CHECK: vfmadd132pd (%rax), %ymm12, %ymm10
-0xc4 0x62 0x9d 0x98 0x10
-
-# CHECK: vfmadd132ss %xmm11, %xmm12, %xmm10
-0xc4 0x42 0x19 0x99 0xd3
-
-# CHECK: vfmadd132sd %xmm11, %xmm12, %xmm10
-0xc4 0x42 0x99 0x99 0xd3
-
-# CHECK: vfmadd132ss (%rax), %xmm12, %xmm10
-0xc4 0x62 0x19 0x99 0x10
-
-# CHECK: vfmadd132sd (%rax), %xmm12, %xmm10
-0xc4 0x62 0x99 0x99 0x10
-
-# CHECK: vfmaddss (%rcx), %xmm1, %xmm0, %xmm0
-0xc4 0xe3 0xf9 0x6a 0x01 0x10
-
-# CHECK: vfmaddss %xmm1, (%rcx), %xmm0, %xmm0
-0xc4 0xe3 0x79 0x6a 0x01 0x10
-
-# CHECK: vfmaddss (%rcx), %xmm1, %xmm0, %xmm0
-0xc4 0xe3 0xfd 0x6a 0x01 0x10
-
-# CHECK: vfmaddss %xmm1, (%rcx), %xmm0, %xmm0
-0xc4 0xe3 0x7d 0x6a 0x01 0x10
-
-# CHECK: vfmaddss %xmm2, %xmm1, %xmm0, %xmm0
-0xc4 0xe3 0xf9 0x6a 0xc2 0x10
-
-# CHECK: vfmaddss %xmm1, %xmm2, %xmm0, %xmm0
-0xc4 0xe3 0x79 0x6a 0xc2 0x10
-
-# CHECK: vfmaddss %xmm2, %xmm1, %xmm0, %xmm0
-0xc4 0xe3 0xfd 0x6a 0xc2 0x10
-
-# CHECK: vfmaddss %xmm1, %xmm2, %xmm0, %xmm0
-0xc4 0xe3 0x7d 0x6a 0xc2 0x10
-
-# CHECK: vfmaddps  (%rcx), %xmm1, %xmm0, %xmm0
-0xc4 0xe3 0xf9 0x68 0x01 0x10
-
-# CHECK: vfmaddps   %xmm1, (%rcx), %xmm0, %xmm0
-0xc4 0xe3 0x79 0x68 0x01 0x10
-
-# CHECK: vfmaddps   %xmm1, %xmm2, %xmm0, %xmm0
-0xc4 0xe3 0x79 0x68 0xc2 0x10
-
-# CHECK: vfmaddps   %xmm2, %xmm1, %xmm0, %xmm0
-0xc4 0xe3 0xf9 0x68 0xc2 0x10
-
-# CHECK: vfmaddps  (%rcx), %ymm1, %ymm0, %ymm0
-0xc4 0xe3 0xfd 0x68 0x01 0x10
-
-# CHECK: vfmaddps   %ymm1, (%rcx), %ymm0, %ymm0
-0xc4 0xe3 0x7d 0x68 0x01 0x10
-
-# CHECK: vfmaddps   %ymm1, %ymm2, %ymm0, %ymm0
-0xc4 0xe3 0x7d 0x68 0xc2 0x10
-
-# CHECK: vfmaddps   %ymm2, %ymm1, %ymm0, %ymm0
-0xc4 0xe3 0xfd 0x68 0xc2 0x10
-
-# CHECK: vpermil2ps $0, %xmm4, %xmm3, %xmm2, %xmm1
-0xc4 0xe3 0x69 0x48 0xcb 0x40
-
-# CHECK: vpermil2ps $1, 4(%rax), %xmm2, %xmm3, %xmm0
-0xc4 0xe3 0xe1 0x48 0x40 0x04 0x21
-
-# CHECK: vpermil2ps $2, (%rax), %ymm1, %ymm5, %ymm6
-0xc4 0xe3 0xd5 0x48 0x30 0x12
-
-# CHECK: vpermil2ps $3, %xmm1, (%rax), %xmm3, %xmm4
-0xc4 0xe3 0x61 0x48 0x20 0x13
-
-# CHECK: vpermil2ps $0, %ymm4, %ymm4, %ymm2, %ymm2
-0xc4 0xe3 0x6d 0x48 0xd4 0x40
-
-# CHECK: vpermil2pd $1, %ymm1, 4(%rax), %ymm1, %ymm0
-0xc4 0xe3 0x75 0x49 0x40 0x04 0x11
-
-# CHECK: vgatherdpd %xmm0, (%rdi,%xmm1,2), %xmm2
-0xc4 0xe2 0xf9 0x92 0x14 0x4f
-
-# CHECK: vgatherdpd %ymm0, (%rdi,%xmm1,2), %ymm2
-0xc4 0xe2 0xfd 0x92 0x14 0x4f
-
-# CHECK: vgatherqps %xmm8, (%r15,%xmm9,2), %xmm10
-0xc4 0x02 0x39 0x93 0x14 0x4f
-
-# CHECK: vgatherqps %xmm8, (%r15,%ymm9,2), %xmm10
-0xc4 0x02 0x3d 0x93 0x14 0x4f
-
-# CHECK: vpgatherdq %xmm0, (%rdi,%xmm1,2), %xmm2
-0xc4 0xe2 0xf9 0x90 0x14 0x4f
-
-# CHECK: vpgatherdq %ymm0, (%rdi,%xmm1,2), %ymm2
-0xc4 0xe2 0xfd 0x90 0x14 0x4f
-
-# CHECK: vpgatherqd %xmm8, (%r15,%xmm9,2), %xmm10
-0xc4 0x02 0x39 0x91 0x14 0x4f
-
-# CHECK: vpgatherqd %xmm8, (%r15,%ymm9,2), %xmm10
-0xc4 0x02 0x3d 0x91 0x14 0x4f
-
-# rdar://8812056 lldb doesn't print the x86 lock prefix when disassembling
-# CHECK: lock
-# CHECK-NEXT: xaddq %rcx, %rbx
-0xf0 0x48 0x0f 0xc1 0xcb
-
-# rdar://13493622 lldb doesn't print the x86 rep/repne prefix when disassembling
-# CHECK: repne
-# CHECK-NEXT: movsl
-0xf2 0xa5
-# CHECK: repne
-# CHECK-NEXT: movsq
-0xf2 0x48 0xa5
-# CHECK: repne
-# CHECK-NEXT: movb  $0, (%rax)
-0xf2 0xc6 0x0 0x0
-
-# rdar://11019859 Support 2013 Haswell RTM instructions and HLE prefixes
-# CHECK: xrelease
-# CHECK-NEXT: lock
-# CHECK-NEXT: incl   (%rax)
-0xf3 0xf0 0xff 0x00
-
-# CHECK: xrelease
-# CHECK-NEXT: xchgl %ebx, %eax
-0xf3 0x93
-# CHECK: xrelease
-# CHECK-NEXT: xchgl %ebx, (%rax)
-0xf3 0x87 0x18
-# CHECK: xrelease
-# CHECK-NEXT: movb %al, (%rbx)
-0xf3 0x88 0x03
-# CHECK: xrelease
-# CHECK-NEXT: movl %eax, (%rbx)
-0xf3 0x89 0x03
-# CHECK: xrelease
-# CHECK-NEXT: movb $1, (%rbx)
-0xf3 0xc6 0x03 0x01
-# CHECK: xrelease
-# CHECK-NEXT: movl $1, (%rbx)
-0xf3 0xc7 0x03 0x01 0x00 0x00 0x00
-
-# CHECK: xacquire
-# CHECK-NEXT: xchgl %ebx, %eax
-0xf2 0x93
-# CHECK: xacquire
-# CHECK-NEXT: xchgl %ebx, (%rax)
-0xf2 0x87 0x18
-
-# CHECK: bextr $2814, %edi, %eax
-0x8f 0xea 0x78 0x10 0xc7 0xfe 0x0a 0x00 0x00
-
-# CHECK: blci %rdi, %rax
-0x8f 0xe9 0xf8 0x02 0xf7
-
-# CHECK: vpcmov %xmm1, %xmm2, %xmm3, %xmm4
-0x8f 0xe8 0x60 0xa2 0xe2 0x10
-
-# CHECK: vpcmov (%rax), %xmm2, %xmm3, %xmm4
-0x8f 0xe8 0xe0 0xa2 0x20 0x20
-
-# CHECK: vpcmov %xmm1, (%rax), %xmm3, %xmm4
-0x8f 0xe8 0x60 0xa2 0x20 0x10
-
-# CHECK: vpcmov %ymm1, %ymm2, %ymm3, %ymm4
-0x8f 0xe8 0x64 0xa2 0xe2 0x10
-
-# CHECK: vpcmov %ymm2, %ymm1, %ymm3, %ymm4
-0x8f 0xe8 0xe4 0xa2 0xe2 0x10
-
-# CHECK: vpcmov (%rax), %ymm2, %ymm3, %ymm4
-0x8f 0xe8 0xe4 0xa2 0x20 0x20
-
-# CHECK: vpcmov %ymm1, (%rax), %ymm3, %ymm4
-0x8f 0xe8 0x64 0xa2 0x20 0x10
-
-# CHECK: vpermil2pd $0, %xmm3, %xmm2, %xmm1, %xmm0
-0xc4 0xe3 0x71 0x49 0xc2 0x30
-
-# CHECK: vpermil2pd $0, %xmm2, %xmm3, %xmm1, %xmm0
-0xc4 0xe3 0xf1 0x49 0xc2 0x30
-
-# CHECK: vpcomeqb  %xmm6, %xmm4, %xmm2
-0x8f 0xe8 0x58 0xcc 0xd6 0x04
-
-# CHECK: vpcomneqb 8(%rax), %xmm3, %xmm2
-0x8f 0xe8 0x60 0xcc 0x50 0x08 0x05
-
-# CHECK: vpcomb $55, %xmm6, %xmm4, %xmm2
-0x8f 0xe8 0x58 0xcc 0xd6 0x37
-
-# CHECK: vpcomb $56, 8(%rax), %xmm3, %xmm2
-0x8f 0xe8 0x60 0xcc 0x50 0x08 0x38
-
-# CHECK: vpmacsdd %xmm4, %xmm6, %xmm4, %xmm2
-0x8f 0xe8 0x58 0x9e 0xd6 0x40
-# CHECK: vpmacsdd %xmm4, (%rax,%rcx), %xmm4, %xmm3
-0x8f 0xe8 0x58 0x9e 0x1c 0x08 0x40
-
-# CHECK: vprotd (%rax), %xmm0, %xmm3
-0x8f 0xe9 0xf8 0x92 0x18
-# CHECK: vprotd %xmm2, (%rax,%rcx), %xmm4
-0x8f 0xe9 0x68 0x92 0x24 0x08
-# CHECK: vprotd %xmm5, %xmm3, %xmm2
-0x8f 0xe9 0x50 0x92 0xd3
-# CHECK: vprotd $43, (%rcx), %xmm6
-0x8f 0xe8 0x78 0xc2 0x31 0x2b
-# CHECK: vprotd $44, (%rax,%rcx), %xmm7
-0x8f 0xe8 0x78 0xc2 0x3c 0x08 0x2c
-# CHECK: vprotd $45, %xmm4, %xmm4
-0x8f 0xe8 0x78 0xc2 0xe4 0x2d
-
-# CHECK: vfrczps 4(%rax), %xmm3
-0x8f 0xe9 0x78 0x80 0x58 0x04
-# CHECK: vfrczps %xmm6, %xmm5
-0x8f 0xe9 0x78 0x80 0xee
-# CHECK: vfrczps (%rcx), %xmm1
-0x8f 0xe9 0x78 0x80 0x09
-# CHECK: vfrczps %ymm2, %ymm4
-0x8f 0xe9 0x7c 0x80 0xe2
+# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 | FileCheck %s
+
+# CHECK: int  $33
+0xCD 0x21 
+
+# CHECK: int  $33
+0xCD 0x21
+
+# CHECK: icebp
+0xf1
+
+# CHECK: int3
+0xcc
+
+# CHECK: jrcxz -127
+0xe3 0x81
+
+# CHECK: jecxz -127
+0x67 0xe3 0x81
+
+# CHECK: addb %al, (%rax)
+0 0
+
+# CHECK: callq  -1234
+0xe8 0x2e 0xfb 0xff 0xff
+
+# CHECK: lfence
+0x0f 0xae 0xe8
+
+# CHECK: mfence
+0x0f 0xae 0xf0
+
+# CHECK: monitor
+0x0f 0x01 0xc8
+
+# CHECK: mwait
+0x0f 0x01 0xc9
+
+# CHECK: vmcall
+0x0f 0x01 0xc1
+
+# CHECK: vmfunc
+0x0f 0x01 0xd4
+
+# CHECK: vmlaunch
+0x0f 0x01 0xc2
+
+# CHECK: vmresume
+0x0f 0x01 0xc3
+
+# CHECK: vmxoff
+0x0f 0x01 0xc4
+
+# CHECK: swapgs
+0x0f 0x01 0xf8
+
+# CHECK: rdtscp
+0x0f 0x01 0xf9
+
+# CHECK: monitorx 
+0x0f 0x01 0xfa
+
+# CHECK: mwaitx 
+0x0f 0x01 0xfb
+
+# CHECK: vmxon
+0xf3 0x0f 0xc7 0x30
+
+# CHECK: vmptrld
+0x0f 0xc7 0x30
+
+# CHECK: vmptrst
+0x0f 0xc7 0x38
+
+# CHECK: vmrun
+0x0f 0x01 0xd8
+
+# CHECK: vmmcall
+0x0f 0x01 0xd9
+
+# CHECK: vmload
+0x0f 0x01 0xda
+
+# CHECK: vmsave
+0x0f 0x01 0xdb
+
+# CHECK: stgi
+0x0f 0x01 0xdc
+
+# CHECK: clgi
+0x0f 0x01 0xdd
+
+# CHECK: skinit
+0x0f 0x01 0xde
+
+# CHECK: invlpga
+0x0f 0x01 0xdf
+
+# CHECK: movl $0, -4(%rbp)
+0xc7 0x45 0xfc 0x00 0x00 0x00 0x00
+
+# CHECK: movq %cr0, %rcx
+0x0f 0x20 0xc1
+
+# CHECK: leaw 4(%esp), %cx
+0x67 0x66 0x8d 0x4c 0x24 0x04 
+
+# CHECK: leal 4(%esp), %ecx
+0x67 0x8d 0x4c 0x24 0x04 
+
+# CHECK: leaq 4(%esp), %rcx
+0x67 0x48 0x8d 0x4c 0x24 0x04 
+
+# CHECK: leaw 4(%rsp), %cx
+0x66 0x8d 0x4c 0x24 0x04 
+
+# CHECK: leal 4(%rsp), %ecx
+0x8d 0x4c 0x24 0x04 
+
+# CHECK: leaq 4(%rsp), %rcx
+0x48 0x8d 0x4c 0x24 0x04 
+
+# CHECK: enter  $1, $2
+0xc8 0x01 0x00 0x02
+
+# CHECK: movw $47416, -66(%rbp)
+0x66 0xc7 0x45 0xbe 0x38 0xb9
+
+# CHECK: vaddpd %ymm13, %ymm1, %ymm0
+0xc4 0xc1 0x75 0x58 0xc5
+
+# CHECK: vaddps %ymm3, %ymm1, %ymm0
+0xc5 0xf4 0x58 0xc3
+
+# CHECK: vandpd %ymm13, %ymm1, %ymm0
+0xc4 0xc1 0x75 0x54 0xc5
+
+# CHECK: vandps %ymm3, %ymm1, %ymm0
+0xc5 0xf4 0x54 0xc3
+
+# CHECK: vzeroall
+0xc5 0xfc 0x77
+
+# CHECK: vcvtps2pd %xmm0, %ymm0
+0xc5 0xfc 0x5a 0xc0
+
+# CHECK: vandps (%rdx), %xmm1, %xmm7
+0xc5 0xf0 0x54 0x3a
+
+# CHECK: vcvtss2si %xmm0, %eax
+0xc5 0xfa 0x2d 0xc0
+
+# CHECK: vcvtsd2si %xmm0, %eax
+0xc5 0xfb 0x2d 0xc0
+
+# CHECK: vcvtsd2si %xmm0, %rax
+0xc4 0xe1 0xfb 0x2d 0xc0
+
+# CHECK: vcvtsd2si %xmm0, %rax
+0xc4 0xe1 0xff 0x2d 0xc0
+
+# CHECK: vmaskmovpd %xmm0, %xmm1, (%rax)
+0xc4 0xe2 0x71 0x2f 0x00
+
+# CHECK: vmovapd %xmm0, %xmm2
+0xc5 0xf9 0x28 0xd0
+
+# Check X86 immediates print as signed values by default.  radr://8795217
+# CHECK: andq $-16, %rsp
+0x48 0x83 0xe4 0xf0
+
+# Check these special case instructions that the immediate is not sign-extend.
+# CHECK: blendps $129, %xmm2, %xmm1
+0x66 0x0f 0x3a 0x0c 0xca 0x81
+
+# CHECK: blendpd $129, %xmm2, %xmm1
+0x66 0x0f 0x3a 0x0d 0xca 0x81
+
+# CHECK: pblendw $129, %xmm2, %xmm1
+0x66 0x0f 0x3a 0x0e 0xca 0x81
+
+# CHECK: mpsadbw $129, %xmm2, %xmm1
+0x66 0x0f 0x3a 0x42 0xca 0x81
+
+# CHECK: dpps $129, %xmm2, %xmm1
+0x66 0x0f 0x3a 0x40 0xca 0x81
+
+# CHECK: dppd $129, %xmm2, %xmm1
+0x66 0x0f 0x3a 0x41 0xca 0x81
+
+# CHECK: insertps $129, %xmm2, %xmm1
+0x66 0x0f 0x3a 0x21 0xca 0x81
+
+# CHECK: vblendps $129, %ymm2, %ymm5, %ymm1
+0xc4 0xe3 0x55 0x0c 0xca 0x81
+
+# CHECK: vblendps $129, (%rax), %ymm5, %ymm1
+0xc4 0xe3 0x55 0x0c 0x08 0x81
+
+# CHECK: vblendpd $129, %ymm2, %ymm5, %ymm1
+0xc4 0xe3 0x55 0x0d 0xca 0x81
+
+# CHECK: vblendpd $129, (%rax), %ymm5, %ymm1
+0xc4 0xe3 0x55 0x0d 0x08 0x81
+
+# CHECK: vpblendw $129, %xmm2, %xmm5, %xmm1
+0xc4 0xe3 0x51 0x0e 0xca 0x81
+
+# CHECK: vmpsadbw $129, %xmm2, %xmm5, %xmm1
+0xc4 0xe3 0x51 0x42 0xca 0x81
+
+# CHECK: vdpps $129, %ymm2, %ymm5, %ymm1
+0xc4 0xe3 0x55 0x40 0xca 0x81
+
+# CHECK: vdpps $129, (%rax), %ymm5, %ymm1
+0xc4 0xe3 0x55 0x40 0x08 0x81
+
+# CHECK: vdppd $129, %xmm2, %xmm5, %xmm1
+0xc4 0xe3 0x51 0x41 0xca 0x81
+
+# CHECK: vinsertps $129, %xmm3, %xmm2, %xmm1
+0xc4 0xe3 0x69 0x21 0xcb 0x81
+
+# CHECK: pause
+0xf3 0x90
+
+# CHECK: addl %eax, %edi
+0x01 0xc7
+
+# CHECK: addl %edi, %eax
+0x03 0xc7
+
+# CHECK: movl %eax, %edi
+0x89 0xc7
+
+# CHECK: movl %edi, %eax
+0x8b 0xc7
+
+# CHECK: movups %xmm1, %xmm0
+0x0f 0x10 0xc1
+
+# CHECK: movups %xmm0, %xmm1
+0x0f 0x11 0xc1
+
+# CHECK: movaps %xmm1, %xmm0
+0x0f 0x28 0xc1
+
+# CHECK: movaps %xmm0, %xmm1
+0x0f 0x29 0xc1
+
+# CHECK: movupd %xmm1, %xmm0
+0x66 0x0f 0x10 0xc1
+
+# CHECK: movupd %xmm0, %xmm1
+0x66 0x0f 0x11 0xc1
+
+# CHECK: movapd %xmm1, %xmm0
+0x66 0x0f 0x28 0xc1
+
+# CHECK: movapd %xmm0, %xmm1
+0x66 0x0f 0x29 0xc1
+
+# CHECK: vmovups %xmm1, %xmm0
+0xc5 0xf8 0x10 0xc1
+
+# CHECK: vmovups %xmm0, %xmm1
+0xc5 0xf8 0x11 0xc1
+
+# CHECK: vmovaps %xmm1, %xmm0
+0xc5 0xf8 0x28 0xc1
+
+# CHECK: vmovaps %xmm0, %xmm1
+0xc5 0xf8 0x29 0xc1
+
+# CHECK: vmovupd %xmm1, %xmm0
+0xc5 0xf9 0x10 0xc1
+
+# CHECK: vmovupd %xmm0, %xmm1
+0xc5 0xf9 0x11 0xc1
+
+# CHECK: vmovapd %xmm1, %xmm0
+0xc5 0xf9 0x28 0xc1
+
+# CHECK: vmovapd %xmm0, %xmm1
+0xc5 0xf9 0x29 0xc1
+
+# CHECK: vmovups %ymm1, %ymm0
+0xc5 0xfc 0x10 0xc1
+
+# CHECK: vmovups %ymm0, %ymm1
+0xc5 0xfc 0x11 0xc1
+
+# CHECK: vmovups %ymm0, %ymm1
+0xc4 0xe1 0xfc 0x11 0xc1
+
+# CHECK: vmovaps %ymm1, %ymm0
+0xc5 0xfc 0x28 0xc1
+
+# CHECK: vmovaps %ymm0, %ymm1
+0xc5 0xfc 0x29 0xc1
+
+# CHECK: movdqa %xmm1, %xmm0
+0x66 0x0f 0x6f 0xc1
+
+# CHECK: movdqa %xmm0, %xmm1
+0x66 0x0f 0x7f 0xc1
+
+# CHECK: movdqu %xmm1, %xmm0
+0xf3 0x0f 0x6f 0xc1
+
+# CHECK: movdqu %xmm0, %xmm1
+0xf3 0x0f 0x7f 0xc1
+
+# CHECK: vmovdqa %xmm1, %xmm0
+0xc5 0xf9 0x6f 0xc1
+
+# CHECK: vmovdqa %xmm0, %xmm1
+0xc5 0xf9 0x7f 0xc1
+
+# CHECK: vmovdqa %ymm1, %ymm0
+0xc5 0xfd 0x6f 0xc1
+
+# CHECK: vmovdqa %ymm0, %ymm1
+0xc5 0xfd 0x7f 0xc1
+
+# CHECK: vmovdqu %xmm1, %xmm0
+0xc5 0xfa 0x6f 0xc1
+
+# CHECK: vmovdqu %xmm0, %xmm1
+0xc5 0xfa 0x7f 0xc1
+
+# CHECK: vmovdqu %ymm1, %ymm0
+0xc5 0xfe 0x6f 0xc1
+
+# CHECK: vmovdqu %ymm0, %ymm1
+0xc5 0xfe 0x7f 0xc1
+
+# CHECK: vblendvps %xmm4, %xmm1, %xmm2, %xmm3
+0xc4 0xe3 0x69 0x4a 0xd9 0x41
+
+# CHECK: vroundpd $0, %xmm0, %xmm0
+0xc4 0xe3 0x79 0x09 0xc0 0x00
+
+# CHECK: vroundps $0, %xmm0, %xmm0
+0xc4 0xe3 0x79 0x08 0xc0 0x00
+
+# CHECK: vroundpd $0, %ymm0, %ymm0
+0xc4 0xe3 0x7d 0x09 0xc0 0x00
+
+# CHECK: vroundps $0, %ymm0, %ymm0
+0xc4 0xe3 0x7d 0x08 0xc0 0x00
+
+# CHECK: vroundss $0, %xmm0, %xmm0, %xmm0
+0xc4 0xe3 0x79 0x0a 0xc0 0x00
+
+# CHECK: vroundsd $0, %xmm0, %xmm0, %xmm0
+0xc4 0xe3 0x79 0x0b 0xc0 0x00
+
+# CHECK: crc32b %al, %eax
+0xf2 0x0f 0x38 0xf0 0xc0
+
+# CHECK: crc32w %ax, %eax
+0x66 0xf2 0x0f 0x38 0xf1 0xc0
+
+# CHECK: crc32l %eax, %eax
+0xf2 0x0f 0x38 0xf1 0xc0
+
+# CHECK: crc32q %rax, %rax
+0xf2 0x48 0x0f 0x38 0xf1 0xc0
+
+# CHECK: invept (%rax), %rax
+0x66 0x0f 0x38 0x80 0x00
+
+# CHECK: invvpid (%rax), %rax
+0x66 0x0f 0x38 0x81 0x00
+
+# CHECK: invpcid (%rax), %rax
+0x66 0x0f 0x38 0x82 0x00
+
+# CHECK: nop
+0x90
+
+# CHECK: xchgl %r8d, %eax
+0x41 0x90
+
+# CHECK: xchgq %r8, %rax
+0x49 0x90
+
+# CHECK: xchgl %r9d, %eax
+0x41 0x91
+
+# CHECK: xchgq %r9, %rax
+0x49 0x91
+
+# CHECK: xchgl %ecx, %eax
+0x91
+
+# CHECK: xchgq %rcx, %rax
+0x48 0x91
+
+# CHECK: addb $0, %al
+0x04 0x00
+
+# CHECK: addw $0, %ax
+0x66 0x05 0x00 0x00
+
+# CHECK: addl $0, %eax
+0x05 0x00 0x00 0x00 0x00
+
+# CHECK: addq $0, %rax
+0x48 0x05 0x00 0x00 0x00 0x00
+
+# CHECK: adcb $0, %al
+0x14 0x00
+
+# CHECK: adcw $0, %ax
+0x66 0x15 0x00 0x00
+
+# CHECK: adcl $0, %eax
+0x15 0x00 0x00 0x00 0x00
+
+# CHECK: adcq $0, %rax
+0x48 0x15 0x00 0x00 0x00 0x00
+
+# CHECK: cmpb $0, %al
+0x3c 0x00
+
+# CHECK: cmpw $0, %ax
+0x66 0x3d 0x00 0x00
+
+# CHECK: cmpl $0, %eax
+0x3d 0x00 0x00 0x00 0x00
+
+# CHECK: cmpq $0, %rax
+0x48 0x3d 0x00 0x00 0x00 0x00
+
+# CHECK: testb $0, %al
+0xa8 0x00
+
+# CHECK: testw $0, %ax
+0x66 0xa9 0x00 0x00
+
+# CHECK: testl $0, %eax
+0xa9 0x00 0x00 0x00 0x00
+
+# CHECK: testq $0, %rax
+0x48 0xa9 0x00 0x00 0x00 0x00
+
+# CHECK: vaddps %xmm3, %xmm15, %xmm0
+0xc4 0xe1 0x00 0x58 0xc3
+
+# CHECK: movbel (%rax), %eax
+0x0f 0x38 0xf0 0x00
+
+# CHECK: movbel %eax, (%rax)
+0x0f 0x38 0xf1 0x00
+
+# CHECK: movbew (%rax), %ax
+0x66 0x0f 0x38 0xf0 0x00
+
+# CHECK: movbew %ax, (%rax)
+0x66 0x0f 0x38 0xf1 0x00
+
+# CHECK: movbeq (%rax), %rax
+0x48 0x0f 0x38 0xf0 0x00
+
+# CHECK: movbeq %rax, (%rax)
+0x48 0x0f 0x38 0xf1 0x00
+
+# CHECK: rdrandw %ax
+0x66 0x0f 0xc7 0xf0
+
+# CHECK: rdrandl %eax
+0x0f 0xc7 0xf0
+
+# CHECK: rdrandq %rax
+0x48 0x0f 0xc7 0xf0
+
+# CHECK: vroundss $0, %xmm0, %xmm0, %xmm0
+0xc4 0xe3 0x7d 0x0a 0xc0 0x00
+
+# CHECK: vroundsd $0, %xmm0, %xmm0, %xmm0
+0xc4 0xe3 0x7d 0x0b 0xc0 0x00
+
+# CHECK: vcvtsd2si %xmm0, %eax
+0xc4 0xe1 0x7f 0x2d 0xc0
+
+# CHECK: vcvtsd2si %xmm0, %rax
+0xc4 0xe1 0xff 0x2d 0xc0
+
+# CHECK: vucomisd %xmm1, %xmm0
+0xc5 0xfd 0x2e 0xc1
+
+# CHECK: vucomiss %xmm1, %xmm0
+0xc5 0xfc 0x2e 0xc1
+
+# CHECK: vcomisd %xmm1, %xmm0
+0xc5 0xfd 0x2f 0xc1
+
+# CHECK: vcomiss %xmm1, %xmm0
+0xc5 0xfc 0x2f 0xc1
+
+# CHECK: vaddss %xmm1, %xmm0, %xmm0
+0xc5 0xfe 0x58 0xc1
+
+# CHECK: xsave (%rax)
+0x0f 0xae 0x20
+
+# CHECK: xrstor (%rax)
+0x0f 0xae 0x28
+
+# CHECK: xsaveopt (%rax)
+0x0f 0xae 0x30
+
+# CHECK: rdfsbasel %eax
+0xf3 0x0f 0xae 0xc0
+
+# CHECK: rdgsbasel %eax
+0xf3 0x0f 0xae 0xc8
+
+# CHECK: wrfsbasel %eax
+0xf3 0x0f 0xae 0xd0
+
+# CHECK: wrgsbasel %eax
+0xf3 0x0f 0xae 0xd8
+
+# CHECK: rdfsbaseq %rax
+0xf3 0x48 0x0f 0xae 0xc0
+
+# CHECK: rdgsbaseq %rax
+0xf3 0x48 0x0f 0xae 0xc8
+
+# CHECK: wrfsbaseq %rax
+0xf3 0x48 0x0f 0xae 0xd0
+
+# CHECK: wrgsbaseq %rax
+0xf3 0x48 0x0f 0xae 0xd8
+
+# CHECK: vcvtph2ps %xmm0, %xmm0
+0xc4 0xe2 0x79 0x13 0xc0
+
+# CHECK: vcvtph2ps (%rax), %xmm0
+0xc4 0xe2 0x79 0x13 0x00
+
+# CHECK: vcvtph2ps %xmm0, %ymm0
+0xc4 0xe2 0x7d 0x13 0xc0
+
+# CHECK: vcvtph2ps (%rax), %ymm0
+0xc4 0xe2 0x7d 0x13 0x00
+
+# CHECK: vcvtps2ph $0, %xmm0, %xmm0
+0xc4 0xe3 0x79 0x1d 0xc0 0x00
+
+# CHECK: vcvtps2ph $0, %xmm0, (%rax)
+0xc4 0xe3 0x79 0x1d 0x00 0x00
+
+# CHECK: vcvtps2ph $0, %ymm0, %xmm0
+0xc4 0xe3 0x7d 0x1d 0xc0 0x00
+
+# CHECK: vcvtps2ph $0, %ymm0, (%rax)
+0xc4 0xe3 0x7d 0x1d 0x00 0x00
+
+# CHECK: popcntl %eax, %eax
+0xf3 0x0f 0xb8 0xc0
+
+# CHECK: popcntw %ax, %ax
+0x66 0xf3 0x0f 0xb8 0xc0
+
+# CHECK: popcntq %rax, %rax
+0xf3 0x48 0x0f 0xb8 0xc0
+
+# CHECK: lzcntl %eax, %eax
+0xf3 0x0f 0xbd 0xc0
+
+# CHECK: lzcntw %ax, %ax
+0x66 0xf3 0x0f 0xbd 0xc0
+
+# CHECK: lzcntq %rax, %rax
+0xf3 0x48 0x0f 0xbd 0xc0
+
+# CHECK: tzcntl %eax, %eax
+0xf3 0x0f 0xbc 0xc0
+
+# CHECK: tzcntw %ax, %ax
+0x66 0xf3 0x0f 0xbc 0xc0
+
+# CHECK: tzcntq %rax, %rax
+0xf3 0x48 0x0f 0xbc 0xc0
+
+# CHECK: andnl %ecx, %r15d, %eax
+0xc4 0xe2 0x00 0xf2 0xc1
+
+# CHECK: andnq %rax, %r15, %rax
+0xc4 0xe2 0x80 0xf2 0xc0
+
+# CHECK: andnl (%rax), %r15d, %eax
+0xc4 0xe2 0x00 0xf2 0x00
+
+# CHECK: andnq (%rax), %r15, %rax
+0xc4 0xe2 0x80 0xf2 0x00
+
+# CHECK: blsrl (%rax), %r15d
+0xc4 0xe2 0x00 0xf3 0x08
+
+# CHECK: blsrq (%rax), %r15
+0xc4 0xe2 0x80 0xf3 0x08
+
+# CHECK: blsmskl (%rax), %r15d
+0xc4 0xe2 0x00 0xf3 0x10
+
+# CHECK: blsmskq (%rax), %r15
+0xc4 0xe2 0x80 0xf3 0x10
+
+# CHECK: blsil (%rax), %r15d
+0xc4 0xe2 0x00 0xf3 0x18
+
+# CHECK: blsiq (%rax), %r15
+0xc4 0xe2 0x80 0xf3 0x18
+
+# CHECK: bextrl %r12d, (%rax), %r10d
+0xc4 0x62 0x18 0xf7 0x10
+
+# CHECK: bextrl %r12d, %r11d, %r10d
+0xc4 0x42 0x18 0xf7 0xd3
+
+# CHECK: bextrq %r12, (%rax), %r10
+0xc4 0x62 0x98 0xf7 0x10
+
+# CHECK: bextrq %r12, %r11, %r10
+0xc4 0x42 0x98 0xf7 0xd3
+
+# CHECK: bzhil %r12d, (%rax), %r10d
+0xc4 0x62 0x18 0xf5 0x10
+
+# CHECK: bzhil %r12d, %r11d, %r10d
+0xc4 0x42 0x18 0xf5 0xd3
+
+# CHECK: bzhiq %r12, (%rax), %r10
+0xc4 0x62 0x98 0xf5 0x10
+
+# CHECK: bzhiq %r12, %r11, %r10
+0xc4 0x42 0x98 0xf5 0xd3
+
+# CHECK: pextl %r12d, %r11d, %r10d
+0xc4 0x42 0x22 0xf5 0xd4
+
+# CHECK: pextl (%rax), %r11d, %r10d
+0xc4 0x62 0x22 0xf5 0x10
+
+# CHECK: pextq %r12, %r11, %r10
+0xc4 0x42 0xa2 0xf5 0xd4
+
+# CHECK: pextq (%rax), %r11, %r10
+0xc4 0x62 0xa2 0xf5 0x10
+
+# CHECK: pdepl %r12d, %r11d, %r10d
+0xc4 0x42 0x23 0xf5 0xd4
+
+# CHECK: pdepl (%rax), %r11d, %r10d
+0xc4 0x62 0x23 0xf5 0x10
+
+# CHECK: pdepq %r12, %r11, %r10
+0xc4 0x42 0xa3 0xf5 0xd4
+
+# CHECK: pdepq (%rax), %r11, %r10
+0xc4 0x62 0xa3 0xf5 0x10
+
+# CHECK: mulxl %r12d, %r11d, %r10d
+0xc4 0x42 0x23 0xf6 0xd4
+
+# CHECK: mulxl (%rax), %r11d, %r10d
+0xc4 0x62 0x23 0xf6 0x10
+
+# CHECK: mulxq %r12, %r11, %r10
+0xc4 0x42 0xa3 0xf6 0xd4
+
+# CHECK: mulxq (%rax), %r11, %r10
+0xc4 0x62 0xa3 0xf6 0x10
+
+# CHECK: rorxl $1, %r12d, %r10d
+0xc4 0x43 0x7b 0xf0 0xd4 0x01
+
+# CHECK: rorxl $31, (%rax), %r10d
+0xc4 0x63 0x7b 0xf0 0x10 0x1f
+
+# CHECK: rorxq $1, %r12, %r10
+0xc4 0x43 0xfb 0xf0 0xd4 0x01
+
+# CHECK: rorxq $63, (%rax), %r10
+0xc4 0x63 0xfb 0xf0 0x10 0x3f
+
+# CHECK: shlxl %r12d, (%rax), %r10d
+0xc4 0x62 0x19 0xf7 0x10
+
+# CHECK: shlxl %r12d, %r11d, %r10d
+0xc4 0x42 0x19 0xf7 0xd3
+
+# CHECK: shlxq %r12, (%rax), %r10
+0xc4 0x62 0x99 0xf7 0x10
+
+# CHECK: shlxq %r12, %r11, %r10
+0xc4 0x42 0x99 0xf7 0xd3
+
+# CHECK: sarxl %r12d, (%rax), %r10d
+0xc4 0x62 0x1a 0xf7 0x10
+
+# CHECK: sarxl %r12d, %r11d, %r10d
+0xc4 0x42 0x1a 0xf7 0xd3
+
+# CHECK: sarxq %r12, (%rax), %r10
+0xc4 0x62 0x9a 0xf7 0x10
+
+# CHECK: sarxq %r12, %r11, %r10
+0xc4 0x42 0x9a 0xf7 0xd3
+
+# CHECK: shrxl %r12d, (%rax), %r10d
+0xc4 0x62 0x1b 0xf7 0x10
+
+# CHECK: shrxl %r12d, %r11d, %r10d
+0xc4 0x42 0x1b 0xf7 0xd3
+
+# CHECK: shrxq %r12, (%rax), %r10
+0xc4 0x62 0x9b 0xf7 0x10
+
+# CHECK: shrxq %r12, %r11, %r10
+0xc4 0x42 0x9b 0xf7 0xd3
+
+# CHECK: vfmadd132ps %xmm11, %xmm12, %xmm10
+0xc4 0x42 0x19 0x98 0xd3
+
+# CHECK: vfmadd132pd %xmm11, %xmm12, %xmm10
+0xc4 0x42 0x99 0x98 0xd3
+
+# CHECK: vfmadd132ps %ymm11, %ymm12, %ymm10
+0xc4 0x42 0x1d 0x98 0xd3
+
+# CHECK: vfmadd132pd %ymm11, %ymm12, %ymm10
+0xc4 0x42 0x9d 0x98 0xd3
+
+# CHECK: vfmadd132ps (%rax), %xmm12, %xmm10
+0xc4 0x62 0x19 0x98 0x10
+
+# CHECK: vfmadd132pd (%rax), %xmm12, %xmm10
+0xc4 0x62 0x99 0x98 0x10
+
+# CHECK: vfmadd132ps (%rax), %ymm12, %ymm10
+0xc4 0x62 0x1d 0x98 0x10
+
+# CHECK: vfmadd132pd (%rax), %ymm12, %ymm10
+0xc4 0x62 0x9d 0x98 0x10
+
+# CHECK: vfmadd132ss %xmm11, %xmm12, %xmm10
+0xc4 0x42 0x19 0x99 0xd3
+
+# CHECK: vfmadd132sd %xmm11, %xmm12, %xmm10
+0xc4 0x42 0x99 0x99 0xd3
+
+# CHECK: vfmadd132ss (%rax), %xmm12, %xmm10
+0xc4 0x62 0x19 0x99 0x10
+
+# CHECK: vfmadd132sd (%rax), %xmm12, %xmm10
+0xc4 0x62 0x99 0x99 0x10
+
+# CHECK: vfmaddss (%rcx), %xmm1, %xmm0, %xmm0
+0xc4 0xe3 0xf9 0x6a 0x01 0x10
+
+# CHECK: vfmaddss %xmm1, (%rcx), %xmm0, %xmm0
+0xc4 0xe3 0x79 0x6a 0x01 0x10
+
+# CHECK: vfmaddss (%rcx), %xmm1, %xmm0, %xmm0
+0xc4 0xe3 0xfd 0x6a 0x01 0x10
+
+# CHECK: vfmaddss %xmm1, (%rcx), %xmm0, %xmm0
+0xc4 0xe3 0x7d 0x6a 0x01 0x10
+
+# CHECK: vfmaddss %xmm2, %xmm1, %xmm0, %xmm0
+0xc4 0xe3 0xf9 0x6a 0xc2 0x10
+
+# CHECK: vfmaddss %xmm1, %xmm2, %xmm0, %xmm0
+0xc4 0xe3 0x79 0x6a 0xc2 0x10
+
+# CHECK: vfmaddss %xmm2, %xmm1, %xmm0, %xmm0
+0xc4 0xe3 0xfd 0x6a 0xc2 0x10
+
+# CHECK: vfmaddss %xmm1, %xmm2, %xmm0, %xmm0
+0xc4 0xe3 0x7d 0x6a 0xc2 0x10
+
+# CHECK: vfmaddps  (%rcx), %xmm1, %xmm0, %xmm0
+0xc4 0xe3 0xf9 0x68 0x01 0x10
+
+# CHECK: vfmaddps   %xmm1, (%rcx), %xmm0, %xmm0
+0xc4 0xe3 0x79 0x68 0x01 0x10
+
+# CHECK: vfmaddps   %xmm1, %xmm2, %xmm0, %xmm0
+0xc4 0xe3 0x79 0x68 0xc2 0x10
+
+# CHECK: vfmaddps   %xmm2, %xmm1, %xmm0, %xmm0
+0xc4 0xe3 0xf9 0x68 0xc2 0x10
+
+# CHECK: vfmaddps  (%rcx), %ymm1, %ymm0, %ymm0
+0xc4 0xe3 0xfd 0x68 0x01 0x10
+
+# CHECK: vfmaddps   %ymm1, (%rcx), %ymm0, %ymm0
+0xc4 0xe3 0x7d 0x68 0x01 0x10
+
+# CHECK: vfmaddps   %ymm1, %ymm2, %ymm0, %ymm0
+0xc4 0xe3 0x7d 0x68 0xc2 0x10
+
+# CHECK: vfmaddps   %ymm2, %ymm1, %ymm0, %ymm0
+0xc4 0xe3 0xfd 0x68 0xc2 0x10
+
+# CHECK: vpermil2ps $0, %xmm4, %xmm3, %xmm2, %xmm1
+0xc4 0xe3 0x69 0x48 0xcb 0x40
+
+# CHECK: vpermil2ps $1, 4(%rax), %xmm2, %xmm3, %xmm0
+0xc4 0xe3 0xe1 0x48 0x40 0x04 0x21
+
+# CHECK: vpermil2ps $2, (%rax), %ymm1, %ymm5, %ymm6
+0xc4 0xe3 0xd5 0x48 0x30 0x12
+
+# CHECK: vpermil2ps $3, %xmm1, (%rax), %xmm3, %xmm4
+0xc4 0xe3 0x61 0x48 0x20 0x13
+
+# CHECK: vpermil2ps $0, %ymm4, %ymm4, %ymm2, %ymm2
+0xc4 0xe3 0x6d 0x48 0xd4 0x40
+
+# CHECK: vpermil2pd $1, %ymm1, 4(%rax), %ymm1, %ymm0
+0xc4 0xe3 0x75 0x49 0x40 0x04 0x11
+
+# CHECK: vgatherdpd %xmm0, (%rdi,%xmm1,2), %xmm2
+0xc4 0xe2 0xf9 0x92 0x14 0x4f
+
+# CHECK: vgatherdpd %ymm0, (%rdi,%xmm1,2), %ymm2
+0xc4 0xe2 0xfd 0x92 0x14 0x4f
+
+# CHECK: vgatherqps %xmm8, (%r15,%xmm9,2), %xmm10
+0xc4 0x02 0x39 0x93 0x14 0x4f
+
+# CHECK: vgatherqps %xmm8, (%r15,%ymm9,2), %xmm10
+0xc4 0x02 0x3d 0x93 0x14 0x4f
+
+# CHECK: vpgatherdq %xmm0, (%rdi,%xmm1,2), %xmm2
+0xc4 0xe2 0xf9 0x90 0x14 0x4f
+
+# CHECK: vpgatherdq %ymm0, (%rdi,%xmm1,2), %ymm2
+0xc4 0xe2 0xfd 0x90 0x14 0x4f
+
+# CHECK: vpgatherqd %xmm8, (%r15,%xmm9,2), %xmm10
+0xc4 0x02 0x39 0x91 0x14 0x4f
+
+# CHECK: vpgatherqd %xmm8, (%r15,%ymm9,2), %xmm10
+0xc4 0x02 0x3d 0x91 0x14 0x4f
+
+# rdar://8812056 lldb doesn't print the x86 lock prefix when disassembling
+# CHECK: lock
+# CHECK-NEXT: xaddq %rcx, %rbx
+0xf0 0x48 0x0f 0xc1 0xcb
+
+# rdar://13493622 lldb doesn't print the x86 rep/repne prefix when disassembling
+# CHECK: repne
+# CHECK-NEXT: movsl
+0xf2 0xa5
+# CHECK: repne
+# CHECK-NEXT: movsq
+0xf2 0x48 0xa5
+# CHECK: repne
+# CHECK-NEXT: movb  $0, (%rax)
+0xf2 0xc6 0x0 0x0
+
+# rdar://11019859 Support 2013 Haswell RTM instructions and HLE prefixes
+# CHECK: xrelease
+# CHECK-NEXT: lock
+# CHECK-NEXT: incl   (%rax)
+0xf3 0xf0 0xff 0x00
+
+# CHECK: xrelease
+# CHECK-NEXT: xchgl %ebx, %eax
+0xf3 0x93
+# CHECK: xrelease
+# CHECK-NEXT: xchgl %ebx, (%rax)
+0xf3 0x87 0x18
+# CHECK: xrelease
+# CHECK-NEXT: movb %al, (%rbx)
+0xf3 0x88 0x03
+# CHECK: xrelease
+# CHECK-NEXT: movl %eax, (%rbx)
+0xf3 0x89 0x03
+# CHECK: xrelease
+# CHECK-NEXT: movb $1, (%rbx)
+0xf3 0xc6 0x03 0x01
+# CHECK: xrelease
+# CHECK-NEXT: movl $1, (%rbx)
+0xf3 0xc7 0x03 0x01 0x00 0x00 0x00
+
+# CHECK: xacquire
+# CHECK-NEXT: xchgl %ebx, %eax
+0xf2 0x93
+# CHECK: xacquire
+# CHECK-NEXT: xchgl %ebx, (%rax)
+0xf2 0x87 0x18
+
+# CHECK: bextr $2814, %edi, %eax
+0x8f 0xea 0x78 0x10 0xc7 0xfe 0x0a 0x00 0x00
+
+# CHECK: blci %rdi, %rax
+0x8f 0xe9 0xf8 0x02 0xf7
+
+# CHECK: vpcmov %xmm1, %xmm2, %xmm3, %xmm4
+0x8f 0xe8 0x60 0xa2 0xe2 0x10
+
+# CHECK: vpcmov (%rax), %xmm2, %xmm3, %xmm4
+0x8f 0xe8 0xe0 0xa2 0x20 0x20
+
+# CHECK: vpcmov %xmm1, (%rax), %xmm3, %xmm4
+0x8f 0xe8 0x60 0xa2 0x20 0x10
+
+# CHECK: vpcmov %ymm1, %ymm2, %ymm3, %ymm4
+0x8f 0xe8 0x64 0xa2 0xe2 0x10
+
+# CHECK: vpcmov %ymm2, %ymm1, %ymm3, %ymm4
+0x8f 0xe8 0xe4 0xa2 0xe2 0x10
+
+# CHECK: vpcmov (%rax), %ymm2, %ymm3, %ymm4
+0x8f 0xe8 0xe4 0xa2 0x20 0x20
+
+# CHECK: vpcmov %ymm1, (%rax), %ymm3, %ymm4
+0x8f 0xe8 0x64 0xa2 0x20 0x10
+
+# CHECK: vpermil2pd $0, %xmm3, %xmm2, %xmm1, %xmm0
+0xc4 0xe3 0x71 0x49 0xc2 0x30
+
+# CHECK: vpermil2pd $0, %xmm2, %xmm3, %xmm1, %xmm0
+0xc4 0xe3 0xf1 0x49 0xc2 0x30
+
+# CHECK: vpcomeqb  %xmm6, %xmm4, %xmm2
+0x8f 0xe8 0x58 0xcc 0xd6 0x04
+
+# CHECK: vpcomneqb 8(%rax), %xmm3, %xmm2
+0x8f 0xe8 0x60 0xcc 0x50 0x08 0x05
+
+# CHECK: vpcomb $55, %xmm6, %xmm4, %xmm2
+0x8f 0xe8 0x58 0xcc 0xd6 0x37
+
+# CHECK: vpcomb $56, 8(%rax), %xmm3, %xmm2
+0x8f 0xe8 0x60 0xcc 0x50 0x08 0x38
+
+# CHECK: vpmacsdd %xmm4, %xmm6, %xmm4, %xmm2
+0x8f 0xe8 0x58 0x9e 0xd6 0x40
+# CHECK: vpmacsdd %xmm4, (%rax,%rcx), %xmm4, %xmm3
+0x8f 0xe8 0x58 0x9e 0x1c 0x08 0x40
+
+# CHECK: vprotd (%rax), %xmm0, %xmm3
+0x8f 0xe9 0xf8 0x92 0x18
+# CHECK: vprotd %xmm2, (%rax,%rcx), %xmm4
+0x8f 0xe9 0x68 0x92 0x24 0x08
+# CHECK: vprotd %xmm5, %xmm3, %xmm2
+0x8f 0xe9 0x50 0x92 0xd3
+# CHECK: vprotd $43, (%rcx), %xmm6
+0x8f 0xe8 0x78 0xc2 0x31 0x2b
+# CHECK: vprotd $44, (%rax,%rcx), %xmm7
+0x8f 0xe8 0x78 0xc2 0x3c 0x08 0x2c
+# CHECK: vprotd $45, %xmm4, %xmm4
+0x8f 0xe8 0x78 0xc2 0xe4 0x2d
+
+# CHECK: vfrczps 4(%rax), %xmm3
+0x8f 0xe9 0x78 0x80 0x58 0x04
+# CHECK: vfrczps %xmm6, %xmm5
+0x8f 0xe9 0x78 0x80 0xee
+# CHECK: vfrczps (%rcx), %xmm1
+0x8f 0xe9 0x78 0x80 0x09
+# CHECK: vfrczps %ymm2, %ymm4
+0x8f 0xe9 0x7c 0x80 0xe2

test/MC/Disassembler/X86/x86-16.txt

 # CHECK: into
 0xce
 
+# CHECK: icebp
+0xf1
+
 # CHECK: int3
 0xcc
 

test/MC/Disassembler/X86/x86-32.txt

-# RUN: llvm-mc --disassemble %s -triple=i686-apple-darwin9 | FileCheck %s
-
-# Coverage
-
-# CHECK: pushl
-0xff 0x34 0x24
-
-# CHECK: popl
-0x58
-
-# CHECK: calll
-0xff 0xd0
-
-# CHECK: jecxz -127
-0xe3 0x81
-
-# CHECK: jcxz -127
-0x67 0xe3 0x81
-
-# CHECK: incl
-0x40
-
-# CHECK: leave
-0xc9
-
-# PR8873: some instructions not recognized in 32-bit mode
-
-# CHECK: fld
-0xdd 0x04 0x24
-
-# CHECK: pshufb
-0x0f 0x38 0x00 0xc0
-
-# CHECK: crc32b %al, %eax
-0xf2 0x0f 0x38 0xf0 0xc0
-
-# CHECK: crc32w %ax, %eax
-0x66 0xf2 0x0f 0x38 0xf1 0xc0
-
-# CHECK: crc32l %eax, %eax
-0xf2 0x0f 0x38 0xf1 0xc0
-
-
-# CHECK: int  $33
-0xCD 0x21 
-
-# CHECK: int  $33
-0xCD 0x21
-
-
-# CHECK: addb %al, (%eax)
-0 0
-
-# CHECK: calll  -1234
-0xe8 0x2e 0xfb 0xff 0xff
-
-# CHECK: callw  -1
-0x66 0xe8 0xff 0xff
-
-# CHECK: lfence
-0x0f 0xae 0xe8
-
-# CHECK: mfence
-0x0f 0xae 0xf0
-
-# CHECK: monitor
-0x0f 0x01 0xc8
-
-# CHECK: mwait
-0x0f 0x01 0xc9
-
-# CHECK: vmcall
-0x0f 0x01 0xc1
-
-# CHECK: vmfunc
-0x0f 0x01 0xd4
-
-# CHECK: vmlaunch
-0x0f 0x01 0xc2
-
-# CHECK: vmresume
-0x0f 0x01 0xc3
-
-# CHECK: vmxoff
-0x0f 0x01 0xc4
-
-# CHECK: swapgs
-0x0f 0x01 0xf8
-
-# CHECK: rdtscp
-0x0f 0x01 0xf9
-
-# CHECK: monitorx
-0x0f 0x01 0xfa
-
-# CHECK: mwaitx
-0x0f 0x01 0xfb
-
-# CHECK: vmxon
-0xf3 0x0f 0xc7 0x30
-
-# CHECK: vmptrld
-0x0f 0xc7 0x30
-
-# CHECK: vmptrst
-0x0f 0xc7 0x38
-
-# CHECK: vmrun
-0x0f 0x01 0xd8
-
-# CHECK: vmmcall
-0x0f 0x01 0xd9
-
-# CHECK: vmload
-0x0f 0x01 0xda
-
-# CHECK: vmsave
-0x0f 0x01 0xdb
-
-# CHECK: stgi
-0x0f 0x01 0xdc
-
-# CHECK: clgi
-0x0f 0x01 0xdd
-
-# CHECK: skinit
-0x0f 0x01 0xde
-
-# CHECK: invlpga
-0x0f 0x01 0xdf
-
-# CHECK: movl $0, -4(%ebp)
-0xc7 0x45 0xfc 0x00 0x00 0x00 0x00
-
-# CHECK: movl %cr0, %ecx
-0x0f 0x20 0xc1
-
-# CHECK: leal 4(%esp), %ecx
-0x8d 0x4c 0x24 0x04 
-
-# CHECK: enter  $1, $2
-0xc8 0x01 0x00 0x02
-
-# CHECK: movw $47416, -66(%ebp)
-0x66 0xc7 0x45 0xbe 0x38 0xb9
-
-# CHECK: vaddpd %ymm5, %ymm1, %ymm0
-0xc4 0xc1 0x75 0x58 0xc5
-
-# CHECK: vaddps %ymm3, %ymm1, %ymm0
-0xc5 0xf4 0x58 0xc3
-
-# CHECK: vandpd %ymm5, %ymm1, %ymm0
-0xc4 0xc1 0x75 0x54 0xc5
-
-# CHECK: vandps %ymm3, %ymm1, %ymm0
-0xc5 0xf4 0x54 0xc3
-
-# CHECK: vzeroall
-0xc5 0xfc 0x77
-
-# CHECK: vcvtps2pd %xmm0, %ymm0
-0xc5 0xfc 0x5a 0xc0
-
-# CHECK: vandps (%edx), %xmm1, %xmm7
-0xc5 0xf0 0x54 0x3a
-
-# CHECK: vcvtss2si %xmm0, %eax
-0xc5 0xfa 0x2d 0xc0
-
-# CHECK: vcvtsd2si %xmm0, %eax
-0xc5 0xfb 0x2d 0xc0
-
-# CHECK: vcvtsd2si %xmm0, %eax
-0xc4 0xe1 0x7b 0x2d 0xc0
-
-# CHECK: vmaskmovpd %xmm0, %xmm1, (%eax)
-0xc4 0xe2 0x71 0x2f 0x00
-
-# CHECK: vmovapd %xmm0, %xmm2
-0xc5 0xf9 0x28 0xd0
-
-# Check these special case instructions that the immediate is not sign-extend.
-# CHECK: blendps $129, %xmm2, %xmm1
-0x66 0x0f 0x3a 0x0c 0xca 0x81
-
-# CHECK: blendpd $129, %xmm2, %xmm1
-0x66 0x0f 0x3a 0x0d 0xca 0x81
-
-# CHECK: pblendw $129, %xmm2, %xmm1
-0x66 0x0f 0x3a 0x0e 0xca 0x81
-
-# CHECK: mpsadbw $129, %xmm2, %xmm1
-0x66 0x0f 0x3a 0x42 0xca 0x81
-
-# CHECK: dpps $129, %xmm2, %xmm1
-0x66 0x0f 0x3a 0x40 0xca 0x81
-
-# CHECK: dppd $129, %xmm2, %xmm1
-0x66 0x0f 0x3a 0x41 0xca 0x81
-
-# CHECK: insertps $129, %xmm2, %xmm1
-0x66 0x0f 0x3a 0x21 0xca 0x81
-
-# CHECK: vblendps $129, %ymm2, %ymm5, %ymm1
-0xc4 0xe3 0x55 0x0c 0xca 0x81
-
-# CHECK: vblendps $129, (%eax), %ymm5, %ymm1
-0xc4 0xe3 0x55 0x0c 0x08 0x81
-
-# CHECK: vblendpd $129, %ymm2, %ymm5, %ymm1
-0xc4 0xe3 0x55 0x0d 0xca 0x81
-
-# CHECK: vblendpd $129, (%eax), %ymm5, %ymm1
-0xc4 0xe3 0x55 0x0d 0x08 0x81
-
-# CHECK: vpblendw $129, %xmm2, %xmm5, %xmm1
-0xc4 0xe3 0x51 0x0e 0xca 0x81
-
-# CHECK: vmpsadbw $129, %xmm2, %xmm5, %xmm1
-0xc4 0xe3 0x51 0x42 0xca 0x81
-
-# CHECK: vdpps $129, %ymm2, %ymm5, %ymm1
-0xc4 0xe3 0x55 0x40 0xca 0x81
-
-# CHECK: vdpps $129, (%eax), %ymm5, %ymm1
-0xc4 0xe3 0x55 0x40 0x08 0x81
-
-# CHECK: vdppd $129, %xmm2, %xmm5, %xmm1
-0xc4 0xe3 0x51 0x41 0xca 0x81
-
-# CHECK: vinsertps $129, %xmm3, %xmm2, %xmm1
-0xc4 0xe3 0x69 0x21 0xcb 0x81
-
-# CHECK: pause
-0xf3 0x90
-
-# CHECK: addl %eax, %edi
-0x01 0xc7
-
-# CHECK: addl %edi, %eax
-0x03 0xc7
-
-# CHECK: movl %eax, %edi
-0x89 0xc7
-
-# CHECK: movl %edi, %eax
-0x8b 0xc7
-
-# CHECK: movups %xmm1, %xmm0
-0x0f 0x10 0xc1
-
-# CHECK: movups %xmm0, %xmm1
-0x0f 0x11 0xc1
-
-# CHECK: movaps %xmm1, %xmm0
-0x0f 0x28 0xc1
-
-# CHECK: movaps %xmm0, %xmm1
-0x0f 0x29 0xc1
-
-# CHECK: movupd %xmm1, %xmm0
-0x66 0x0f 0x10 0xc1
-
-# CHECK: movupd %xmm0, %xmm1
-0x66 0x0f 0x11 0xc1
-
-# CHECK: movapd %xmm1, %xmm0
-0x66 0x0f 0x28 0xc1
-
-# CHECK: movapd %xmm0, %xmm1
-0x66 0x0f 0x29 0xc1
-
-# CHECK: vmovups %xmm1, %xmm0
-0xc5 0xf8 0x10 0xc1
-
-# CHECK: vmovups %xmm0, %xmm1
-0xc5 0xf8 0x11 0xc1
-
-# CHECK: vmovaps %xmm1, %xmm0
-0xc5 0xf8 0x28 0xc1
-
-# CHECK: vmovaps %xmm0, %xmm1
-0xc5 0xf8 0x29 0xc1
-
-# CHECK: vmovupd %xmm1, %xmm0
-0xc5 0xf9 0x10 0xc1
-
-# CHECK: vmovupd %xmm0, %xmm1
-0xc5 0xf9 0x11 0xc1
-
-# CHECK: vmovapd %xmm1, %xmm0
-0xc5 0xf9 0x28 0xc1
-
-# CHECK: vmovapd %xmm0, %xmm1
-0xc5 0xf9 0x29 0xc1
-
-# CHECK: vmovups %ymm1, %ymm0
-0xc5 0xfc 0x10 0xc1
-
-# CHECK: vmovups %ymm0, %ymm1
-0xc5 0xfc 0x11 0xc1
-
-# CHECK: vmovaps %ymm1, %ymm0
-0xc5 0xfc 0x28 0xc1
-
-# CHECK: vmovaps %ymm0, %ymm1
-0xc5 0xfc 0x29 0xc1
-
-# CHECK: movdqa %xmm1, %xmm0
-0x66 0x0f 0x6f 0xc1
-
-# CHECK: movdqa %xmm0, %xmm1
-0x66 0x0f 0x7f 0xc1
-
-# CHECK: movdqu %xmm1, %xmm0
-0xf3 0x0f 0x6f 0xc1
-
-# CHECK: movdqu %xmm0, %xmm1
-0xf3 0x0f 0x7f 0xc1
-
-# CHECK: vmovdqa %xmm1, %xmm0
-0xc5 0xf9 0x6f 0xc1
-
-# CHECK: vmovdqa %xmm0, %xmm1
-0xc5 0xf9 0x7f 0xc1
-
-# CHECK: vmovdqa %ymm1, %ymm0
-0xc5 0xfd 0x6f 0xc1
-
-# CHECK: vmovdqa %ymm0, %ymm1
-0xc5 0xfd 0x7f 0xc1
-
-# CHECK: vmovdqu %xmm1, %xmm0
-0xc5 0xfa 0x6f 0xc1
-
-# CHECK: vmovdqu %xmm0, %xmm1
-0xc5 0xfa 0x7f 0xc1
-
-# CHECK: vmovdqu %ymm1, %ymm0
-0xc5 0xfe 0x6f 0xc1
-
-# CHECK: vmovdqu %ymm0, %ymm1
-0xc5 0xfe 0x7f 0xc1
-
-# CHECK: vblendvps %xmm4, %xmm1, %xmm2, %xmm3
-0xc4 0xe3 0x69 0x4a 0xd9 0x41
-
-# CHECK: vroundpd $0, %xmm0, %xmm0
-0xc4 0xe3 0x79 0x09 0xc0 0x00
-
-# CHECK: vroundps $0, %xmm0, %xmm0
-0xc4 0xe3 0x79 0x08 0xc0 0x00
-
-# CHECK: vroundpd $0, %ymm0, %ymm0
-0xc4 0xe3 0x7d 0x09 0xc0 0x00
-
-# CHECK: vroundps $0, %ymm0, %ymm0
-0xc4 0xe3 0x7d 0x08 0xc0 0x00
-
-# CHECK: vroundss $0, %xmm0, %xmm0, %xmm0
-0xc4 0xe3 0x79 0x0a 0xc0 0x00
-
-# CHECK: vroundsd $0, %xmm0, %xmm0, %xmm0
-0xc4 0xe3 0x79 0x0b 0xc0 0x00
-
-# CHECK: invept (%eax), %eax
-0x66 0x0f 0x38 0x80 0x00
-
-# CHECK: invvpid (%eax), %eax
-0x66 0x0f 0x38 0x81 0x00
-
-# CHECK: invpcid (%eax), %eax
-0x66 0x0f 0x38 0x82 0x00
-
-# CHECK: nop
-0x90
-
-# CHECK: addb $0, %al
-0x04 0x00
-
-# CHECK: addw $0, %ax
-0x66 0x05 0x00 0x00
-
-# CHECK: addl $0, %eax
-0x05 0x00 0x00 0x00 0x00
-
-# CHECK: adcb $0, %al
-0x14 0x00
-
-# CHECK: adcw $0, %ax
-0x66 0x15 0x00 0x00
-
-# CHECK: adcl $0, %eax
-0x15 0x00 0x00 0x00 0x00
-
-# CHECK: cmpb $0, %al
-0x3c 0x00
-
-# CHECK: cmpw $0, %ax
-0x66 0x3d 0x00 0x00
-
-# CHECK: cmpl $0, %eax
-0x3d 0x00 0x00 0x00 0x00
-
-# CHECK: testb $0, %al
-0xa8 0x00
-
-# CHECK: testw $0, %ax
-0x66 0xa9 0x00 0x00
-
-# CHECK: testl $0, %eax
-0xa9 0x00 0x00 0x00 0x00
-
-# CHECK: movb 0, %al
-0xa0 0x00 0x00 0x00 0x00
-
-# CHECK: movw 0, %ax
-0x66 0xa1 0x00 0x00 0x00 0x00
-
-# CHECK: movl 0, %eax
-0xa1 0x00 0x00 0x00 0x00
-
-# CHECK: movb %al, 0
-0xa2 0x00 0x00 0x00 0x00
-
-# CHECK: movw %ax, 0
-0x66 0xa3 0x00 0x00 0x00 0x00
-
-# CHECK: movl %eax, 0
-0xa3 0x00 0x00 0x00 0x00
-
-# CHECK: cmpordpd %xmm7, %xmm0
-0x66 0x0f 0xc2 0xc7 0x07
-
-# CHECK: cmpordps %xmm7, %xmm0
-0x0f 0xc2 0xc7 0x07
-
-# CHECK: cmpordsd %xmm7, %xmm0
-0xf2 0x0f 0xc2 0xc7 0x07
-
-# CHECK: cmpordss %xmm7, %xmm0
-0xf3 0x0f 0xc2 0xc7 0x07
-
-# CHECK: vaddps %xmm3, %xmm7, %xmm0
-0xc4 0xe1 0x00 0x58 0xc3
-
-# CHECK: movbel (%eax), %eax
-0x0f 0x38 0xf0 0x00
-
-# CHECK: movbel %eax, (%eax)
-0x0f 0x38 0xf1 0x00
-
-# CHECK: movbew (%eax), %ax
-0x66 0x0f 0x38 0xf0 0x00
-
-# CHECK: movbew %ax, (%eax)
-0x66 0x0f 0x38 0xf1 0x00
-
-# CHECK: rdrandw %ax
-0x66 0x0f 0xc7 0xf0
-
-# CHECK: rdrandl %eax
-0x0f 0xc7 0xf0
-
-# CHECK: vroundss $0, %xmm0, %xmm0, %xmm0
-0xc4 0xe3 0x7d 0x0a 0xc0 0x00
-
-# CHECK: vroundsd $0, %xmm0, %xmm0, %xmm0
-0xc4 0xe3 0x7d 0x0b 0xc0 0x00
-
-# CHECK: vcvtsd2si %xmm0, %eax
-0xc4 0xe1 0x7f 0x2d 0xc0
-
-# CHECK: vcvtsd2si %xmm0, %eax
-0xc4 0xe1 0xff 0x2d 0xc0
-
-# CHECK: vucomisd %xmm1, %xmm0
-0xc5 0xfd 0x2e 0xc1
-
-# CHECK: vucomiss %xmm1, %xmm0
-0xc5 0xfc 0x2e 0xc1
-
-# CHECK: vcomisd %xmm1, %xmm0
-0xc5 0xfd 0x2f 0xc1
-
-# CHECK: vcomiss %xmm1, %xmm0
-0xc5 0xfc 0x2f 0xc1
-
-# CHECK: vaddss %xmm1, %xmm0, %xmm0
-0xc5 0xfe 0x58 0xc1
-
-# CHECK: xsave (%eax)
-0x0f 0xae 0x20
-
-# CHECK: xrstor (%eax)
-0x0f 0xae 0x28
-
-# CHECK: xsaveopt (%eax)
-0x0f 0xae 0x30
-
-# CHECK: xsaves (%eax)
-0x0f 0xc7 0x28
-
-# CHECK: xrstors (%eax)
-0x0f 0xc7 0x18
-
-# CHECK: xsavec (%eax)
-0x0f 0xc7 0x20
-
-# CHECK: clflush (%eax)
-0x0f 0xae 0x38
-
-# CHECK: clflushopt (%eax)
-0x66 0x0f 0xae 0x38
-
-# CHECK: clwb (%eax)
-0x66 0x0f 0xae 0x30
-
-# CHECK: pcommit
-0x66 0x0f 0xae 0xf8
-
-# CHECK: vcvtph2ps %xmm0, %xmm0
-0xc4 0xe2 0x79 0x13 0xc0
-
-# CHECK: vcvtph2ps (%eax), %xmm0
-0xc4 0xe2 0x79 0x13 0x00
-
-# CHECK: vcvtph2ps %xmm0, %ymm0
-0xc4 0xe2 0x7d 0x13 0xc0
-
-# CHECK: vcvtph2ps (%eax), %ymm0
-0xc4 0xe2 0x7d 0x13 0x00
-
-# CHECK: vcvtps2ph $0, %xmm0, %xmm0
-0xc4 0xe3 0x79 0x1d 0xc0 0x00
-
-# CHECK: vcvtps2ph $0, %xmm0, (%eax)
-0xc4 0xe3 0x79 0x1d 0x00 0x00
-
-# CHECK: vcvtps2ph $0, %ymm0, %xmm0
-0xc4 0xe3 0x7d 0x1d 0xc0 0x00
-
-# CHECK: vcvtps2ph $0, %ymm0, (%eax)
-0xc4 0xe3 0x7d 0x1d 0x00 0x00
-
-# CHECK: popcntl %eax, %eax
-0xf3 0x0f 0xb8 0xc0
-
-# CHECK: popcntw %ax, %ax
-0x66 0xf3 0x0f 0xb8 0xc0
-
-# CHECK: lzcntl %eax, %eax
-0xf3 0x0f 0xbd 0xc0
-
-# CHECK: lzcntw %ax, %ax
-0x66 0xf3 0x0f 0xbd 0xc0
-
-# CHECK: tzcntl %eax, %eax
-0xf3 0x0f 0xbc 0xc0
-
-# CHECK: tzcntw %ax, %ax
-0x66 0xf3 0x0f 0xbc 0xc0
-
-# CHECK: andnl %ecx, %edi, %eax
-0xc4 0xe2 0x00 0xf2 0xc1
-
-# CHECK: andnl (%eax), %edi, %eax
-0xc4 0xe2 0x00 0xf2 0x00
-
-# CHECK: andnl %ecx, %edi, %eax
-0xc4 0xe2 0x80 0xf2 0xc1
-
-# CHECK: andnl (%eax), %edi, %eax
-0xc4 0xe2 0x80 0xf2 0x00
-
-# CHECK: blsrl (%eax), %edi
-0xc4 0xe2 0x40 0xf3 0x08
-
-# CHECK: blsmskl (%eax), %edi
-0xc4 0xe2 0x40 0xf3 0x10
-
-# CHECK: blsil (%eax), %edi
-0xc4 0xe2 0x40 0xf3 0x18
-
-# CHECK: bextrl %esi, (%eax), %edx
-0xc4 0xe2 0x08 0xf7 0x10
-
-# CHECK: bextrl %esi, %ebx, %edx
-0xc4 0xe2 0x08 0xf7 0xd3
-
-# CHECK: bzhil %esi, (%eax), %edx
-0xc4 0xe2 0x08 0xf5 0x10
-
-# CHECK: bzhil %esi, %ebx, %edx
-0xc4 0xe2 0x08 0xf5 0xd3
-
-# CHECK: pextl %esp, %ecx, %edx
-0xc4 0xe2 0x72 0xf5 0xd4
-
-# CHECK: pextl (%eax), %ecx, %edx
-0xc4 0xe2 0x72 0xf5 0x10
-
-# CHECK: pdepl %esp, %ecx, %edx
-0xc4 0xe2 0x73 0xf5 0xd4
-
-# CHECK: pdepl (%eax), %ecx, %edx
-0xc4 0xe2 0x73 0xf5 0x10
-
-# CHECK: mulxl %esp, %ecx, %edx
-0xc4 0xe2 0x73 0xf6 0xd4
-
-# CHECK: mulxl (%eax), %ecx, %edx
-0xc4 0xe2 0x73 0xf6 0x10
-
-# CHECK: mulxl %esp, %ecx, %edx
-0xc4 0xe2 0xf3 0xf6 0xd4
-
-# CHECK: mulxl (%eax), %ecx, %edx
-0xc4 0xe2 0xf3 0xf6 0x10
-
-# CHECK: rorxl $1, %esp, %edx
-0xc4 0xe3 0x7b 0xf0 0xd4 0x01
-
-# CHECK: rorxl $31, (%eax), %edx
-0xc4 0xe3 0x7b 0xf0 0x10 0x1f
-
-# CHECK: shlxl %esi, (%eax), %edx
-0xc4 0xe2 0x09 0xf7 0x10
-
-# CHECK: shlxl %esi, %ebx, %edx
-0xc4 0xe2 0x09 0xf7 0xd3
-
-# CHECK: sarxl %esi, (%eax), %edx
-0xc4 0xe2 0x0a 0xf7 0x10
-
-# CHECK: sarxl %esi, %ebx, %edx
-0xc4 0xe2 0x0a 0xf7 0xd3
-
-# CHECK: shrxl %esi, (%eax), %edx
-0xc4 0xe2 0x0b 0xf7 0x10
-
-# CHECK: shrxl %esi, %ebx, %edx
-0xc4 0xe2 0x0b 0xf7 0xd3
-
-# CHECK: extrq  $2, $3, %xmm0
-0x66 0x0f 0x78 0xc0 0x03 0x02
-
-# CHECK: extrq  %xmm1, %xmm0
-0x66 0x0f 0x79 0xc1
-
-# CHECK: insertq $6, $5, %xmm1, %xmm0
-0xf2 0x0f 0x78 0xc1 0x05 0x06
-
-# CHECK: insertq %xmm1, %xmm0
-0xf2 0x0f 0x79 0xc1
-
-# CHECK: movntsd %xmm0, (%edi)
-0xf2 0x0f 0x2b 0x07
-
-# CHECK: movntss %xmm0, (%edi)
-0xf3 0x0f 0x2b 0x07
-
-# CHECK: prefetch (%eax)
-0x0f 0x0d 0x00
-
-# CHECK: prefetchw (%eax)
-0x0f 0x0d 0x08
-
-# CHECK: adcxl %eax, %eax
-0x66 0x0f 0x38 0xf6 0xc0
-
-# CHECK: adcxl (%eax), %eax
-0x66 0x0f 0x38 0xf6 0x00
-
-# CHECK: adoxl %eax, %eax
-0xf3 0x0f 0x38 0xf6 0xc0
-
-# CHECK: adoxl (%eax), %eax
-0xf3 0x0f 0x38 0xf6 0x00
-
-# CHECK: movb 878082192, %al
-0xa0 0x90 0x78 0x56 0x34
-
-# CHECK: movw 878082192, %ax
-0x66 0xa1 0x90 0x78 0x56 0x34
-
-# CHECK: movl 878082192, %eax
-0xa1 0x90 0x78 0x56 0x34
-
-# CHECK: movb %al, 878082192
-0xa2 0x90 0x78 0x56 0x34
-
-# CHECK: movw %ax, 878082192
-0x66 0xa3 0x90 0x78 0x56 0x34
-
-# CHECK: movl %eax, 878082192
-0xa3 0x90 0x78 0x56 0x34
-
-# CHECK: incl %ecx
-0xff 0xc1
-
-# CHECK: decl %ecx
-0xff 0xc9
-
-# CHECK: incw %cx
-0x66 0xff 0xc1
-
-# CHECK: decw %cx
-0x66 0xff 0xc9
-
-# CHECK: incb %cl
-0xfe 0xc1
-
-# CHECK: decb %cl
-0xfe 0xc9
-
-# CHECK: incl %ecx
-0x41
-
-# CHECK: decl %ecx
-0x49
-
-# CHECK: movq %xmm0, %xmm0
-0xf3 0x0f 0x7e 0xc0
-
-# CHECK: vmovq %xmm0, %xmm0
-0xc5 0xfa 0x7e 0xc0
-
-# CHECK: movl %fs:0, %eax
-0x64 0xa1 0x00 0x00 0x00 0x00
-
-# CHECK: movb $-1, %al
-0xc6 0xc0 0xff
-
-# CHECK: movw $65535, %ax
-0x66 0xc7 0xc0 0xff 0xff
-
-# CHECK: movl $4294967295, %eax
-0xc7 0xc0 0xff 0xff 0xff 0xff
-
-# CHECK: movq %mm0, %mm1
-0x0f 0x7f 0xc1
-
-# CHECK: vpermq $238, %ymm2, %ymm2
-0xc4 0xe3 0xfd 0x00 0xd2 0xee
-
-# CHECK: cmpps $8, %xmm7, %xmm0
-0x0f 0xc2 0xc7 0x08
-# CHECK: cmppd $8, %xmm7, %xmm0
-0x66 0x0f 0xc2 0xc7 0x08
-# CHECK: cmpss $8, %xmm7, %xmm0
-0xf3 0x0f 0xc2 0xc7 0x08
-# CHECK: cmpsd $8, %xmm7, %xmm0
-0xf2 0x0f 0xc2 0xc7 0x08
-
-# CHECK: addb $38, 5277496
-0x82 0x05 0x38 0x87 0x50 0x00 0x26
-# CHECK: orb $38, 5277496
-0x82 0x0d 0x38 0x87 0x50 0x00 0x26
-# CHECK: adcb $38, 5277496
-0x82 0x15 0x38 0x87 0x50 0x00 0x26
-# CHECK: sbbb $38, 5277496
-0x82 0x1d 0x38 0x87 0x50 0x00 0x26
-# CHECK: andb $38, 5277496
-0x82 0x25 0x38 0x87 0x50 0x00 0x26
-# CHECK: subb $38, 5277496
-0x82 0x2D 0x38 0x87 0x50 0x00 0x26
-# CHECK: xorb $38, 5277496
-0x82 0x35 0x38 0x87 0x50 0x00 0x26
-# CHECK: cmpb $38, 5277496
-0x82 0x3d 0x38 0x87 0x50 0x00 0x26
-
-#CHECK: getsec
-0x0f 0x37
+# RUN: llvm-mc --disassemble %s -triple=i686-apple-darwin9 | FileCheck %s
+
+# Coverage
+
+# CHECK: pushl
+0xff 0x34 0x24
+
+# CHECK: popl
+0x58
+
+# CHECK: calll
+0xff 0xd0
+
+# CHECK: jecxz -127
+0xe3 0x81
+
+# CHECK: jcxz -127
+0x67 0xe3 0x81
+
+# CHECK: incl
+0x40
+
+# CHECK: leave
+0xc9
+
+# PR8873: some instructions not recognized in 32-bit mode
+
+# CHECK: fld
+0xdd 0x04 0x24
+
+# CHECK: pshufb
+0x0f 0x38 0x00 0xc0
+
+# CHECK: crc32b %al, %eax
+0xf2 0x0f 0x38 0xf0 0xc0
+
+# CHECK: crc32w %ax, %eax
+0x66 0xf2 0x0f 0x38 0xf1 0xc0
+
+# CHECK: crc32l %eax, %eax
+0xf2 0x0f 0x38 0xf1 0xc0
+
+# CHECK: icebp
+0xf1
+
+# CHECK: int3
+0xcc
+
+# CHECK: int  $33
+0xCD 0x21 
+
+# CHECK: int  $33
+0xCD 0x21
+
+
+# CHECK: addb %al, (%eax)
+0 0
+
+# CHECK: calll  -1234
+0xe8 0x2e 0xfb 0xff 0xff
+
+# CHECK: callw  -1
+0x66 0xe8 0xff 0xff
+
+# CHECK: lfence
+0x0f 0xae 0xe8
+
+# CHECK: mfence
+0x0f 0xae 0xf0
+
+# CHECK: monitor
+0x0f 0x01 0xc8
+
+# CHECK: mwait
+0x0f 0x01 0xc9
+
+# CHECK: vmcall
+0x0f 0x01 0xc1
+
+# CHECK: vmfunc
+0x0f 0x01 0xd4
+
+# CHECK: vmlaunch
+0x0f 0x01 0xc2
+
+# CHECK: vmresume
+0x0f 0x01 0xc3
+
+# CHECK: vmxoff
+0x0f 0x01 0xc4
+
+# CHECK: swapgs
+0x0f 0x01 0xf8
+
+# CHECK: rdtscp
+0x0f 0x01 0xf9
+
+# CHECK: monitorx
+0x0f 0x01 0xfa
+
+# CHECK: mwaitx
+0x0f 0x01 0xfb
+
+# CHECK: vmxon
+0xf3 0x0f 0xc7 0x30
+
+# CHECK: vmptrld
+0x0f 0xc7 0x30
+
+# CHECK: vmptrst
+0x0f 0xc7 0x38
+
+# CHECK: vmrun
+0x0f 0x01 0xd8
+
+# CHECK: vmmcall
+0x0f 0x01 0xd9
+
+# CHECK: vmload
+0x0f 0x01 0xda
+
+# CHECK: vmsave
+0x0f 0x01 0xdb
+
+# CHECK: stgi
+0x0f 0x01 0xdc
+
+# CHECK: clgi
+0x0f 0x01 0xdd
+
+# CHECK: skinit
+0x0f 0x01 0xde
+
+# CHECK: invlpga
+0x0f 0x01 0xdf
+
+# CHECK: movl $0, -4(%ebp)
+0xc7 0x45 0xfc 0x00 0x00 0x00 0x00
+
+# CHECK: movl %cr0, %ecx
+0x0f 0x20 0xc1
+
+# CHECK: leal 4(%esp), %ecx
+0x8d 0x4c 0x24 0x04 
+
+# CHECK: enter  $1, $2
+0xc8 0x01 0x00 0x02
+
+# CHECK: movw $47416, -66(%ebp)
+0x66 0xc7 0x45 0xbe 0x38 0xb9
+
+# CHECK: vaddpd %ymm5, %ymm1, %ymm0
+0xc4 0xc1 0x75 0x58 0xc5
+
+# CHECK: vaddps %ymm3, %ymm1, %ymm0
+0xc5 0xf4 0x58 0xc3
+
+# CHECK: vandpd %ymm5, %ymm1, %ymm0
+0xc4 0xc1 0x75 0x54 0xc5
+
+# CHECK: vandps %ymm3, %ymm1, %ymm0
+0xc5 0xf4 0x54 0xc3
+
+# CHECK: vzeroall
+0xc5 0xfc 0x77
+
+# CHECK: vcvtps2pd %xmm0, %ymm0
+0xc5 0xfc 0x5a 0xc0
+
+# CHECK: vandps (%edx), %xmm1, %xmm7
+0xc5 0xf0 0x54 0x3a
+
+# CHECK: vcvtss2si %xmm0, %eax
+0xc5 0xfa 0x2d 0xc0
+
+# CHECK: vcvtsd2si %xmm0, %eax
+0xc5 0xfb 0x2d 0xc0
+
+# CHECK: vcvtsd2si %xmm0, %eax
+0xc4 0xe1 0x7b 0x2d 0xc0
+
+# CHECK: vmaskmovpd %xmm0, %xmm1, (%eax)
+0xc4 0xe2 0x71 0x2f 0x00
+
+# CHECK: vmovapd %xmm0, %xmm2
+0xc5 0xf9 0x28 0xd0
+
+# Check these special case instructions that the immediate is not sign-extend.
+# CHECK: blendps $129, %xmm2, %xmm1
+0x66 0x0f 0x3a 0x0c 0xca 0x81
+
+# CHECK: blendpd $129, %xmm2, %xmm1
+0x66 0x0f 0x3a 0x0d 0xca 0x81
+
+# CHECK: pblendw $129, %xmm2, %xmm1
+0x66 0x0f 0x3a 0x0e 0xca 0x81
+
+# CHECK: mpsadbw $129, %xmm2, %xmm1
+0x66 0x0f 0x3a 0x42 0xca 0x81
+
+# CHECK: dpps $129, %xmm2, %xmm1
+0x66 0x0f 0x3a 0x40 0xca 0x81
+
+# CHECK: dppd $129, %xmm2, %xmm1
+0x66 0x0f 0x3a 0x41 0xca 0x81
+
+# CHECK: insertps $129, %xmm2, %xmm1
+0x66 0x0f 0x3a 0x21 0xca 0x81
+
+# CHECK: vblendps $129, %ymm2, %ymm5, %ymm1
+0xc4 0xe3 0x55 0x0c 0xca 0x81
+
+# CHECK: vblendps $129, (%eax), %ymm5, %ymm1
+0xc4 0xe3 0x55 0x0c 0x08 0x81
+
+# CHECK: vblendpd $129, %ymm2, %ymm5, %ymm1
+0xc4 0xe3 0x55 0x0d 0xca 0x81
+
+# CHECK: vblendpd $129, (%eax), %ymm5, %ymm1
+0xc4 0xe3 0x55 0x0d 0x08 0x81
+
+# CHECK: vpblendw $129, %xmm2, %xmm5, %xmm1
+0xc4 0xe3 0x51 0x0e 0xca 0x81
+
+# CHECK: vmpsadbw $129, %xmm2, %xmm5, %xmm1
+0xc4 0xe3 0x51 0x42 0xca 0x81
+
+# CHECK: vdpps $129, %ymm2, %ymm5, %ymm1
+0xc4 0xe3 0x55 0x40 0xca 0x81
+
+# CHECK: vdpps $129, (%eax), %ymm5, %ymm1
+0xc4 0xe3 0x55 0x40 0x08 0x81
+
+# CHECK: vdppd $129, %xmm2, %xmm5, %xmm1
+0xc4 0xe3 0x51 0x41 0xca 0x81
+
+# CHECK: vinsertps $129, %xmm3, %xmm2, %xmm1
+0xc4 0xe3 0x69 0x21 0xcb 0x81
+
+# CHECK: pause
+0xf3 0x90
+
+# CHECK: addl %eax, %edi
+0x01 0xc7
+
+# CHECK: addl %edi, %eax
+0x03 0xc7
+
+# CHECK: movl %eax, %edi
+0x89 0xc7
+
+# CHECK: movl %edi, %eax
+0x8b 0xc7
+
+# CHECK: movups %xmm1, %xmm0
+0x0f 0x10 0xc1
+
+# CHECK: movups %xmm0, %xmm1
+0x0f 0x11 0xc1
+
+# CHECK: movaps %xmm1, %xmm0
+0x0f 0x28 0xc1
+
+# CHECK: movaps %xmm0, %xmm1
+0x0f 0x29 0xc1
+
+# CHECK: movupd %xmm1, %xmm0
+0x66 0x0f 0x10 0xc1
+
+# CHECK: movupd %xmm0, %xmm1
+0x66 0x0f 0x11 0xc1
+
+# CHECK: movapd %xmm1, %xmm0
+0x66 0x0f 0x28 0xc1
+
+# CHECK: movapd %xmm0, %xmm1
+0x66 0x0f 0x29 0xc1
+
+# CHECK: vmovups %xmm1, %xmm0
+0xc5 0xf8 0x10 0xc1
+
+# CHECK: vmovups %xmm0, %xmm1
+0xc5 0xf8 0x11 0xc1
+
+# CHECK: vmovaps %xmm1, %xmm0
+0xc5 0xf8 0x28 0xc1
+
+# CHECK: vmovaps %xmm0, %xmm1
+0xc5 0xf8 0x29 0xc1
+
+# CHECK: vmovupd %xmm1, %xmm0
+0xc5 0xf9 0x10 0xc1
+
+# CHECK: vmovupd %xmm0, %xmm1
+0xc5 0xf9 0x11 0xc1
+
+# CHECK: vmovapd %xmm1, %xmm0
+0xc5 0xf9 0x28 0xc1
+
+# CHECK: vmovapd %xmm0, %xmm1
+0xc5 0xf9 0x29 0xc1
+
+# CHECK: vmovups %ymm1, %ymm0
+0xc5 0xfc 0x10 0xc1
+
+# CHECK: vmovups %ymm0, %ymm1
+0xc5 0xfc 0x11 0xc1
+
+# CHECK: vmovaps %ymm1, %ymm0
+0xc5 0xfc 0x28 0xc1
+
+# CHECK: vmovaps %ymm0, %ymm1
+0xc5 0xfc 0x29 0xc1
+
+# CHECK: movdqa %xmm1, %xmm0
+0x66 0x0f 0x6f 0xc1
+
+# CHECK: movdqa %xmm0, %xmm1
+0x66 0x0f 0x7f 0xc1
+
+# CHECK: movdqu %xmm1, %xmm0
+0xf3 0x0f 0x6f 0xc1
+
+# CHECK: movdqu %xmm0, %xmm1
+0xf3 0x0f 0x7f 0xc1
+
+# CHECK: vmovdqa %xmm1, %xmm0
+0xc5 0xf9 0x6f 0xc1
+
+# CHECK: vmovdqa %xmm0, %xmm1
+0xc5 0xf9 0x7f 0xc1
+
+# CHECK: vmovdqa %ymm1, %ymm0
+0xc5 0xfd 0x6f 0xc1
+
+# CHECK: vmovdqa %ymm0, %ymm1
+0xc5 0xfd 0x7f 0xc1
+
+# CHECK: vmovdqu %xmm1, %xmm0
+0xc5 0xfa 0x6f 0xc1
+
+# CHECK: vmovdqu %xmm0, %xmm1
+0xc5 0xfa 0x7f 0xc1
+
+# CHECK: vmovdqu %ymm1, %ymm0
+0xc5 0xfe 0x6f 0xc1
+
+# CHECK: vmovdqu %ymm0, %ymm1
+0xc5 0xfe 0x7f 0xc1
+
+# CHECK: vblendvps %xmm4, %xmm1, %xmm2, %xmm3
+0xc4 0xe3 0x69 0x4a 0xd9 0x41
+
+# CHECK: vroundpd $0, %xmm0, %xmm0
+0xc4 0xe3 0x79 0x09 0xc0 0x00
+
+# CHECK: vroundps $0, %xmm0, %xmm0
+0xc4 0xe3 0x79 0x08 0xc0 0x00
+
+# CHECK: vroundpd $0, %ymm0, %ymm0
+0xc4 0xe3 0x7d 0x09 0xc0 0x00
+
+# CHECK: vroundps $0, %ymm0, %ymm0
+0xc4 0xe3 0x7d 0x08 0xc0 0x00
+
+# CHECK: vroundss $0, %xmm0, %xmm0, %xmm0
+0xc4 0xe3 0x79 0x0a 0xc0 0x00
+
+# CHECK: vroundsd $0, %xmm0, %xmm0, %xmm0
+0xc4 0xe3 0x79 0x0b 0xc0 0x00
+
+# CHECK: invept (%eax), %eax
+0x66 0x0f 0x38 0x80 0x00
+
+# CHECK: invvpid (%eax), %eax
+0x66 0x0f 0x38 0x81 0x00
+
+# CHECK: invpcid (%eax), %eax
+0x66 0x0f 0x38 0x82 0x00
+
+# CHECK: nop
+0x90
+
+# CHECK: addb $0, %al
+0x04 0x00
+
+# CHECK: addw $0, %ax
+0x66 0x05 0x00 0x00
+
+# CHECK: addl $0, %eax
+0x05 0x00 0x00 0x00 0x00
+
+# CHECK: adcb $0, %al
+0x14 0x00
+
+# CHECK: adcw $0, %ax
+0x66 0x15 0x00 0x00
+
+# CHECK: adcl $0, %eax
+0x15 0x00 0x00 0x00 0x00
+
+# CHECK: cmpb $0, %al
+0x3c 0x00
+
+# CHECK: cmpw $0, %ax
+0x66 0x3d 0x00 0x00
+
+# CHECK: cmpl $0, %eax
+0x3d 0x00 0x00 0x00 0x00
+
+# CHECK: testb $0, %al
+0xa8 0x00
+
+# CHECK: testw $0, %ax
+0x66 0xa9 0x00 0x00
+
+# CHECK: testl $0, %eax
+0xa9 0x00 0x00 0x00 0x00
+
+# CHECK: movb 0, %al
+0xa0 0x00 0x00 0x00 0x00
+
+# CHECK: movw 0, %ax
+0x66 0xa1 0x00 0x00 0x00 0x00
+
+# CHECK: movl 0, %eax
+0xa1 0x00 0x00 0x00 0x00
+
+# CHECK: movb %al, 0
+0xa2 0x00 0x00 0x00 0x00
+
+# CHECK: movw %ax, 0
+0x66 0xa3 0x00 0x00 0x00 0x00
+
+# CHECK: movl %eax, 0
+0xa3 0x00 0x00 0x00 0x00
+
+# CHECK: cmpordpd %xmm7, %xmm0
+0x66 0x0f 0xc2 0xc7 0x07
+
+# CHECK: cmpordps %xmm7, %xmm0
+0x0f 0xc2 0xc7 0x07
+
+# CHECK: cmpordsd %xmm7, %xmm0
+0xf2 0x0f 0xc2 0xc7 0x07
+
+# CHECK: cmpordss %xmm7, %xmm0
+0xf3 0x0f 0xc2 0xc7 0x07
+
+# CHECK: vaddps %xmm3, %xmm7, %xmm0
+0xc4 0xe1 0x00 0x58 0xc3
+
+# CHECK: movbel (%eax), %eax
+0x0f 0x38 0xf0 0x00
+
+# CHECK: movbel %eax, (%eax)
+0x0f 0x38 0xf1 0x00
+
+# CHECK: movbew (%eax), %ax
+0x66 0x0f 0x38 0xf0 0x00
+
+# CHECK: movbew %ax, (%eax)
+0x66 0x0f 0x38 0xf1 0x00
+
+# CHECK: rdrandw %ax
+0x66 0x0f 0xc7 0xf0
+
+# CHECK: rdrandl %eax
+0x0f 0xc7 0xf0
+
+# CHECK: vroundss $0, %xmm0, %xmm0, %xmm0
+0xc4 0xe3 0x7d 0x0a 0xc0 0x00
+
+# CHECK: vroundsd $0, %xmm0, %xmm0, %xmm0
+0xc4 0xe3 0x7d 0x0b 0xc0 0x00
+
+# CHECK: vcvtsd2si %xmm0, %eax
+0xc4 0xe1 0x7f 0x2d 0xc0
+
+# CHECK: vcvtsd2si %xmm0, %eax
+0xc4 0xe1 0xff 0x2d 0xc0
+
+# CHECK: vucomisd %xmm1, %xmm0
+0xc5 0xfd 0x2e 0xc1
+
+# CHECK: vucomiss %xmm1, %xmm0
+0xc5 0xfc 0x2e 0xc1
+
+# CHECK: vcomisd %xmm1, %xmm0
+0xc5 0xfd 0x2f 0xc1
+
+# CHECK: vcomiss %xmm1, %xmm0
+0xc5 0xfc 0x2f 0xc1
+
+# CHECK: vaddss %xmm1, %xmm0, %xmm0
+0xc5 0xfe 0x58 0xc1
+
+# CHECK: xsave (%eax)
+0x0f 0xae 0x20
+
+# CHECK: xrstor (%eax)
+0x0f 0xae 0x28
+
+# CHECK: xsaveopt (%eax)
+0x0f 0xae 0x30
+
+# CHECK: xsaves (%eax)
+0x0f 0xc7 0x28
+
+# CHECK: xrstors (%eax)
+0x0f 0xc7 0x18
+
+# CHECK: xsavec (%eax)
+0x0f 0xc7 0x20
+
+# CHECK: clflush (%eax)
+0x0f 0xae 0x38
+
+# CHECK: clflushopt (%eax)
+0x66 0x0f 0xae 0x38
+
+# CHECK: clwb (%eax)
+0x66 0x0f 0xae 0x30
+
+# CHECK: pcommit
+0x66 0x0f 0xae 0xf8
+
+# CHECK: vcvtph2ps %xmm0, %xmm0
+0xc4 0xe2 0x79 0x13 0xc0
+
+# CHECK: vcvtph2ps (%eax), %xmm0
+0xc4 0xe2 0x79 0x13 0x00
+
+# CHECK: vcvtph2ps %xmm0, %ymm0
+0xc4 0xe2 0x7d 0x13 0xc0
+
+# CHECK: vcvtph2ps (%eax), %ymm0
+0xc4 0xe2 0x7d 0x13 0x00
+
+# CHECK: vcvtps2ph $0, %xmm0, %xmm0
+0xc4 0xe3 0x79 0x1d 0xc0 0x00
+
+# CHECK: vcvtps2ph $0, %xmm0, (%eax)
+0xc4 0xe3 0x79 0x1d 0x00 0x00
+
+# CHECK: vcvtps2ph $0, %ymm0, %xmm0
+0xc4 0xe3 0x7d 0x1d 0xc0 0x00
+
+# CHECK: vcvtps2ph $0, %ymm0, (%eax)
+0xc4 0xe3 0x7d 0x1d 0x00 0x00
+
+# CHECK: popcntl %eax, %eax
+0xf3 0x0f 0xb8 0xc0
+
+# CHECK: popcntw %ax, %ax
+0x66 0xf3 0x0f 0xb8 0xc0
+
+# CHECK: lzcntl %eax, %eax
+0xf3 0x0f 0xbd 0xc0
+
+# CHECK: lzcntw %ax, %ax
+0x66 0xf3 0x0f 0xbd 0xc0
+
+# CHECK: tzcntl %eax, %eax
+0xf3 0x0f 0xbc 0xc0
+
+# CHECK: tzcntw %ax, %ax
+0x66 0xf3 0x0f 0xbc 0xc0
+
+# CHECK: andnl %ecx, %edi, %eax
+0xc4 0xe2 0x00 0xf2 0xc1
+
+# CHECK: andnl (%eax), %edi, %eax
+0xc4 0xe2 0x00 0xf2 0x00
+
+# CHECK: andnl %ecx, %edi, %eax
+0xc4 0xe2 0x80 0xf2 0xc1
+
+# CHECK: andnl (%eax), %edi, %eax
+0xc4 0xe2 0x80 0xf2 0x00
+
+# CHECK: blsrl (%eax), %edi
+0xc4 0xe2 0x40 0xf3 0x08
+
+# CHECK: blsmskl (%eax), %edi
+0xc4 0xe2 0x40 0xf3 0x10
+
+# CHECK: blsil (%eax), %edi
+0xc4 0xe2 0x40 0xf3 0x18
+
+# CHECK: bextrl %esi, (%eax), %edx
+0xc4 0xe2 0x08 0xf7 0x10
+
+# CHECK: bextrl %esi, %ebx, %edx
+0xc4 0xe2 0x08 0xf7 0xd3
+
+# CHECK: bzhil %esi, (%eax), %edx
+0xc4 0xe2 0x08 0xf5 0x10
+
+# CHECK: bzhil %esi, %ebx, %edx
+0xc4 0xe2 0x08 0xf5 0xd3
+
+# CHECK: pextl %esp, %ecx, %edx
+0xc4 0xe2 0x72 0xf5 0xd4
+
+# CHECK: pextl (%eax), %ecx, %edx
+0xc4 0xe2 0x72 0xf5 0x10
+
+# CHECK: pdepl %esp, %ecx, %edx
+0xc4 0xe2 0x73 0xf5 0xd4
+
+# CHECK: pdepl (%eax), %ecx, %edx
+0xc4 0xe2 0x73 0xf5 0x10
+
+# CHECK: mulxl %esp, %ecx, %edx
+0xc4 0xe2 0x73 0xf6 0xd4
+
+# CHECK: mulxl (%eax), %ecx, %edx
+0xc4 0xe2 0x73 0xf6 0x10
+
+# CHECK: mulxl %esp, %ecx, %edx
+0xc4 0xe2 0xf3 0xf6 0xd4
+
+# CHECK: mulxl (%eax), %ecx, %edx
+0xc4 0xe2 0xf3 0xf6 0x10
+
+# CHECK: rorxl $1, %esp, %edx
+0xc4 0xe3 0x7b 0xf0 0xd4 0x01
+
+# CHECK: rorxl $31, (%eax), %edx
+0xc4 0xe3 0x7b 0xf0 0x10 0x1f
+
+# CHECK: shlxl %esi, (%eax), %edx
+0xc4 0xe2 0x09 0xf7 0x10
+
+# CHECK: shlxl %esi, %ebx, %edx
+0xc4 0xe2 0x09 0xf7 0xd3
+
+# CHECK: sarxl %esi, (%eax), %edx
+0xc4 0xe2 0x0a 0xf7 0x10
+
+# CHECK: sarxl %esi, %ebx, %edx
+0xc4 0xe2 0x0a 0xf7 0xd3
+
+# CHECK: shrxl %esi, (%eax), %edx
+0xc4 0xe2 0x0b 0xf7 0x10
+
+# CHECK: shrxl %esi, %ebx, %edx
+0xc4 0xe2 0x0b 0xf7 0xd3
+
+# CHECK: extrq  $2, $3, %xmm0
+0x66 0x0f 0x78 0xc0 0x03 0x02
+
+# CHECK: extrq  %xmm1, %xmm0
+0x66 0x0f 0x79 0xc1
+
+# CHECK: insertq $6, $5, %xmm1, %xmm0
+0xf2 0x0f 0x78 0xc1 0x05 0x06
+
+# CHECK: insertq %xmm1, %xmm0
+0xf2 0x0f 0x79 0xc1
+
+# CHECK: movntsd %xmm0, (%edi)
+0xf2 0x0f 0x2b 0x07
+
+# CHECK: movntss %xmm0, (%edi)
+0xf3 0x0f 0x2b 0x07
+
+# CHECK: prefetch (%eax)
+0x0f 0x0d 0x00
+
+# CHECK: prefetchw (%eax)
+0x0f 0x0d 0x08
+
+# CHECK: adcxl %eax, %eax
+0x66 0x0f 0x38 0xf6 0xc0
+
+# CHECK: adcxl (%eax), %eax
+0x66 0x0f 0x38 0xf6 0x00
+
+# CHECK: adoxl %eax, %eax
+0xf3 0x0f 0x38 0xf6 0xc0
+
+# CHECK: adoxl (%eax), %eax
+0xf3 0x0f 0x38 0xf6 0x00
+
+# CHECK: movb 878082192, %al
+0xa0 0x90 0x78 0x56 0x34
+
+# CHECK: movw 878082192, %ax
+0x66 0xa1 0x90 0x78 0x56 0x34
+
+# CHECK: movl 878082192, %eax
+0xa1 0x90 0x78 0x56 0x34
+
+# CHECK: movb %al, 878082192
+0xa2 0x90 0x78 0x56 0x34
+
+# CHECK: movw %ax, 878082192
+0x66 0xa3 0x90 0x78 0x56 0x34
+
+# CHECK: movl %eax, 878082192
+0xa3 0x90 0x78 0x56 0x34
+
+# CHECK: incl %ecx
+0xff 0xc1
+
+# CHECK: decl %ecx
+0xff 0xc9
+
+# CHECK: incw %cx
+0x66 0xff 0xc1
+
+# CHECK: decw %cx
+0x66 0xff 0xc9
+
+# CHECK: incb %cl
+0xfe 0xc1
+
+# CHECK: decb %cl
+0xfe 0xc9
+
+# CHECK: incl %ecx
+0x41
+
+# CHECK: decl %ecx
+0x49
+
+# CHECK: movq %xmm0, %xmm0
+0xf3 0x0f 0x7e 0xc0
+
+# CHECK: vmovq %xmm0, %xmm0
+0xc5 0xfa 0x7e 0xc0
+
+# CHECK: movl %fs:0, %eax
+0x64 0xa1 0x00 0x00 0x00 0x00
+
+# CHECK: movb $-1, %al
+0xc6 0xc0 0xff
+
+# CHECK: movw $65535, %ax
+0x66 0xc7 0xc0 0xff 0xff
+
+# CHECK: movl $4294967295, %eax
+0xc7 0xc0 0xff 0xff 0xff 0xff
+
+# CHECK: movq %mm0, %mm1
+0x0f 0x7f 0xc1
+
+# CHECK: vpermq $238, %ymm2, %ymm2
+0xc4 0xe3 0xfd 0x00 0xd2 0xee
+
+# CHECK: cmpps $8, %xmm7, %xmm0
+0x0f 0xc2 0xc7 0x08
+# CHECK: cmppd $8, %xmm7, %xmm0
+0x66 0x0f 0xc2 0xc7 0x08
+# CHECK: cmpss $8, %xmm7, %xmm0
+0xf3 0x0f 0xc2 0xc7 0x08
+# CHECK: cmpsd $8, %xmm7, %xmm0
+0xf2 0x0f 0xc2 0xc7 0x08
+
+# CHECK: addb $38, 5277496
+0x82 0x05 0x38 0x87 0x50 0x00 0x26
+# CHECK: orb $38, 5277496
+0x82 0x0d 0x38 0x87 0x50 0x00 0x26
+# CHECK: adcb $38, 5277496
+0x82 0x15 0x38 0x87 0x50 0x00 0x26
+# CHECK: sbbb $38, 5277496
+0x82 0x1d 0x38 0x87 0x50 0x00 0x26
+# CHECK: andb $38, 5277496
+0x82 0x25 0x38 0x87 0x50 0x00 0x26
+# CHECK: subb $38, 5277496
+0x82 0x2D 0x38 0x87 0x50 0x00 0x26
+# CHECK: xorb $38, 5277496
+0x82 0x35 0x38 0x87 0x50 0x00 0x26
+# CHECK: cmpb $38, 5277496
+0x82 0x3d 0x38 0x87 0x50 0x00 0x26
+
+#CHECK: getsec
+0x0f 0x37

test/MC/X86/x86-16.s

-// RUN: llvm-mc -triple i386-unknown-unknown-code16 --show-encoding %s | FileCheck %s
-
-  movl $0x12345678, %ebx
-// CHECK: movl
-// CHECK: encoding: [0x66,0xbb,0x78,0x56,0x34,0x12]
-  pause
-// CHECK: pause
-// CHECK: encoding: [0xf3,0x90]
-  sfence
-// CHECK: sfence
-// CHECK: encoding: [0x0f,0xae,0xf8]
-  lfence
-// CHECK: lfence
-// CHECK: encoding: [0x0f,0xae,0xe8]
-  mfence
-  stgi
-// CHECK: stgi
-// CHECK: encoding: [0x0f,0x01,0xdc]
-  clgi
-// CHECK: clgi
-// CHECK: encoding: [0x0f,0x01,0xdd]
-
-  rdtscp
-// CHECK: rdtscp
-// CHECK:  encoding: [0x0f,0x01,0xf9]
-
-
-// CHECK: movl  %eax, 16(%ebp)          # encoding: [0x67,0x66,0x89,0x45,0x10]
-  movl  %eax, 16(%ebp)
-// CHECK: movl  %eax, -16(%ebp)          # encoding: [0x67,0x66,0x89,0x45,0xf0]
-  movl  %eax, -16(%ebp)
-
-// CHECK: testb %bl, %cl                # encoding: [0x84,0xd9]
-        testb %bl, %cl
-
-// CHECK: cmpl  %eax, %ebx              # encoding: [0x66,0x39,0xc3]
-        cmpl %eax, %ebx
-
-// CHECK: addw  %ax, %ax                # encoding: [0x01,0xc0]
-        addw %ax, %ax
-
-// CHECK: shrl  %eax                    # encoding: [0x66,0xd1,0xe8]
-        shrl $1, %eax
-
-// CHECK: shll  %eax                    # encoding: [0x66,0xd1,0xe0]
-        sall $1, %eax
-// CHECK: shll  %eax                    # encoding: [0x66,0xd1,0xe0]
-        sal $1, %eax
-
-// moffset forms of moves
-
-// CHECK: movb 0, %al  # encoding: [0xa0,0x00,0x00]
-movb  0, %al
-
-// CHECK: movw 0, %ax  # encoding: [0xa1,0x00,0x00]
-movw  0, %ax
-
-// CHECK: movl 0, %eax  # encoding: [0x66,0xa1,0x00,0x00]
-movl  0, %eax
-
-into
-// CHECK: into
-// CHECK:  encoding: [0xce]
-int3
-// CHECK: int3
-// CHECK:  encoding: [0xcc]
-int $4
-// CHECK: int $4
-// CHECK:  encoding: [0xcd,0x04]
-int $255
-// CHECK: int $255
-// CHECK:  encoding: [0xcd,0xff]
-
-// CHECK: pushfw  # encoding: [0x9c]
-        pushf
-// CHECK: pushfl  # encoding: [0x66,0x9c]
-        pushfl
-// CHECK: popfw         # encoding: [0x9d]
-        popf
-// CHECK: popfl         # encoding: [0x66,0x9d]
-        popfl
-
-retl
-// CHECK: ret
-// CHECK:  encoding: [0x66,0xc3]
-
-// CHECK: cmoval  %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x47,0xd0]
-          cmoval  %eax,%edx
-
-// CHECK: cmovael %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x43,0xd0]
-          cmovael  %eax,%edx
-
-// CHECK: cmovbel %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x46,0xd0]
-          cmovbel  %eax,%edx
-
-// CHECK: cmovbl  %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x42,0xd0]
-          cmovbl  %eax,%edx
-
-// CHECK: cmovbw %bx, %bx
-cmovnae  %bx,%bx
-
-
-// CHECK: cmovbel %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x46,0xd0]
-          cmovbel  %eax,%edx
-
-// CHECK: cmovbl  %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x42,0xd0]
-          cmovcl  %eax,%edx
-
-// CHECK: cmovel  %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x44,0xd0]
-          cmovel  %eax,%edx
-
-// CHECK: cmovgl  %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x4f,0xd0]
-          cmovgl  %eax,%edx
-
-// CHECK: cmovgel %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x4d,0xd0]
-          cmovgel  %eax,%edx
-
-// CHECK: cmovll  %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x4c,0xd0]
-          cmovll  %eax,%edx
-
-// CHECK: cmovlel %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x4e,0xd0]
-          cmovlel  %eax,%edx
-
-// CHECK: cmovbel %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x46,0xd0]
-          cmovnal  %eax,%edx
-
-// CHECK: cmovnel %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x45,0xd0]
-          cmovnel  %eax,%edx
-
-// CHECK: cmovael %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x43,0xd0]
-          cmovnbl  %eax,%edx
-
-// CHECK: cmoval  %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x47,0xd0]
-          cmovnbel  %eax,%edx
-
-// CHECK: cmovael %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x43,0xd0]
-          cmovncl  %eax,%edx
-
-// CHECK: cmovnel %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x45,0xd0]
-          cmovnel  %eax,%edx
-
-// CHECK: cmovlel %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x4e,0xd0]
-          cmovngl  %eax,%edx
-
-// CHECK: cmovgel %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x4d,0xd0]
-          cmovnl  %eax,%edx
-
-// CHECK: cmovnel %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x45,0xd0]
-          cmovnel  %eax,%edx
-
-// CHECK: cmovlel %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x4e,0xd0]
-          cmovngl  %eax,%edx
-
-// CHECK: cmovll  %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x4c,0xd0]
-          cmovngel  %eax,%edx
-
-// CHECK: cmovgel %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x4d,0xd0]
-          cmovnll  %eax,%edx
-
-// CHECK: cmovgl  %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x4f,0xd0]
-          cmovnlel  %eax,%edx
-
-// CHECK: cmovnol %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x41,0xd0]
-          cmovnol  %eax,%edx
-
-// CHECK: cmovnpl %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x4b,0xd0]
-          cmovnpl  %eax,%edx
-
-// CHECK: cmovnsl %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x49,0xd0]
-          cmovnsl  %eax,%edx
-
-// CHECK: cmovnel %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x45,0xd0]
-          cmovnzl  %eax,%edx
-
-// CHECK: cmovol  %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x40,0xd0]
-          cmovol  %eax,%edx
-
-// CHECK: cmovpl  %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x4a,0xd0]
-          cmovpl  %eax,%edx
-
-// CHECK: cmovsl  %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x48,0xd0]
-          cmovsl  %eax,%edx
-
-// CHECK: cmovel  %eax, %edx
-// CHECK:  encoding: [0x66,0x0f,0x44,0xd0]
-          cmovzl  %eax,%edx
-
-// CHECK: fmul  %st(0)
-// CHECK:  encoding: [0xd8,0xc8]
-        fmul %st(0), %st
-
-// CHECK: fadd  %st(0)
-// CHECK:  encoding: [0xd8,0xc0]
-        fadd %st(0), %st
-
-// CHECK: fsub  %st(0)
-// CHECK:  encoding: [0xd8,0xe0]
-        fsub %st(0), %st
-
-// CHECK: fsubr %st(0)
-// CHECK:  encoding: [0xd8,0xe8]
-        fsubr %st(0), %st
-
-// CHECK: fdivr %st(0)
-// CHECK:  encoding: [0xd8,0xf8]
-        fdivr %st(0), %st
-
-// CHECK: fdiv  %st(0)
-// CHECK:  encoding: [0xd8,0xf0]
-        fdiv %st(0), %st
-
-// CHECK: movl  %cs, %eax
-// CHECK:  encoding: [0x66,0x8c,0xc8]
-        movl %cs, %eax
-
-// CHECK: movw  %cs, %ax
-// CHECK:  encoding: [0x8c,0xc8]
-        movw %cs, %ax
-
-// CHECK: movl  %cs, (%eax)
-// CHECK:  encoding: [0x67,0x66,0x8c,0x08]
-        movl %cs, (%eax)
-
-// CHECK: movw  %cs, (%eax)
-// CHECK:  encoding: [0x67,0x8c,0x08]
-        movw %cs, (%eax)
-
-// CHECK: movw  %ax, %cs
-// CHECK:  encoding: [0x8e,0xc8]
-        movl %eax, %cs
-
-// CHECK: movw  %ax, %cs
-// CHECK:  encoding: [0x8e,0xc8]
-        mov %eax, %cs  
-
-// CHECK: movw  %ax, %cs
-// CHECK:  encoding: [0x8e,0xc8]
-        movw %ax, %cs
-
-// CHECK: movw  %ax, %cs
-// CHECK:  encoding: [0x8e,0xc8]
-        mov %ax, %cs    
-  
-// CHECK: movl  (%eax), %cs
-// CHECK:  encoding: [0x67,0x66,0x8e,0x08]
-        movl (%eax), %cs
-
-// CHECK: movw  (%eax), %cs
-// CHECK:  encoding: [0x67,0x8e,0x08]
-        movw (%eax), %cs
-
-// CHECK: movl  %cr0, %eax
-// CHECK:  encoding: [0x0f,0x20,0xc0]
-        movl %cr0,%eax
-
-// CHECK: movl  %cr1, %eax
-// CHECK:  encoding: [0x0f,0x20,0xc8]
-        movl %cr1,%eax
-
-// CHECK: movl  %cr2, %eax
-// CHECK:  encoding: [0x0f,0x20,0xd0]
-        movl %cr2,%eax
-
-// CHECK: movl  %cr3, %eax
-// CHECK:  encoding: [0x0f,0x20,0xd8]
-        movl %cr3,%eax
-
-// CHECK: movl  %cr4, %eax
-// CHECK:  encoding: [0x0f,0x20,0xe0]
-        movl %cr4,%eax
-
-// CHECK: movl  %dr0, %eax
-// CHECK:  encoding: [0x0f,0x21,0xc0]
-        movl %dr0,%eax
-
-// CHECK: movl  %dr1, %eax
-// CHECK:  encoding: [0x0f,0x21,0xc8]
-        movl %dr1,%eax
-
-// CHECK: movl  %dr1, %eax
-// CHECK:  encoding: [0x0f,0x21,0xc8]
-        movl %dr1,%eax
-
-// CHECK: movl  %dr2, %eax
-// CHECK:  encoding: [0x0f,0x21,0xd0]
-        movl %dr2,%eax
-
-// CHECK: movl  %dr3, %eax
-// CHECK:  encoding: [0x0f,0x21,0xd8]
-        movl %dr3,%eax
-
-// CHECK: movl  %dr4, %eax
-// CHECK:  encoding: [0x0f,0x21,0xe0]
-        movl %dr4,%eax
-
-// CHECK: movl  %dr5, %eax
-// CHECK:  encoding: [0x0f,0x21,0xe8]
-        movl %dr5,%eax
-
-// CHECK: movl  %dr6, %eax
-// CHECK:  encoding: [0x0f,0x21,0xf0]
-        movl %dr6,%eax
-
-// CHECK: movl  %dr7, %eax
-// CHECK:  encoding: [0x0f,0x21,0xf8]
-        movl %dr7,%eax
-
-// CHECK: wait
-// CHECK:  encoding: [0x9b]
-  fwait
-
-// CHECK: [0x66,0x65,0xa1,0x7c,0x00]
-        movl  %gs:124, %eax
-
-// CHECK: pusha
-// CHECK:  encoding: [0x60]
-          pusha
-
-// CHECK: popa
-// CHECK:  encoding: [0x61]
-          popa
-
-// CHECK: pushaw
-// CHECK:  encoding: [0x60]
-          pushaw
-
-// CHECK: popaw
-// CHECK:  encoding: [0x61]
-          popaw
-
-// CHECK: pushal
-// CHECK:  encoding: [0x66,0x60]
-          pushal
-
-// CHECK: popal
-// CHECK:  encoding: [0x66,0x61]
-          popal
-
-// CHECK: jmpw *8(%eax)
-// CHECK:   encoding: [0x67,0xff,0x60,0x08]
-  jmp  *8(%eax)
-
-// CHECK: jmpl *8(%eax)
-// CHECK:   encoding: [0x67,0x66,0xff,0x60,0x08]
-        jmpl  *8(%eax)
-
-// CHECK: lcalll $2, $4660
-// CHECK:   encoding: [0x66,0x9a,0x34,0x12,0x00,0x00,0x02,0x00]
-lcalll $0x2, $0x1234
-
-
-L1:
-  jcxz L1
-// CHECK: jcxz L1
-// CHECK:   encoding: [0xe3,A]
-  jecxz L1
-// CHECK: jecxz L1
-// CHECK:   encoding: [0x67,0xe3,A]
-
-iret
-// CHECK: iretw
-// CHECK: encoding: [0xcf]
-iretw
-// CHECK: iretw
-// CHECK: encoding: [0xcf]
-iretl
-// CHECK: iretl
-// CHECK: encoding: [0x66,0xcf]
-
-sysret
-// CHECK: sysretl
-// CHECK: encoding: [0x0f,0x07]
-sysretl
-// CHECK: sysretl
-// CHECK: encoding: [0x0f,0x07]
-
-testl  %ecx, -24(%ebp)
-// CHECK: testl -24(%ebp), %ecx
-testl  -24(%ebp), %ecx
-// CHECK: testl -24(%ebp), %ecx
-
-
-push %cs
-// CHECK: pushw %cs
-// CHECK: encoding: [0x0e]
-push %ds
-// CHECK: pushw %ds
-// CHECK: encoding: [0x1e]
-push %ss
-// CHECK: pushw %ss
-// CHECK: encoding: [0x16]
-push %es
-// CHECK: pushw %es
-// CHECK: encoding: [0x06]
-push %fs
-// CHECK: pushw %fs
-// CHECK: encoding: [0x0f,0xa0]
-push %gs
-// CHECK: pushw %gs
-// CHECK: encoding: [0x0f,0xa8]
-
-pushw %cs
-// CHECK: pushw %cs
-// CHECK: encoding: [0x0e]
-pushw %ds
-// CHECK: pushw %ds
-// CHECK: encoding: [0x1e]
-pushw %ss
-// CHECK: pushw %ss
-// CHECK: encoding: [0x16]
-pushw %es
-// CHECK: pushw %es
-// CHECK: encoding: [0x06]
-pushw %fs
-// CHECK: pushw %fs
-// CHECK: encoding: [0x0f,0xa0]
-pushw %gs
-// CHECK: pushw %gs
-// CHECK: encoding: [0x0f,0xa8]
-
-pushl %cs
-// CHECK: pushl %cs
-// CHECK: encoding: [0x66,0x0e]
-pushl %ds
-// CHECK: pushl %ds
-// CHECK: encoding: [0x66,0x1e]
-pushl %ss
-// CHECK: pushl %ss
-// CHECK: encoding: [0x66,0x16]
-pushl %es
-// CHECK: pushl %es
-// CHECK: encoding: [0x66,0x06]
-pushl %fs
-// CHECK: pushl %fs
-// CHECK: encoding: [0x66,0x0f,0xa0]
-pushl %gs
-// CHECK: pushl %gs
-// CHECK: encoding: [0x66,0x0f,0xa8]
-
-pop %ss
-// CHECK: popw  %ss
-// CHECK: encoding: [0x17]
-pop %ds
-// CHECK: popw  %ds
-// CHECK: encoding: [0x1f]
-pop %es
-// CHECK: popw  %es
-// CHECK: encoding: [0x07]
-
-popl %ss
-// CHECK: popl  %ss
-// CHECK: encoding: [0x66,0x17]
-popl %ds
-// CHECK: popl  %ds
-// CHECK: encoding: [0x66,0x1f]
-popl %es
-// CHECK: popl  %es
-// CHECK: encoding: [0x66,0x07]
-
-pushfd
-// CHECK: pushfl
-popfd
-// CHECK: popfl
-pushfl
-// CHECK: pushfl
-popfl
-// CHECK: popfl
-
-
-  setc  %bl
-  setnae  %bl
-  setnb %bl
-  setnc %bl
-  setna %bl
-  setnbe  %bl
-  setpe %bl
-  setpo %bl
-  setnge  %bl
-  setnl %bl
-  setng %bl
-  setnle  %bl
-
-        setneb  %cl // CHECK: setne %cl
-  setcb %bl // CHECK: setb %bl
-  setnaeb  %bl // CHECK: setb %bl
-
-
-// CHECK: lcalll  $31438, $31438
-// CHECK: lcalll  $31438, $31438
-// CHECK: ljmpl $31438, $31438
-// CHECK: ljmpl $31438, $31438
-
-calll  $0x7ace,$0x7ace
-lcalll  $0x7ace,$0x7ace
-jmpl  $0x7ace,$0x7ace
-ljmpl $0x7ace,$0x7ace
-
-// CHECK: lcallw  $31438, $31438
-// CHECK: lcallw  $31438, $31438
-// CHECK: ljmpw $31438, $31438
-// CHECK: ljmpw $31438, $31438
-
-callw  $0x7ace,$0x7ace
-lcallw  $0x7ace,$0x7ace
-jmpw  $0x7ace,$0x7ace
-ljmpw $0x7ace,$0x7ace
-
-// CHECK: lcallw  $31438, $31438
-// CHECK: lcallw  $31438, $31438
-// CHECK: ljmpw $31438, $31438
-// CHECK: ljmpw $31438, $31438
-
-call  $0x7ace,$0x7ace
-lcall  $0x7ace,$0x7ace
-jmp  $0x7ace,$0x7ace
-ljmp  $0x7ace,$0x7ace
-
-// CHECK: calll a
- calll a
-
-// CHECK: incb  %al # encoding: [0xfe,0xc0]
-  incb %al
-
-// CHECK: incw  %ax # encoding: [0x40]
-  incw %ax
-
-// CHECK: incl  %eax # encoding: [0x66,0x40]
-  incl %eax
-
-// CHECK: decb  %al # encoding: [0xfe,0xc8]
-  decb %al
-
-// CHECK: decw  %ax # encoding: [0x48]
-  decw %ax
-
-// CHECK: decl  %eax # encoding: [0x66,0x48]
-  decl %eax
-
-// CHECK: pshufw $14, %mm4, %mm0 # encoding: [0x0f,0x70,0xc4,0x0e]
-pshufw $14, %mm4, %mm0
-
-// CHECK: pshufw $90, %mm4, %mm0 # encoding: [0x0f,0x70,0xc4,0x5a]
-pshufw $90, %mm4, %mm0
-
-// CHECK: aaa
-// CHECK:  encoding: [0x37]
-          aaa
-
-// CHECK: aad $1
-// CHECK:  encoding: [0xd5,0x01]
-          aad $1
-
-// CHECK: aad
-// CHECK:  encoding: [0xd5,0x0a]
-          aad $0xA
-
-// CHECK: aad
-// CHECK:  encoding: [0xd5,0x0a]
-          aad
-
-// CHECK: aam $2
-// CHECK:  encoding: [0xd4,0x02]
-          aam $2
-
-// CHECK: aam
-// CHECK:  encoding: [0xd4,0x0a]
-          aam $0xA
-
-// CHECK: aam
-// CHECK:  encoding: [0xd4,0x0a]
-          aam
-
-// CHECK: aas
-// CHECK:  encoding: [0x3f]
-          aas
-
-// CHECK: daa
-// CHECK:  encoding: [0x27]
-          daa
-
-// CHECK: das
-// CHECK:  encoding: [0x2f]
-          das
-
-// CHECK: retw  $31438
-// CHECK:  encoding: [0xc2,0xce,0x7a]
-          retw  $0x7ace
-
-// CHECK: lretw $31438
-// CHECK:  encoding: [0xca,0xce,0x7a]
-          lretw $0x7ace
-
-// CHECK: retw  $31438
-// CHECK:  encoding: [0xc2,0xce,0x7a]
-          ret $0x7ace
-
-// CHECK: lretw $31438
-// CHECK:  encoding: [0xca,0xce,0x7a]
-          lret  $0x7ace
-
-// CHECK: retl  $31438
-// CHECK:  encoding: [0x66,0xc2,0xce,0x7a]
-          retl  $0x7ace
-
-// CHECK: lretl $31438
-// CHECK:  encoding: [0x66,0xca,0xce,0x7a]
-          lretl $0x7ace
-
-// CHECK: bound 2(%eax), %bx
-// CHECK:  encoding: [0x67,0x62,0x58,0x02]
-          bound  2(%eax),%bx
-
-// CHECK: bound 4(%ebx), %ecx
-// CHECK:  encoding: [0x67,0x66,0x62,0x4b,0x04]
-          bound  4(%ebx),%ecx
-
-// CHECK: arpl  %bx, %bx
-// CHECK:  encoding: [0x63,0xdb]
-          arpl  %bx,%bx
-
-// CHECK: arpl  %bx, 6(%ecx)
-// CHECK:  encoding: [0x67,0x63,0x59,0x06]
-          arpl  %bx,6(%ecx)
-
-// CHECK: lgdtw 4(%eax)
-// CHECK:  encoding: [0x67,0x0f,0x01,0x50,0x04]
-          lgdtw  4(%eax)
-
-// CHECK: lgdtw 4(%eax)
-// CHECK:  encoding: [0x67,0x0f,0x01,0x50,0x04]
-          lgdt  4(%eax)
-
-// CHECK: lgdtl 4(%eax)
-// CHECK:  encoding: [0x67,0x66,0x0f,0x01,0x50,0x04]
-          lgdtl  4(%eax)
-
-// CHECK: lidtw 4(%eax)
-// CHECK:  encoding: [0x67,0x0f,0x01,0x58,0x04]
-          lidtw  4(%eax)
-
-// CHECK: lidtw 4(%eax)
-// CHECK:  encoding: [0x67,0x0f,0x01,0x58,0x04]
-          lidt  4(%eax)
-
-// CHECK: lidtl 4(%eax)
-// CHECK:  encoding: [0x67,0x66,0x0f,0x01,0x58,0x04]
-          lidtl  4(%eax)
-
-// CHECK: sgdtw 4(%eax)
-// CHECK:  encoding: [0x67,0x0f,0x01,0x40,0x04]
-          sgdtw  4(%eax)
-
-// CHECK: sgdtw 4(%eax)
-// CHECK:  encoding: [0x67,0x0f,0x01,0x40,0x04]
-          sgdt  4(%eax)
-
-// CHECK: sgdtl 4(%eax)
-// CHECK:  encoding: [0x67,0x66,0x0f,0x01,0x40,0x04]
-          sgdtl  4(%eax)
-
-// CHECK: sidtw 4(%eax)
-// CHECK:  encoding: [0x67,0x0f,0x01,0x48,0x04]
-          sidtw  4(%eax)
-
-// CHECK: sidtw 4(%eax)
-// CHECK:  encoding: [0x67,0x0f,0x01,0x48,0x04]
-          sidt  4(%eax)
-
-// CHECK: sidtl 4(%eax)
-// CHECK:  encoding: [0x67,0x66,0x0f,0x01,0x48,0x04]
-          sidtl  4(%eax)
-
-// CHECK: fcompi  %st(2)
-// CHECK:  encoding: [0xdf,0xf2]
-          fcompi  %st(2), %st
-
-// CHECK: fcompi  %st(2)
-// CHECK:  encoding: [0xdf,0xf2]
-          fcompi  %st(2)
-
-// CHECK: fcompi
-// CHECK:  encoding: [0xdf,0xf1]
-          fcompi
-
-// CHECK: fucompi %st(2)
-// CHECK:  encoding: [0xdf,0xea]
-          fucompi  %st(2),%st
-
-// CHECK: fucompi %st(2)
-// CHECK:  encoding: [0xdf,0xea]
-          fucompi  %st(2)
-
-// CHECK: fucompi
-// CHECK:  encoding: [0xdf,0xe9]
-          fucompi
-
-// CHECK: fldcw 32493
-// CHECK:  encoding: [0xd9,0x2e,0xed,0x7e]
-          fldcww  0x7eed
-
-// CHECK: fldcw 32493
-// CHECK:  encoding: [0xd9,0x2e,0xed,0x7e]
-          fldcw 0x7eed
-
-// CHECK: fnstcw  32493
-// CHECK:  encoding: [0xd9,0x3e,0xed,0x7e]
-          fnstcww 0x7eed
-
-// CHECK: fnstcw  32493
-// CHECK:  encoding: [0xd9,0x3e,0xed,0x7e]
-          fnstcw  0x7eed
-
-// CHECK: wait
-// CHECK:  encoding: [0x9b]
-          fstcww  0x7eed
-
-// CHECK: wait
-// CHECK:  encoding: [0x9b]
-          fstcw 0x7eed
-
-// CHECK: fnstsw  32493
-// CHECK:  encoding: [0xdd,0x3e,0xed,0x7e]
-          fnstsww 0x7eed
-
-// CHECK: fnstsw  32493
-// CHECK:  encoding: [0xdd,0x3e,0xed,0x7e]
-          fnstsw  0x7eed
-
-// CHECK: wait
-// CHECK:  encoding: [0x9b]
-          fstsww  0x7eed
-
-// CHECK: wait
-// CHECK:  encoding: [0x9b]
-          fstsw 0x7eed
-
-// CHECK: verr  32493
-// CHECK:  encoding: [0x0f,0x00,0x26,0xed,0x7e]
-          verrw 0x7eed
-
-// CHECK: verr  32493
-// CHECK:  encoding: [0x0f,0x00,0x26,0xed,0x7e]
-          verr  0x7eed
-
-// CHECK: wait
-// CHECK:  encoding: [0x9b]
-          fclex
-
-// CHECK: fnclex
-// CHECK:  encoding: [0xdb,0xe2]
-          fnclex
-
-// CHECK: ud2
-// CHECK:  encoding: [0x0f,0x0b]
-          ud2
-
-// CHECK: ud2
-// CHECK:  encoding: [0x0f,0x0b]
-          ud2a
-
-// CHECK: ud2b
-// CHECK:  encoding: [0x0f,0xb9]
-          ud2b
-
-// CHECK: loope 0
-// CHECK: encoding: [0xe1,A]
-  loopz 0
-
-// CHECK: loopne 0
-// CHECK: encoding: [0xe0,A]
-  loopnz 0
-
-// CHECK: outsb (%si), %dx # encoding: [0x6e]
-// CHECK: outsb
-// CHECK: outsb
-  outsb
-  outsb  %ds:(%si), %dx
-  outsb  (%si), %dx
-
-// CHECK: outsw (%si), %dx # encoding: [0x6f]
-// CHECK: outsw
-// CHECK: outsw
-  outsw
-  outsw  %ds:(%si), %dx
-  outsw  (%si), %dx
-
-// CHECK: outsl (%si), %dx # encoding: [0x66,0x6f]
-// CHECK: outsl
-  outsl
-  outsl  %ds:(%si), %dx
-  outsl  (%si), %dx
-
-// CHECK: insb %dx, %es:(%di) # encoding: [0x6c]
-// CHECK: insb
-  insb
-  insb  %dx, %es:(%di)
-
-// CHECK: insw %dx, %es:(%di) # encoding: [0x6d]
-// CHECK: insw
-  insw
-  insw  %dx, %es:(%di)
-
-// CHECK: insl %dx, %es:(%di) # encoding: [0x66,0x6d]
-// CHECK: insl
-  insl
-  insl  %dx, %es:(%di)
-
-// CHECK: movsb (%si), %es:(%di) # encoding: [0xa4]
-// CHECK: movsb
-// CHECK: movsb
-  movsb
-  movsb  %ds:(%si), %es:(%di)
-  movsb  (%si), %es:(%di)
-
-// CHECK: movsw (%si), %es:(%di) # encoding: [0xa5]
-// CHECK: movsw
-// CHECK: movsw
-  movsw
-  movsw  %ds:(%si), %es:(%di)
-  movsw  (%si), %es:(%di)
-
-// CHECK: movsl (%si), %es:(%di) # encoding: [0x66,0xa5]
-// CHECK: movsl
-// CHECK: movsl
-  movsl
-  movsl  %ds:(%si), %es:(%di)
-  movsl  (%si), %es:(%di)
-
-// CHECK: lodsb (%si), %al # encoding: [0xac]
-// CHECK: lodsb
-// CHECK: lodsb
-// CHECK: lodsb
-// CHECK: lodsb
-  lodsb
-  lodsb  %ds:(%si), %al
-  lodsb  (%si), %al
-  lods  %ds:(%si), %al
-  lods  (%si), %al
-
-// CHECK: lodsw (%si), %ax # encoding: [0xad]
-// CHECK: lodsw
-// CHECK: lodsw
-// CHECK: lodsw
-// CHECK: lodsw
-  lodsw
-  lodsw  %ds:(%si), %ax
-  lodsw  (%si), %ax
-  lods  %ds:(%si), %ax
-  lods  (%si), %ax
-
-// CHECK: lodsl (%si), %eax # encoding: [0x66,0xad]
-// CHECK: lodsl
-// CHECK: lodsl
-// CHECK: lodsl
-// CHECK: lodsl
-  lodsl
-  lodsl  %ds:(%si), %eax
-  lodsl  (%si), %eax
-  lods  %ds:(%si), %eax
-  lods  (%si), %eax
-
-// CHECK: stosb %al, %es:(%di) # encoding: [0xaa]
-// CHECK: stosb
-// CHECK: stosb
-  stosb
-  stosb  %al, %es:(%di)
-  stos  %al, %es:(%di)
-
-// CHECK: stosw %ax, %es:(%di) # encoding: [0xab]
-// CHECK: stosw
-// CHECK: stosw
-  stosw
-  stosw  %ax, %es:(%di)
-  stos  %ax, %es:(%di)
-
-// CHECK: stosl %eax, %es:(%di) # encoding: [0x66,0xab]
-// CHECK: stosl
-// CHECK: stosl
-  stosl
-  stosl  %eax, %es:(%di)
-  stos  %eax, %es:(%di)
-
-// CHECK: strw
-// CHECK: encoding: [0x0f,0x00,0xc8]
-  str %ax
-
-// CHECK: strl
-// CHECK: encoding: [0x66,0x0f,0x00,0xc8]
-  str %eax
-
-
-// CHECK: fsubp
-// CHECK: encoding: [0xde,0xe1]
-fsubp %st,%st(1)
-
-// CHECK: fsubp %st(2)
-// CHECK: encoding: [0xde,0xe2]
-fsubp   %st, %st(2)
-
-// CHECK: xchgl %eax, %eax
-// CHECK: encoding: [0x66,0x90]
-xchgl %eax, %eax
-
-// CHECK: xchgw %ax, %ax
-// CHECK: encoding: [0x90]
-xchgw %ax, %ax
-
-// CHECK: xchgl %ecx, %eax
-// CHECK: encoding: [0x66,0x91]
-xchgl %ecx, %eax
-
-// CHECK: xchgl %ecx, %eax
-// CHECK: encoding: [0x66,0x91]
-xchgl %eax, %ecx
-
-// CHECK: retw
-// CHECK: encoding: [0xc3]
-retw
-
-// CHECK: retl
-// CHECK: encoding: [0x66,0xc3]
-retl
-
-// CHECK: lretw
-// CHECK: encoding: [0xcb]
-lretw
-
-// CHECK: lretl
-// CHECK: encoding: [0x66,0xcb]
-lretl
-
-// CHECK: data32
-// CHECK: encoding: [0x66]
-data32
-
-// CHECK: data32
-// CHECK: encoding: [0x66]
-// CHECK: lgdtw 4(%eax)
-// CHECK:  encoding: [0x67,0x0f,0x01,0x50,0x04]
-data32 lgdt 4(%eax)
+// RUN: llvm-mc -triple i386-unknown-unknown-code16 --show-encoding %s | FileCheck %s
+
+  movl $0x12345678, %ebx
+// CHECK: movl
+// CHECK: encoding: [0x66,0xbb,0x78,0x56,0x34,0x12]
+  pause
+// CHECK: pause
+// CHECK: encoding: [0xf3,0x90]
+  sfence
+// CHECK: sfence
+// CHECK: encoding: [0x0f,0xae,0xf8]
+  lfence
+// CHECK: lfence
+// CHECK: encoding: [0x0f,0xae,0xe8]
+  mfence
+  stgi
+// CHECK: stgi
+// CHECK: encoding: [0x0f,0x01,0xdc]
+  clgi
+// CHECK: clgi
+// CHECK: encoding: [0x0f,0x01,0xdd]
+
+  rdtscp
+// CHECK: rdtscp
+// CHECK:  encoding: [0x0f,0x01,0xf9]
+
+
+// CHECK: movl  %eax, 16(%ebp)          # encoding: [0x67,0x66,0x89,0x45,0x10]
+  movl  %eax, 16(%ebp)
+// CHECK: movl  %eax, -16(%ebp)          # encoding: [0x67,0x66,0x89,0x45,0xf0]
+  movl  %eax, -16(%ebp)
+
+// CHECK: testb %bl, %cl                # encoding: [0x84,0xd9]
+        testb %bl, %cl
+
+// CHECK: cmpl  %eax, %ebx              # encoding: [0x66,0x39,0xc3]
+        cmpl %eax, %ebx
+
+// CHECK: addw  %ax, %ax                # encoding: [0x01,0xc0]
+        addw %ax, %ax
+
+// CHECK: shrl  %eax                    # encoding: [0x66,0xd1,0xe8]
+        shrl $1, %eax
+
+// CHECK: shll  %eax                    # encoding: [0x66,0xd1,0xe0]
+        sall $1, %eax
+// CHECK: shll  %eax                    # encoding: [0x66,0xd1,0xe0]
+        sal $1, %eax
+
+// moffset forms of moves
+
+// CHECK: movb 0, %al  # encoding: [0xa0,0x00,0x00]
+movb  0, %al
+
+// CHECK: movw 0, %ax  # encoding: [0xa1,0x00,0x00]
+movw  0, %ax
+
+// CHECK: movl 0, %eax  # encoding: [0x66,0xa1,0x00,0x00]
+movl  0, %eax
+
+into
+// CHECK: into
+// CHECK:  encoding: [0xce]
+icebp
+// CHECK: icebp
+// CHECK:  encoding: [0xf1]
+int3
+// CHECK: int3
+// CHECK:  encoding: [0xcc]
+int $4
+// CHECK: int $4
+// CHECK:  encoding: [0xcd,0x04]
+int $255
+// CHECK: int $255
+// CHECK:  encoding: [0xcd,0xff]
+
+// CHECK: pushfw  # encoding: [0x9c]
+        pushf
+// CHECK: pushfl  # encoding: [0x66,0x9c]
+        pushfl
+// CHECK: popfw         # encoding: [0x9d]
+        popf
+// CHECK: popfl         # encoding: [0x66,0x9d]
+        popfl
+
+retl
+// CHECK: ret
+// CHECK:  encoding: [0x66,0xc3]
+
+// CHECK: cmoval  %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x47,0xd0]
+          cmoval  %eax,%edx
+
+// CHECK: cmovael %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x43,0xd0]
+          cmovael  %eax,%edx
+
+// CHECK: cmovbel %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x46,0xd0]
+          cmovbel  %eax,%edx
+
+// CHECK: cmovbl  %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x42,0xd0]
+          cmovbl  %eax,%edx
+
+// CHECK: cmovbw %bx, %bx
+cmovnae  %bx,%bx
+
+
+// CHECK: cmovbel %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x46,0xd0]
+          cmovbel  %eax,%edx
+
+// CHECK: cmovbl  %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x42,0xd0]
+          cmovcl  %eax,%edx
+
+// CHECK: cmovel  %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x44,0xd0]
+          cmovel  %eax,%edx
+
+// CHECK: cmovgl  %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x4f,0xd0]
+          cmovgl  %eax,%edx
+
+// CHECK: cmovgel %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x4d,0xd0]
+          cmovgel  %eax,%edx
+
+// CHECK: cmovll  %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x4c,0xd0]
+          cmovll  %eax,%edx
+
+// CHECK: cmovlel %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x4e,0xd0]
+          cmovlel  %eax,%edx
+
+// CHECK: cmovbel %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x46,0xd0]
+          cmovnal  %eax,%edx
+
+// CHECK: cmovnel %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x45,0xd0]
+          cmovnel  %eax,%edx
+
+// CHECK: cmovael %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x43,0xd0]
+          cmovnbl  %eax,%edx
+
+// CHECK: cmoval  %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x47,0xd0]
+          cmovnbel  %eax,%edx
+
+// CHECK: cmovael %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x43,0xd0]
+          cmovncl  %eax,%edx
+
+// CHECK: cmovnel %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x45,0xd0]
+          cmovnel  %eax,%edx
+
+// CHECK: cmovlel %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x4e,0xd0]
+          cmovngl  %eax,%edx
+
+// CHECK: cmovgel %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x4d,0xd0]
+          cmovnl  %eax,%edx
+
+// CHECK: cmovnel %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x45,0xd0]
+          cmovnel  %eax,%edx
+
+// CHECK: cmovlel %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x4e,0xd0]
+          cmovngl  %eax,%edx
+
+// CHECK: cmovll  %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x4c,0xd0]
+          cmovngel  %eax,%edx
+
+// CHECK: cmovgel %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x4d,0xd0]
+          cmovnll  %eax,%edx
+
+// CHECK: cmovgl  %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x4f,0xd0]
+          cmovnlel  %eax,%edx
+
+// CHECK: cmovnol %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x41,0xd0]
+          cmovnol  %eax,%edx
+
+// CHECK: cmovnpl %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x4b,0xd0]
+          cmovnpl  %eax,%edx
+
+// CHECK: cmovnsl %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x49,0xd0]
+          cmovnsl  %eax,%edx
+
+// CHECK: cmovnel %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x45,0xd0]
+          cmovnzl  %eax,%edx
+
+// CHECK: cmovol  %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x40,0xd0]
+          cmovol  %eax,%edx
+
+// CHECK: cmovpl  %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x4a,0xd0]
+          cmovpl  %eax,%edx
+
+// CHECK: cmovsl  %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x48,0xd0]
+          cmovsl  %eax,%edx
+
+// CHECK: cmovel  %eax, %edx
+// CHECK:  encoding: [0x66,0x0f,0x44,0xd0]
+          cmovzl  %eax,%edx
+
+// CHECK: fmul  %st(0)
+// CHECK:  encoding: [0xd8,0xc8]
+        fmul %st(0), %st
+
+// CHECK: fadd  %st(0)
+// CHECK:  encoding: [0xd8,0xc0]
+        fadd %st(0), %st
+
+// CHECK: fsub  %st(0)
+// CHECK:  encoding: [0xd8,0xe0]
+        fsub %st(0), %st
+
+// CHECK: fsubr %st(0)
+// CHECK:  encoding: [0xd8,0xe8]
+        fsubr %st(0), %st
+
+// CHECK: fdivr %st(0)
+// CHECK:  encoding: [0xd8,0xf8]
+        fdivr %st(0), %st
+
+// CHECK: fdiv  %st(0)
+// CHECK:  encoding: [0xd8,0xf0]
+        fdiv %st(0), %st
+
+// CHECK: movl  %cs, %eax
+// CHECK:  encoding: [0x66,0x8c,0xc8]
+        movl %cs, %eax
+
+// CHECK: movw  %cs, %ax
+// CHECK:  encoding: [0x8c,0xc8]
+        movw %cs, %ax
+
+// CHECK: movl  %cs, (%eax)
+// CHECK:  encoding: [0x67,0x66,0x8c,0x08]
+        movl %cs, (%eax)
+
+// CHECK: movw  %cs, (%eax)
+// CHECK:  encoding: [0x67,0x8c,0x08]
+        movw %cs, (%eax)
+
+// CHECK: movw  %ax, %cs
+// CHECK:  encoding: [0x8e,0xc8]
+        movl %eax, %cs
+
+// CHECK: movw  %ax, %cs
+// CHECK:  encoding: [0x8e,0xc8]
+        mov %eax, %cs  
+
+// CHECK: movw  %ax, %cs
+// CHECK:  encoding: [0x8e,0xc8]
+        movw %ax, %cs
+
+// CHECK: movw  %ax, %cs
+// CHECK:  encoding: [0x8e,0xc8]
+        mov %ax, %cs    
+  
+// CHECK: movl  (%eax), %cs
+// CHECK:  encoding: [0x67,0x66,0x8e,0x08]
+        movl (%eax), %cs
+
+// CHECK: movw  (%eax), %cs
+// CHECK:  encoding: [0x67,0x8e,0x08]
+        movw (%eax), %cs
+
+// CHECK: movl  %cr0, %eax
+// CHECK:  encoding: [0x0f,0x20,0xc0]
+        movl %cr0,%eax
+
+// CHECK: movl  %cr1, %eax
+// CHECK:  encoding: [0x0f,0x20,0xc8]
+        movl %cr1,%eax
+
+// CHECK: movl  %cr2, %eax
+// CHECK:  encoding: [0x0f,0x20,0xd0]
+        movl %cr2,%eax
+
+// CHECK: movl  %cr3, %eax
+// CHECK:  encoding: [0x0f,0x20,0xd8]
+        movl %cr3,%eax
+
+// CHECK: movl  %cr4, %eax
+// CHECK:  encoding: [0x0f,0x20,0xe0]
+        movl %cr4,%eax
+
+// CHECK: movl  %dr0, %eax
+// CHECK:  encoding: [0x0f,0x21,0xc0]
+        movl %dr0,%eax
+
+// CHECK: movl  %dr1, %eax
+// CHECK:  encoding: [0x0f,0x21,0xc8]
+        movl %dr1,%eax
+
+// CHECK: movl  %dr1, %eax
+// CHECK:  encoding: [0x0f,0x21,0xc8]
+        movl %dr1,%eax
+
+// CHECK: movl  %dr2, %eax
+// CHECK:  encoding: [0x0f,0x21,0xd0]
+        movl %dr2,%eax
+
+// CHECK: movl  %dr3, %eax
+// CHECK:  encoding: [0x0f,0x21,0xd8]
+        movl %dr3,%eax
+
+// CHECK: movl  %dr4, %eax
+// CHECK:  encoding: [0x0f,0x21,0xe0]
+        movl %dr4,%eax
+
+// CHECK: movl  %dr5, %eax
+// CHECK:  encoding: [0x0f,0x21,0xe8]
+        movl %dr5,%eax
+
+// CHECK: movl  %dr6, %eax
+// CHECK:  encoding: [0x0f,0x21,0xf0]
+        movl %dr6,%eax
+
+// CHECK: movl  %dr7, %eax
+// CHECK:  encoding: [0x0f,0x21,0xf8]
+        movl %dr7,%eax
+
+// CHECK: wait
+// CHECK:  encoding: [0x9b]
+  fwait
+
+// CHECK: [0x66,0x65,0xa1,0x7c,0x00]
+        movl  %gs:124, %eax
+
+// CHECK: pusha
+// CHECK:  encoding: [0x60]
+          pusha
+
+// CHECK: popa
+// CHECK:  encoding: [0x61]
+          popa
+
+// CHECK: pushaw
+// CHECK:  encoding: [0x60]
+          pushaw
+
+// CHECK: popaw
+// CHECK:  encoding: [0x61]
+          popaw
+
+// CHECK: pushal
+// CHECK:  encoding: [0x66,0x60]
+          pushal
+
+// CHECK: popal
+// CHECK:  encoding: [0x66,0x61]
+          popal
+
+// CHECK: jmpw *8(%eax)
+// CHECK:   encoding: [0x67,0xff,0x60,0x08]
+  jmp  *8(%eax)
+
+// CHECK: jmpl *8(%eax)
+// CHECK:   encoding: [0x67,0x66,0xff,0x60,0x08]
+        jmpl  *8(%eax)
+
+// CHECK: lcalll $2, $4660
+// CHECK:   encoding: [0x66,0x9a,0x34,0x12,0x00,0x00,0x02,0x00]
+lcalll $0x2, $0x1234
+
+
+L1:
+  jcxz L1
+// CHECK: jcxz L1
+// CHECK:   encoding: [0xe3,A]
+  jecxz L1
+// CHECK: jecxz L1
+// CHECK:   encoding: [0x67,0xe3,A]
+
+iret
+// CHECK: iretw
+// CHECK: encoding: [0xcf]
+iretw
+// CHECK: iretw
+// CHECK: encoding: [0xcf]
+iretl
+// CHECK: iretl
+// CHECK: encoding: [0x66,0xcf]
+
+sysret
+// CHECK: sysretl
+// CHECK: encoding: [0x0f,0x07]
+sysretl
+// CHECK: sysretl
+// CHECK: encoding: [0x0f,0x07]
+
+testl  %ecx, -24(%ebp)
+// CHECK: testl -24(%ebp), %ecx
+testl  -24(%ebp), %ecx
+// CHECK: testl -24(%ebp), %ecx
+
+
+push %cs
+// CHECK: pushw %cs
+// CHECK: encoding: [0x0e]
+push %ds
+// CHECK: pushw %ds
+// CHECK: encoding: [0x1e]
+push %ss
+// CHECK: pushw %ss
+// CHECK: encoding: [0x16]
+push %es
+// CHECK: pushw %es
+// CHECK: encoding: [0x06]
+push %fs
+// CHECK: pushw %fs
+// CHECK: encoding: [0x0f,0xa0]
+push %gs
+// CHECK: pushw %gs
+// CHECK: encoding: [0x0f,0xa8]
+
+pushw %cs
+// CHECK: pushw %cs
+// CHECK: encoding: [0x0e]
+pushw %ds
+// CHECK: pushw %ds
+// CHECK: encoding: [0x1e]
+pushw %ss
+// CHECK: pushw %ss
+// CHECK: encoding: [0x16]
+pushw %es
+// CHECK: pushw %es
+// CHECK: encoding: [0x06]
+pushw %fs
+// CHECK: pushw %fs
+// CHECK: encoding: [0x0f,0xa0]
+pushw %gs
+// CHECK: pushw %gs
+// CHECK: encoding: [0x0f,0xa8]
+
+pushl %cs
+// CHECK: pushl %cs
+// CHECK: encoding: [0x66,0x0e]
+pushl %ds
+// CHECK: pushl %ds
+// CHECK: encoding: [0x66,0x1e]
+pushl %ss
+// CHECK: pushl %ss
+// CHECK: encoding: [0x66,0x16]
+pushl %es
+// CHECK: pushl %es
+// CHECK: encoding: [0x66,0x06]
+pushl %fs
+// CHECK: pushl %fs
+// CHECK: encoding: [0x66,0x0f,0xa0]
+pushl %gs
+// CHECK: pushl %gs
+// CHECK: encoding: [0x66,0x0f,0xa8]
+
+pop %ss
+// CHECK: popw  %ss
+// CHECK: encoding: [0x17]
+pop %ds
+// CHECK: popw  %ds
+// CHECK: encoding: [0x1f]
+pop %es
+// CHECK: popw  %es
+// CHECK: encoding: [0x07]
+
+popl %ss
+// CHECK: popl  %ss
+// CHECK: encoding: [0x66,0x17]
+popl %ds
+// CHECK: popl  %ds
+// CHECK: encoding: [0x66,0x1f]
+popl %es
+// CHECK: popl  %es
+// CHECK: encoding: [0x66,0x07]
+
+pushfd
+// CHECK: pushfl
+popfd
+// CHECK: popfl
+pushfl
+// CHECK: pushfl
+popfl
+// CHECK: popfl
+
+
+  setc  %bl
+  setnae  %bl
+  setnb %bl
+  setnc %bl
+  setna %bl
+  setnbe  %bl
+  setpe %bl
+  setpo %bl
+  setnge  %bl
+  setnl %bl
+  setng %bl
+  setnle  %bl
+
+        setneb  %cl // CHECK: setne %cl
+  setcb  %bl // CHECK: setb %bl
+  setnaeb  %bl // CHECK: setb %bl
+
+
+// CHECK: lcalll  $31438, $31438
+// CHECK: lcalll  $31438, $31438
+// CHECK: ljmpl $31438, $31438
+// CHECK: ljmpl $31438, $31438
+
+calll $0x7ace,$0x7ace
+lcalll  $0x7ace,$0x7ace
+jmpl  $0x7ace,$0x7ace
+ljmpl  $0x7ace,$0x7ace
+
+// CHECK: lcallw  $31438, $31438
+// CHECK: lcallw  $31438, $31438
+// CHECK: ljmpw $31438, $31438
+// CHECK: ljmpw $31438, $31438
+
+callw $0x7ace,$0x7ace
+lcallw  $0x7ace,$0x7ace
+jmpw  $0x7ace,$0x7ace
+ljmpw  $0x7ace,$0x7ace
+
+// CHECK: lcallw  $31438, $31438
+// CHECK: lcallw  $31438, $31438
+// CHECK: ljmpw $31438, $31438
+// CHECK: ljmpw $31438, $31438
+
+call  $0x7ace,$0x7ace
+lcall  $0x7ace,$0x7ace
+jmp  $0x7ace,$0x7ace
+ljmp  $0x7ace,$0x7ace
+
+// CHECK: calll a
+ calll a
+
+// CHECK: incb  %al # encoding: [0xfe,0xc0]
+  incb %al
+
+// CHECK: incw  %ax # encoding: [0x40]
+  incw %ax
+
+// CHECK: incl  %eax # encoding: [0x66,0x40]
+  incl %eax
+
+// CHECK: decb  %al # encoding: [0xfe,0xc8]
+  decb %al
+
+// CHECK: decw  %ax # encoding: [0x48]
+  decw %ax
+
+// CHECK: decl  %eax # encoding: [0x66,0x48]
+  decl %eax
+
+// CHECK: pshufw $14, %mm4, %mm0 # encoding: [0x0f,0x70,0xc4,0x0e]
+pshufw $14, %mm4, %mm0
+
+// CHECK: pshufw $90, %mm4, %mm0 # encoding: [0x0f,0x70,0xc4,0x5a]
+pshufw $90, %mm4, %mm0
+
+// CHECK: aaa
+// CHECK:  encoding: [0x37]
+          aaa
+
+// CHECK: aad $1
+// CHECK:  encoding: [0xd5,0x01]
+          aad $1
+
+// CHECK: aad
+// CHECK:  encoding: [0xd5,0x0a]
+          aad $0xA
+
+// CHECK: aad
+// CHECK:  encoding: [0xd5,0x0a]
+          aad
+
+// CHECK: aam $2
+// CHECK:  encoding: [0xd4,0x02]
+          aam $2
+
+// CHECK: aam
+// CHECK:  encoding: [0xd4,0x0a]
+          aam $0xA
+
+// CHECK: aam
+// CHECK:  encoding: [0xd4,0x0a]
+          aam
+
+// CHECK: aas
+// CHECK:  encoding: [0x3f]
+          aas
+
+// CHECK: daa
+// CHECK:  encoding: [0x27]
+          daa
+
+// CHECK: das
+// CHECK:  encoding: [0x2f]
+          das
+
+// CHECK: retw  $31438
+// CHECK:  encoding: [0xc2,0xce,0x7a]
+          retw  $0x7ace
+
+// CHECK: lretw $31438
+// CHECK:  encoding: [0xca,0xce,0x7a]
+          lretw $0x7ace
+
+// CHECK: retw  $31438
+// CHECK:  encoding: [0xc2,0xce,0x7a]
+          ret $0x7ace
+
+// CHECK: lretw $31438
+// CHECK:  encoding: [0xca,0xce,0x7a]
+          lret  $0x7ace
+
+// CHECK: retl  $31438
+// CHECK:  encoding: [0x66,0xc2,0xce,0x7a]
+          retl  $0x7ace
+
+// CHECK: lretl $31438
+// CHECK:  encoding: [0x66,0xca,0xce,0x7a]
+          lretl $0x7ace
+
+// CHECK: bound 2(%eax), %bx
+// CHECK:  encoding: [0x67,0x62,0x58,0x02]
+          bound  2(%eax),%bx
+
+// CHECK: bound 4(%ebx), %ecx
+// CHECK:  encoding: [0x67,0x66,0x62,0x4b,0x04]
+          bound  4(%ebx),%ecx
+
+// CHECK: arpl  %bx, %bx
+// CHECK:  encoding: [0x63,0xdb]
+          arpl  %bx,%bx
+
+// CHECK: arpl  %bx, 6(%ecx)
+// CHECK:  encoding: [0x67,0x63,0x59,0x06]
+          arpl  %bx,6(%ecx)
+
+// CHECK: lgdtw 4(%eax)
+// CHECK:  encoding: [0x67,0x0f,0x01,0x50,0x04]
+          lgdtw  4(%eax)
+
+// CHECK: lgdtw 4(%eax)
+// CHECK:  encoding: [0x67,0x0f,0x01,0x50,0x04]
+          lgdt  4(%eax)
+
+// CHECK: lgdtl 4(%eax)
+// CHECK:  encoding: [0x67,0x66,0x0f,0x01,0x50,0x04]
+          lgdtl  4(%eax)
+
+// CHECK: lidtw 4(%eax)
+// CHECK:  encoding: [0x67,0x0f,0x01,0x58,0x04]
+          lidtw  4(%eax)
+
+// CHECK: lidtw 4(%eax)
+// CHECK:  encoding: [0x67,0x0f,0x01,0x58,0x04]
+          lidt  4(%eax)
+
+// CHECK: lidtl 4(%eax)
+// CHECK:  encoding: [0x67,0x66,0x0f,0x01,0x58,0x04]
+          lidtl  4(%eax)
+
+// CHECK: sgdtw 4(%eax)
+// CHECK:  encoding: [0x67,0x0f,0x01,0x40,0x04]
+          sgdtw  4(%eax)
+
+// CHECK: sgdtw 4(%eax)
+// CHECK:  encoding: [0x67,0x0f,0x01,0x40,0x04]
+          sgdt  4(%eax)
+
+// CHECK: sgdtl 4(%eax)
+// CHECK:  encoding: [0x67,0x66,0x0f,0x01,0x40,0x04]
+          sgdtl  4(%eax)
+
+// CHECK: sidtw 4(%eax)
+// CHECK:  encoding: [0x67,0x0f,0x01,0x48,0x04]
+          sidtw  4(%eax)
+
+// CHECK: sidtw 4(%eax)
+// CHECK:  encoding: [0x67,0x0f,0x01,0x48,0x04]
+          sidt  4(%eax)
+
+// CHECK: sidtl 4(%eax)
+// CHECK:  encoding: [0x67,0x66,0x0f,0x01,0x48,0x04]
+          sidtl  4(%eax)
+
+// CHECK: fcompi  %st(2)
+// CHECK:  encoding: [0xdf,0xf2]
+          fcompi  %st(2), %st
+
+// CHECK: fcompi  %st(2)
+// CHECK:  encoding: [0xdf,0xf2]
+          fcompi  %st(2)
+
+// CHECK: fcompi
+// CHECK:  encoding: [0xdf,0xf1]
+          fcompi
+
+// CHECK: fucompi %st(2)
+// CHECK:  encoding: [0xdf,0xea]
+          fucompi  %st(2),%st
+
+// CHECK: fucompi %st(2)
+// CHECK:  encoding: [0xdf,0xea]
+          fucompi  %st(2)
+
+// CHECK: fucompi
+// CHECK:  encoding: [0xdf,0xe9]
+          fucompi
+
+// CHECK: fldcw 32493
+// CHECK:  encoding: [0xd9,0x2e,0xed,0x7e]
+          fldcww  0x7eed
+
+// CHECK: fldcw 32493
+// CHECK:  encoding: [0xd9,0x2e,0xed,0x7e]
+          fldcw 0x7eed
+
+// CHECK: fnstcw  32493
+// CHECK:  encoding: [0xd9,0x3e,0xed,0x7e]
+          fnstcww 0x7eed
+
+// CHECK: fnstcw  32493
+// CHECK:  encoding: [0xd9,0x3e,0xed,0x7e]
+          fnstcw  0x7eed
+
+// CHECK: wait
+// CHECK:  encoding: [0x9b]
+          fstcww  0x7eed
+
+// CHECK: wait
+// CHECK:  encoding: [0x9b]
+          fstcw 0x7eed
+
+// CHECK: fnstsw  32493
+// CHECK:  encoding: [0xdd,0x3e,0xed,0x7e]
+          fnstsww 0x7eed
+
+// CHECK: fnstsw  32493
+// CHECK:  encoding: [0xdd,0x3e,0xed,0x7e]
+          fnstsw  0x7eed
+
+// CHECK: wait
+// CHECK:  encoding: [0x9b]
+          fstsww  0x7eed
+
+// CHECK: wait
+// CHECK:  encoding: [0x9b]
+          fstsw 0x7eed
+
+// CHECK: verr  32493
+// CHECK:  encoding: [0x0f,0x00,0x26,0xed,0x7e]
+          verrw 0x7eed
+
+// CHECK: verr  32493
+// CHECK:  encoding: [0x0f,0x00,0x26,0xed,0x7e]
+          verr  0x7eed
+
+// CHECK: wait
+// CHECK:  encoding: [0x9b]
+          fclex
+
+// CHECK: fnclex
+// CHECK:  encoding: [0xdb,0xe2]
+          fnclex
+
+// CHECK: ud2
+// CHECK:  encoding: [0x0f,0x0b]
+          ud2
+
+// CHECK: ud2
+// CHECK:  encoding: [0x0f,0x0b]
+          ud2a
+
+// CHECK: ud2b
+// CHECK:  encoding: [0x0f,0xb9]
+          ud2b
+
+// CHECK: loope 0
+// CHECK: encoding: [0xe1,A]
+  loopz 0
+
+// CHECK: loopne 0
+// CHECK: encoding: [0xe0,A]
+  loopnz 0
+
+// CHECK: outsb (%si), %dx # encoding: [0x6e]
+// CHECK: outsb
+// CHECK: outsb
+  outsb
+  outsb  %ds:(%si), %dx
+  outsb  (%si), %dx
+
+// CHECK: outsw (%si), %dx # encoding: [0x6f]
+// CHECK: outsw
+// CHECK: outsw
+  outsw
+  outsw  %ds:(%si), %dx
+  outsw  (%si), %dx
+
+// CHECK: outsl (%si), %dx # encoding: [0x66,0x6f]
+// CHECK: outsl
+  outsl
+  outsl  %ds:(%si), %dx
+  outsl  (%si), %dx
+
+// CHECK: insb %dx, %es:(%di) # encoding: [0x6c]
+// CHECK: insb
+  insb
+  insb  %dx, %es:(%di)
+
+// CHECK: insw %dx, %es:(%di) # encoding: [0x6d]
+// CHECK: insw
+  insw
+  insw  %dx, %es:(%di)
+
+// CHECK: insl %dx, %es:(%di) # encoding: [0x66,0x6d]
+// CHECK: insl
+  insl
+  insl  %dx, %es:(%di)
+
+// CHECK: movsb (%si), %es:(%di) # encoding: [0xa4]
+// CHECK: movsb
+// CHECK: movsb
+  movsb
+  movsb  %ds:(%si), %es:(%di)
+  movsb  (%si), %es:(%di)
+
+// CHECK: movsw (%si), %es:(%di) # encoding: [0xa5]
+// CHECK: movsw
+// CHECK: movsw
+  movsw
+  movsw  %ds:(%si), %es:(%di)
+  movsw  (%si), %es:(%di)
+
+// CHECK: movsl (%si), %es:(%di) # encoding: [0x66,0xa5]
+// CHECK: movsl
+// CHECK: movsl
+  movsl
+  movsl  %ds:(%si), %es:(%di)
+  movsl  (%si), %es:(%di)
+
+// CHECK: lodsb (%si), %al # encoding: [0xac]
+// CHECK: lodsb
+// CHECK: lodsb
+// CHECK: lodsb
+// CHECK: lodsb
+  lodsb
+  lodsb  %ds:(%si), %al
+  lodsb  (%si), %al
+  lods  %ds:(%si), %al
+  lods  (%si), %al
+
+// CHECK: lodsw (%si), %ax # encoding: [0xad]
+// CHECK: lodsw
+// CHECK: lodsw
+// CHECK: lodsw
+// CHECK: lodsw
+  lodsw
+  lodsw  %ds:(%si), %ax
+  lodsw  (%si), %ax
+  lods  %ds:(%si), %ax
+  lods  (%si), %ax
+
+// CHECK: lodsl (%si), %eax # encoding: [0x66,0xad]
+// CHECK: lodsl
+// CHECK: lodsl
+// CHECK: lodsl
+// CHECK: lodsl
+  lodsl
+  lodsl  %ds:(%si), %eax
+  lodsl  (%si), %eax
+  lods  %ds:(%si), %eax
+  lods  (%si), %eax
+
+// CHECK: stosb %al, %es:(%di) # encoding: [0xaa]
+// CHECK: stosb
+// CHECK: stosb
+  stosb
+  stosb  %al, %es:(%di)
+  stos  %al, %es:(%di)
+
+// CHECK: stosw %ax, %es:(%di) # encoding: [0xab]
+// CHECK: stosw
+// CHECK: stosw
+  stosw
+  stosw  %ax, %es:(%di)
+  stos  %ax, %es:(%di)
+
+// CHECK: stosl %eax, %es:(%di) # encoding: [0x66,0xab]
+// CHECK: stosl
+// CHECK: stosl
+  stosl
+  stosl  %eax, %es:(%di)
+  stos  %eax, %es:(%di)
+
+// CHECK: strw
+// CHECK: encoding: [0x0f,0x00,0xc8]
+  str %ax
+
+// CHECK: strl
+// CHECK: encoding: [0x66,0x0f,0x00,0xc8]
+  str %eax
+
+
+// CHECK: fsubp
+// CHECK: encoding: [0xde,0xe1]
+fsubp %st,%st(1)
+
+// CHECK: fsubp %st(2)
+// CHECK: encoding: [0xde,0xe2]
+fsubp   %st, %st(2)
+
+// CHECK: xchgl %eax, %eax
+// CHECK: encoding: [0x66,0x90]
+xchgl %eax, %eax
+
+// CHECK: xchgw %ax, %ax
+// CHECK: encoding: [0x90]
+xchgw %ax, %ax
+
+// CHECK: xchgl %ecx, %eax
+// CHECK: encoding: [0x66,0x91]
+xchgl %ecx, %eax
+
+// CHECK: xchgl %ecx, %eax
+// CHECK: encoding: [0x66,0x91]
+xchgl %eax, %ecx
+
+// CHECK: retw
+// CHECK: encoding: [0xc3]
+retw
+
+// CHECK: retl
+// CHECK: encoding: [0x66,0xc3]
+retl
+
+// CHECK: lretw
+// CHECK: encoding: [0xcb]
+lretw
+
+// CHECK: lretl
+// CHECK: encoding: [0x66,0xcb]
+lretl
+
+// CHECK: data32
+// CHECK: encoding: [0x66]
+data32
+
+// CHECK: data32
+// CHECK: encoding: [0x66]
+// CHECK: lgdtw 4(%eax)
+// CHECK:  encoding: [0x67,0x0f,0x01,0x50,0x04]
+data32 lgdt 4(%eax)

test/MC/X86/x86-32.s

 int $255
 // CHECK: int $255
 // CHECK:  encoding: [0xcd,0xff]
+int $1
+// CHECK: int $1
+// CHECK:  encoding: [0xcd,0x01]
+icebp
+// CHECK: icebp
+// CHECK:  encoding: [0xf1]
 
 // CHECK: pushfl  # encoding: [0x9c]
         pushf

test/MC/X86/x86-64.s

-// RUN: llvm-mc -triple x86_64-unknown-unknown -show-encoding %s > %t 2> %t.err
-// RUN: FileCheck < %t %s
-// RUN: FileCheck --check-prefix=CHECK-STDERR < %t.err %s
-
-  monitor
-// CHECK: monitor
-// CHECK: encoding: [0x0f,0x01,0xc8]
-  monitor %rax, %rcx, %rdx
-// CHECK: monitor
-// CHECK: encoding: [0x0f,0x01,0xc8]
-  mwait
-// CHECK: mwait
-// CHECK: encoding: [0x0f,0x01,0xc9]
-  mwait %rax, %rcx
-// CHECK: mwait
-// CHECK: encoding: [0x0f,0x01,0xc9]
-
-// Suffix inference:
-
-// CHECK: addl $0, %eax
-        add $0, %eax
-// CHECK: addb $255, %al
-        add $0xFF, %al
-// CHECK: orq %rax, %rdx
-        or %rax, %rdx
-// CHECK: shlq $3, %rax
-        shl $3, %rax
-
-
-// CHECK: subb %al, %al
-        subb %al, %al
-
-// CHECK: addl $24, %eax
-        addl $24, %eax
-
-// CHECK: movl %eax, 10(%ebp)
-        movl %eax, 10(%ebp)
-// CHECK: movl %eax, 10(%ebp,%ebx)
-        movl %eax, 10(%ebp, %ebx)
-// CHECK: movl %eax, 10(%ebp,%ebx,4)
-        movl %eax, 10(%ebp, %ebx, 4)
-// CHECK: movl %eax, 10(,%ebx,4)
-        movl %eax, 10(, %ebx, 4)
-
-// CHECK: movl 0, %eax        
-        movl 0, %eax
-// CHECK: movl $0, %eax        
-        movl $0, %eax
-        
-// CHECK: ret
-        ret
-        
-// CHECK: retw
-        retw
-        
-// FIXME: Check that this matches SUB32ri8
-// CHECK: subl $1, %eax
-        subl $1, %eax
-        
-// FIXME: Check that this matches SUB32ri8
-// CHECK: subl $-1, %eax
-        subl $-1, %eax
-        
-// FIXME: Check that this matches SUB32ri
-// CHECK: subl $256, %eax
-        subl $256, %eax
-
-// FIXME: Check that this matches XOR64ri8
-// CHECK: xorq $1, %rax
-        xorq $1, %rax
-        
-// FIXME: Check that this matches XOR64ri32
-// CHECK: xorq $256, %rax
-        xorq $256, %rax
-
-// FIXME: Check that this matches SUB8rr
-// CHECK: subb %al, %bl
-        subb %al, %bl
-
-// FIXME: Check that this matches SUB16rr
-// CHECK: subw %ax, %bx
-        subw %ax, %bx
-        
-// FIXME: Check that this matches SUB32rr
-// CHECK: subl %eax, %ebx
-        subl %eax, %ebx
-        
-// FIXME: Check that this matches the correct instruction.
-// CHECK: callq *%rax
-        call *%rax
-
-// FIXME: Check that this matches the correct instruction.
-// CHECK: shldl %cl, %eax, %ebx
-        shldl %cl, %eax, %ebx
-
-// CHECK: shll $2, %eax
-        shll $2, %eax
-
-// CHECK: shll $2, %eax
-        sall $2, %eax
-
-// CHECK: rep
-// CHECK: insb
-        rep;insb
-
-// CHECK: rep
-// CHECK: outsb
-        rep;outsb
-
-// CHECK: rep
-// CHECK: movsb
-        rep;movsb
-
-
-// rdar://8470918
-smovb // CHECK: movsb
-smovw // CHECK: movsw
-smovl // CHECK: movsl
-smovq // CHECK: movsq
-
-// rdar://8456361
-// CHECK: rep
-// CHECK: movsl
-        rep movsd
-
-// CHECK: rep
-// CHECK: lodsb
-        rep;lodsb
-
-// CHECK: rep
-// CHECK: stosb
-        rep;stosb
-
-// NOTE: repz and repe have the same opcode as rep
-// CHECK: rep
-// CHECK: cmpsb
-        repz;cmpsb
-
-// NOTE: repnz has the same opcode as repne
-// CHECK: repne
-// CHECK: cmpsb
-        repnz;cmpsb
-
-// NOTE: repe and repz have the same opcode as rep
-// CHECK: rep
-// CHECK: scasb
-        repe;scasb
-
-// CHECK: repne
-// CHECK: scasb
-        repne;scasb
-
-// CHECK: lock
-// CHECK: cmpxchgb %al, (%ebx)
-        lock;cmpxchgb %al, 0(%ebx)
-
-// CHECK: cs
-// CHECK: movb (%eax), %al
-        cs;movb 0(%eax), %al
-
-// CHECK: ss
-// CHECK: movb (%eax), %al
-        ss;movb 0(%eax), %al
-
-// CHECK: ds
-// CHECK: movb (%eax), %al
-        ds;movb 0(%eax), %al
-
-// CHECK: es
-// CHECK: movb (%eax), %al
-        es;movb 0(%eax), %al
-
-// CHECK: fs
-// CHECK: movb (%eax), %al
-        fs;movb 0(%eax), %al
-
-// CHECK: gs
-// CHECK: movb (%eax), %al
-        gs;movb 0(%eax), %al
-
-// CHECK: fadd %st(0)
-// CHECK: fadd %st(1)
-// CHECK: fadd %st(7)
-
-fadd %st(0)
-fadd %st(1)
-fadd %st(7)
-
-// CHECK: leal 0, %eax
-        leal 0, %eax
-
-// rdar://7986634 - Insensitivity on opcodes.
-// CHECK: int3
-INT3
-
-// rdar://8735979 - int $3 -> int3
-// CHECK: int3
-int $3
-
-
-// Allow scale factor without index register.
-// CHECK: movaps  %xmm3, (%esi)
-// CHECK-STDERR: warning: scale factor without index register is ignored
-movaps %xmm3, (%esi, 2)
-
-// CHECK: imull $12, %eax
-imul $12, %eax
-
-// CHECK: imull %ecx, %eax
-imull %ecx, %eax
-
-
-// rdar://8208481
-// CHECK: outb  %al, $161
-outb  %al, $161
-// CHECK: outw  %ax, $128
-outw  %ax, $128
-// CHECK: inb $161, %al
-inb  $161, %al
-
-// rdar://8017621
-// CHECK: pushq $1
-push $1
-
-// rdar://9716860
-pushq $1
-// CHECK: encoding: [0x6a,0x01]
-pushq $1111111
-// CHECK: encoding: [0x68,0x47,0xf4,0x10,0x00]
-
-// rdar://8017530
-// CHECK: sldtw 4
-sldt  4
-
-// rdar://8208499
-// CHECK: cmovnew %bx, %ax
-cmovnz %bx, %ax
-// CHECK: cmovneq %rbx, %rax
-cmovnzq %rbx, %rax
-
-
-// rdar://8407928
-// CHECK: inb $127, %al
-// CHECK: inw %dx, %ax
-// CHECK: outb  %al, $127
-// CHECK: outw  %ax, %dx
-// CHECK: inl %dx, %eax
-inb $0x7f
-inw %dx
-outb  $0x7f
-outw  %dx
-inl %dx
-
-
-// PR8114
-// CHECK: outb  %al, %dx
-// CHECK: outb  %al, %dx
-// CHECK: outw  %ax, %dx
-// CHECK: outw  %ax, %dx
-// CHECK: outl  %eax, %dx
-// CHECK: outl  %eax, %dx
-
-out  %al, (%dx)
-outb  %al, (%dx)
-out  %ax, (%dx)
-outw  %ax, (%dx)
-out  %eax, (%dx)
-outl  %eax, (%dx)
-
-// CHECK: inb %dx, %al
-// CHECK: inb %dx, %al
-// CHECK: inw %dx, %ax
-// CHECK: inw %dx, %ax
-// CHECK: inl %dx, %eax
-// CHECK: inl %dx, %eax
-
-in  (%dx), %al
-inb  (%dx), %al
-in  (%dx), %ax
-inw  (%dx), %ax
-in  (%dx), %eax
-inl  (%dx), %eax
-
-//PR15455
-
-// permitted invalid memory forms 
-outs  (%rsi), (%dx) 
-// CHECK: outsw (%rsi), %dx
-outsb  (%rsi), (%dx)
-// CHECK: outsb (%rsi), %dx
-outsw  (%rsi), (%dx)
-// CHECK: outsw (%rsi), %dx
-outsl  (%rsi), (%dx)
-// CHECK: outsl (%rsi), %dx
-
-ins  (%dx), %es:(%rdi)
-// CHECK: insw  %dx, %es:(%rdi)
-insb  (%dx), %es:(%rdi)
-// CHECK: insb  %dx, %es:(%rdi)
-insw  (%dx), %es:(%rdi)
-// CHECK: insw  %dx, %es:(%rdi)
-insl  (%dx), %es:(%rdi)
-// CHECK: insl  %dx, %es:(%rdi) 
-
-// rdar://8431422
-
-// CHECK: fxch %st(1)
-// CHECK: fucom %st(1)
-// CHECK: fucomp %st(1)
-// CHECK: faddp %st(1)
-// CHECK: faddp %st(0)
-// CHECK: fsubp %st(1)
-// CHECK: fsubrp %st(1)
-// CHECK: fmulp %st(1)
-// CHECK: fdivp %st(1)
-// CHECK: fdivrp %st(1)
-
-fxch
-fucom
-fucomp
-faddp
-faddp %st
-fsubp
-fsubrp
-fmulp
-fdivp
-fdivrp
-
-// CHECK: fcomi %st(1)
-// CHECK: fcomi %st(2)
-// CHECK: fucomi %st(1)
-// CHECK: fucomi %st(2)
-// CHECK: fucomi %st(2)
-
-fcomi
-fcomi  %st(2)
-fucomi
-fucomi  %st(2)
-fucomi  %st(2), %st
-
-// CHECK: fnstsw %ax
-// CHECK: fnstsw %ax
-// CHECK: fnstsw %ax
-// CHECK: fnstsw %ax
-
-fnstsw
-fnstsw %ax
-fnstsw %eax
-fnstsw %al
-
-// rdar://8431880
-// CHECK: rclb  %bl
-// CHECK: rcll  3735928559(%ebx,%ecx,8)
-// CHECK: rcrl  %ecx
-// CHECK: rcrl  305419896
-rcl %bl
-rcll  0xdeadbeef(%ebx,%ecx,8)
-rcr %ecx
-rcrl  0x12345678
-
-rclb  %bl       // CHECK: rclb %bl     # encoding: [0xd0,0xd3]
-rclb  $1, %bl   // CHECK: rclb %bl     # encoding: [0xd0,0xd3]
-rclb  $2, %bl   // CHECK: rclb $2, %bl # encoding: [0xc0,0xd3,0x02]
-
-// rdar://8418316
-// PR12173
-// CHECK: shldw %cl, %bx, %dx
-// CHECK: shldw %cl, %bx, %dx
-// CHECK: shldw $1, %bx, %dx
-// CHECK: shldw %cl, %bx, (%rax)
-// CHECK: shldw %cl, %bx, (%rax)
-// CHECK: shrdw %cl, %bx, %dx
-// CHECK: shrdw %cl, %bx, %dx
-// CHECK: shrdw $1, %bx, %dx
-// CHECK: shrdw %cl, %bx, (%rax)
-// CHECK: shrdw %cl, %bx, (%rax)
-
-shld  %bx, %dx
-shld  %cl, %bx, %dx
-shld  $1, %bx, %dx
-shld  %bx, (%rax)
-shld  %cl, %bx, (%rax)
-shrd  %bx, %dx
-shrd  %cl, %bx, %dx
-shrd  $1, %bx, %dx
-shrd  %bx, (%rax)
-shrd  %cl, %bx, (%rax)
-
-// CHECK: sldtl %ecx
-// CHECK: encoding: [0x0f,0x00,0xc1]
-// CHECK: sldtw %cx
-// CHECK: encoding: [0x66,0x0f,0x00,0xc1]
-
-sldt  %ecx
-sldt  %cx
-
-// CHECK: lcalll  *3135175374 
-// CHECK: ljmpl *3135175374
-lcall  *0xbadeface
-ljmp  *0xbadeface
-
-
-// rdar://8444631
-// CHECK: enter $31438, $0
-// CHECK: encoding: [0xc8,0xce,0x7a,0x00]
-// CHECK: enter $31438, $1
-// CHECK: encoding: [0xc8,0xce,0x7a,0x01]
-// CHECK: enter $31438, $127
-// CHECK: encoding: [0xc8,0xce,0x7a,0x7f]
-enter $0x7ace,$0
-enter $0x7ace,$1
-enter $0x7ace,$0x7f
-
-
-// rdar://8456364
-// CHECK: movw  %cs, %ax
-mov %CS, %ax
-
-// rdar://8456391
-fcmovb %st(1), %st(0)   // CHECK: fcmovb  %st(1), %st(0)
-fcmove %st(1), %st(0)   // CHECK: fcmove  %st(1), %st(0)
-fcmovbe %st(1), %st(0)  // CHECK: fcmovbe  %st(1), %st(0)
-fcmovu %st(1), %st(0)   // CHECK: fcmovu   %st(1), %st(0)
-
-fcmovnb %st(1), %st(0)  // CHECK: fcmovnb  %st(1), %st(0)
-fcmovne %st(1), %st(0)  // CHECK: fcmovne  %st(1), %st(0)
-fcmovnbe %st(1), %st(0) // CHECK: fcmovnbe  %st(1), %st(0)
-fcmovnu %st(1), %st(0)  // CHECK: fcmovnu  %st(1), %st(0)
-
-fcmovnae %st(1), %st(0) // CHECK: fcmovb  %st(1), %st(0)
-fcmovna %st(1), %st(0)  // CHECK: fcmovbe  %st(1), %st(0)
-
-fcmovae %st(1), %st(0)  // CHECK: fcmovnb  %st(1), %st(0)
-fcmova %st(1), %st(0)   // CHECK: fcmovnbe  %st(1), %st(0)
-
-// rdar://8456417
-.byte (88 + 1) & 15  // CHECK: .byte  9
-
-// rdar://8456412
-mov %rdx, %cr0
-// CHECK: movq  %rdx, %cr0
-// CHECK: encoding: [0x0f,0x22,0xc2]
-mov %rdx, %cr4
-// CHECK: movq  %rdx, %cr4
-// CHECK: encoding: [0x0f,0x22,0xe2]
-mov %rdx, %cr8
-// CHECK: movq  %rdx, %cr8
-// CHECK: encoding: [0x44,0x0f,0x22,0xc2]
-mov %rdx, %cr15
-// CHECK: movq  %rdx, %cr15
-// CHECK: encoding: [0x44,0x0f,0x22,0xfa]
-
-// rdar://8456371 - Handle commutable instructions written backward.
-// CHECK:   faddp %st(1)
-// CHECK: fmulp %st(2)
-faddp %st, %st(1)
-fmulp %st, %st(2)
-
-// rdar://8468087 - Encode these accurately, they are not synonyms.
-// CHECK: fmul  %st(0), %st(1)
-// CHECK: encoding: [0xdc,0xc9]
-// CHECK: fmul  %st(1)
-// CHECK: encoding: [0xd8,0xc9]
-fmul %st, %st(1)
-fmul %st(1), %st
-
-// CHECK: fadd  %st(0), %st(1)
-// CHECK: encoding: [0xdc,0xc1]
-// CHECK: fadd  %st(1)
-// CHECK: encoding: [0xd8,0xc1]
-fadd %st, %st(1)
-fadd %st(1), %st
-
-
-// rdar://8416805
-// CHECK: xorb  %al, %al
-// CHECK: encoding: [0x30,0xc0]
-// CHECK: xorw  %di, %di
-// CHECK: encoding: [0x66,0x31,0xff]
-// CHECK: xorl  %esi, %esi
-// CHECK: encoding: [0x31,0xf6]
-// CHECK: xorq  %rsi, %rsi
-// CHECK: encoding: [0x48,0x31,0xf6]
-clrb    %al
-clr    %di
-clr    %esi
-clr    %rsi
-
-// rdar://8456378
-cltq  // CHECK: cltq
-cdqe  // CHECK: cltq
-cwde  // CHECK: cwtl
-cwtl  // CHECK: cwtl
-
-// rdar://8416805
-cbw   // CHECK: cbtw
-cwd   // CHECK: cwtd
-cdq   // CHECK: cltd
-cqo   // CHECK: cqto
-
-// rdar://8456378 and PR7557 - fstsw
-fstsw %ax
-// CHECK: wait
-// CHECK: fnstsw
-fstsw (%rax)
-// CHECK: wait
-// CHECK: fnstsw (%rax)
-
-// PR8259
-fstcw (%rsp)
-// CHECK: wait
-// CHECK: fnstcw (%rsp)
-
-// PR8259
-fstcw (%rsp)
-// CHECK: wait
-// CHECK: fnstcw (%rsp)
-
-// PR8258
-finit
-// CHECK: wait
-// CHECK: fninit
-
-fsave 32493
-// CHECK: wait
-// CHECK: fnsave 32493
-
-
-// rdar://8456382 - cvtsd2si support.
-cvtsd2si  %xmm1, %rax
-// CHECK: cvtsd2si  %xmm1, %rax
-// CHECK: encoding: [0xf2,0x48,0x0f,0x2d,0xc1]
-cvtsd2si  %xmm1, %eax
-// CHECK: cvtsd2si  %xmm1, %eax
-// CHECK: encoding: [0xf2,0x0f,0x2d,0xc1]
-
-cvtsd2siq %xmm0, %rax // CHECK: cvtsd2si  %xmm0, %rax
-cvtsd2sil %xmm0, %eax // CHECK: cvtsd2si  %xmm0, %eax
-cvtsd2si %xmm0, %rax  // CHECK: cvtsd2si  %xmm0, %rax
-
-
-cvttpd2dq %xmm1, %xmm0  // CHECK: cvttpd2dq %xmm1, %xmm0
-cvttpd2dq (%rax), %xmm0 // CHECK: cvttpd2dq (%rax), %xmm0
-
-cvttps2dq %xmm1, %xmm0  // CHECK: cvttps2dq %xmm1, %xmm0
-cvttps2dq (%rax), %xmm0 // CHECK: cvttps2dq (%rax), %xmm0
-
-// rdar://8456376 - llvm-mc rejects 'roundss'
-roundss $0xE, %xmm0, %xmm0 // CHECK: encoding: [0x66,0x0f,0x3a,0x0a,0xc0,0x0e]
-roundps $0xE, %xmm0, %xmm0 // CHECK: encoding: [0x66,0x0f,0x3a,0x08,0xc0,0x0e]
-roundsd $0xE, %xmm0, %xmm0 // CHECK: encoding: [0x66,0x0f,0x3a,0x0b,0xc0,0x0e]
-roundpd $0xE, %xmm0, %xmm0 // CHECK: encoding: [0x66,0x0f,0x3a,0x09,0xc0,0x0e]
-
-
-// rdar://8482675 - 32-bit mem operand support in 64-bit mode (0x67 prefix)
-leal  8(%eax), %esi
-// CHECK: leal  8(%eax), %esi
-// CHECK: encoding: [0x67,0x8d,0x70,0x08]
-leaq  8(%eax), %rsi
-// CHECK: leaq  8(%eax), %rsi
-// CHECK: encoding: [0x67,0x48,0x8d,0x70,0x08]
-leaq  8(%rax), %rsi
-// CHECK: leaq  8(%rax), %rsi
-// CHECK: encoding: [0x48,0x8d,0x70,0x08]
-
-
-cvttpd2dq  0xdeadbeef(%ebx,%ecx,8),%xmm5
-// CHECK: cvttpd2dq 3735928559(%ebx,%ecx,8), %xmm5
-// CHECK: encoding: [0x67,0x66,0x0f,0xe6,0xac,0xcb,0xef,0xbe,0xad,0xde]
-
-// rdar://8490728 - llvm-mc rejects 'movmskpd'
-movmskpd  %xmm6, %rax
-// CHECK: movmskpd  %xmm6, %eax
-// CHECK: encoding: [0x66,0x0f,0x50,0xc6]
-movmskpd  %xmm6, %eax
-// CHECK: movmskpd  %xmm6, %eax
-// CHECK: encoding: [0x66,0x0f,0x50,0xc6]
-
-// rdar://8491845 - Gas supports commuted forms of non-commutable instructions.
-fdivrp %st(0), %st(1) // CHECK: encoding: [0xde,0xf9]
-fdivrp %st(1), %st(0) // CHECK: encoding: [0xde,0xf9]
-
-fsubrp %ST(0), %ST(1) // CHECK: encoding: [0xde,0xe9]
-fsubrp %ST(1), %ST(0) // CHECK: encoding: [0xde,0xe9]
-
-// also PR8861
-fdivp %st(0), %st(1) // CHECK: encoding: [0xde,0xf1]
-fdivp %st(1), %st(0) // CHECK: encoding: [0xde,0xf1]
-
-
-movl  foo(%rip), %eax
-// CHECK: movl  foo(%rip), %eax
-// CHECK: encoding: [0x8b,0x05,A,A,A,A]
-// CHECK: fixup A - offset: 2, value: foo-4, kind: reloc_riprel_4byte
-
-movb  $12, foo(%rip)
-// CHECK: movb  $12, foo(%rip)
-// CHECK: encoding: [0xc6,0x05,A,A,A,A,0x0c]
-// CHECK:    fixup A - offset: 2, value: foo-5, kind: reloc_riprel_4byte
-
-movw  $12, foo(%rip)
-// CHECK: movw  $12, foo(%rip)
-// CHECK: encoding: [0x66,0xc7,0x05,A,A,A,A,0x0c,0x00]
-// CHECK:    fixup A - offset: 3, value: foo-6, kind: reloc_riprel_4byte
-
-movl  $12, foo(%rip)
-// CHECK: movl  $12, foo(%rip)
-// CHECK: encoding: [0xc7,0x05,A,A,A,A,0x0c,0x00,0x00,0x00]
-// CHECK:    fixup A - offset: 2, value: foo-8, kind: reloc_riprel_4byte
-
-movq  $12, foo(%rip)
-// CHECK:  movq $12, foo(%rip)
-// CHECK: encoding: [0x48,0xc7,0x05,A,A,A,A,0x0c,0x00,0x00,0x00]
-// CHECK:    fixup A - offset: 3, value: foo-8, kind: reloc_riprel_4byte
-
-movl  foo(%eip), %eax
-// CHECK: movl  foo(%eip), %eax
-// CHECK: encoding: [0x67,0x8b,0x05,A,A,A,A]
-// CHECK: fixup A - offset: 3, value: foo-4, kind: reloc_riprel_4byte
-
-movb  $12, foo(%eip)
-// CHECK: movb  $12, foo(%eip)
-// CHECK: encoding: [0x67,0xc6,0x05,A,A,A,A,0x0c]
-// CHECK:    fixup A - offset: 3, value: foo-5, kind: reloc_riprel_4byte
-
-movw  $12, foo(%eip)
-// CHECK: movw  $12, foo(%eip)
-// CHECK: encoding: [0x67,0x66,0xc7,0x05,A,A,A,A,0x0c,0x00]
-// CHECK:    fixup A - offset: 4, value: foo-6, kind: reloc_riprel_4byte
-
-movl  $12, foo(%eip)
-// CHECK: movl  $12, foo(%eip)
-// CHECK: encoding: [0x67,0xc7,0x05,A,A,A,A,0x0c,0x00,0x00,0x00]
-// CHECK:    fixup A - offset: 3, value: foo-8, kind: reloc_riprel_4byte
-
-movq  $12, foo(%eip)
-// CHECK:  movq $12, foo(%eip)
-// CHECK: encoding: [0x67,0x48,0xc7,0x05,A,A,A,A,0x0c,0x00,0x00,0x00]
-// CHECK:    fixup A - offset: 4, value: foo-8, kind: reloc_riprel_4byte
-
-// CHECK: addq  $-424, %rax
-// CHECK: encoding: [0x48,0x05,0x58,0xfe,0xff,0xff]
-addq $-424, %rax
-
-
-// CHECK: movq  _foo@GOTPCREL(%rip), %rax
-// CHECK:  encoding: [0x48,0x8b,0x05,A,A,A,A]
-// CHECK:  fixup A - offset: 3, value: _foo@GOTPCREL-4, kind: reloc_riprel_4byte_movq_load
-movq _foo@GOTPCREL(%rip), %rax
-
-// CHECK: movq  _foo@GOTPCREL(%rip), %r14
-// CHECK:  encoding: [0x4c,0x8b,0x35,A,A,A,A]
-// CHECK:  fixup A - offset: 3, value: _foo@GOTPCREL-4, kind: reloc_riprel_4byte_movq_load
-movq _foo@GOTPCREL(%rip), %r14
-
-// CHECK: movq  _foo@GOTPCREL(%eip), %rax
-// CHECK:  encoding: [0x67,0x48,0x8b,0x05,A,A,A,A]
-// CHECK:  fixup A - offset: 4, value: _foo@GOTPCREL-4, kind: reloc_riprel_4byte_movq_load
-movq _foo@GOTPCREL(%eip), %rax
-
-// CHECK: movq  _foo@GOTPCREL(%eip), %r14
-// CHECK:  encoding: [0x67,0x4c,0x8b,0x35,A,A,A,A]
-// CHECK:  fixup A - offset: 4, value: _foo@GOTPCREL-4, kind: reloc_riprel_4byte_movq_load
-movq _foo@GOTPCREL(%eip), %r14
-
-// CHECK: movq  (%r13,%rax,8), %r13
-// CHECK:  encoding: [0x4d,0x8b,0x6c,0xc5,0x00]
-movq 0x00(%r13,%rax,8),%r13
-
-// CHECK: testq %rax, %rbx
-// CHECK:  encoding: [0x48,0x85,0xc3]
-testq %rax, %rbx
-
-// CHECK: cmpq  %rbx, %r14
-// CHECK:   encoding: [0x49,0x39,0xde]
-        cmpq %rbx, %r14
-
-// rdar://7947167
-
-movsq
-// CHECK: movsq
-// CHECK:   encoding: [0x48,0xa5]
-
-movsl
-// CHECK: movsl
-// CHECK:   encoding: [0xa5]
-
-stosq
-// CHECK: stosq
-// CHECK:   encoding: [0x48,0xab]
-stosl
-// CHECK: stosl
-// CHECK:   encoding: [0xab]
-
-
-// Not moffset forms of moves, they are x86-32 only! rdar://7947184
-movb  0, %al    // CHECK: movb 0, %al # encoding: [0x8a,0x04,0x25,0x00,0x00,0x00,0x00]
-movw  0, %ax    // CHECK: movw 0, %ax # encoding: [0x66,0x8b,0x04,0x25,0x00,0x00,0x00,0x00]
-movl  0, %eax   // CHECK: movl 0, %eax # encoding: [0x8b,0x04,0x25,0x00,0x00,0x00,0x00]
-
-// CHECK: pushfq  # encoding: [0x9c]
-        pushf
-// CHECK: pushfq  # encoding: [0x9c]
-        pushfq
-// CHECK: popfq         # encoding: [0x9d]
-        popf
-// CHECK: popfq         # encoding: [0x9d]
-        popfq
-
-// CHECK: movabsq $-281474976710654, %rax
-// CHECK: encoding: [0x48,0xb8,0x02,0x00,0x00,0x00,0x00,0x00,0xff,0xff]
-        movabsq $0xFFFF000000000002, %rax
-
-// CHECK: movabsq $-281474976710654, %rax
-// CHECK: encoding: [0x48,0xb8,0x02,0x00,0x00,0x00,0x00,0x00,0xff,0xff]
-        movq $0xFFFF000000000002, %rax
-
-// CHECK: movq $-65536, %rax
-// CHECK: encoding: [0x48,0xc7,0xc0,0x00,0x00,0xff,0xff]
-        movq $0xFFFFFFFFFFFF0000, %rax
-
-// CHECK: movq $-256, %rax
-// CHECK: encoding: [0x48,0xc7,0xc0,0x00,0xff,0xff,0xff]
-        movq $0xFFFFFFFFFFFFFF00, %rax
-
-// CHECK: movq $10, %rax
-// CHECK: encoding: [0x48,0xc7,0xc0,0x0a,0x00,0x00,0x00]
-        movq $10, %rax
-
-// CHECK: movabsb -6066930261531658096, %al
-// CHECK: encoding: [0xa0,0x90,0x78,0x56,0x34,0x12,0xef,0xcd,0xab]
-        movabsb 0xabcdef1234567890,%al
-
-// CHECK: movabsw -6066930261531658096, %ax
-// CHECK: encoding: [0x66,0xa1,0x90,0x78,0x56,0x34,0x12,0xef,0xcd,0xab]
-        movabsw 0xabcdef1234567890,%ax
-
-// CHECK: movabsl -6066930261531658096, %eax
-// CHECK: encoding: [0xa1,0x90,0x78,0x56,0x34,0x12,0xef,0xcd,0xab]
-        movabsl 0xabcdef1234567890,%eax
-
-// CHECK: movabsq -6066930261531658096, %rax
-// CHECK: encoding: [0x48,0xa1,0x90,0x78,0x56,0x34,0x12,0xef,0xcd,0xab]
-        movabsq 0xabcdef1234567890, %rax
-
-// CHECK: movabsb %al, -6066930261531658096
-// CHECK: encoding: [0xa2,0x90,0x78,0x56,0x34,0x12,0xef,0xcd,0xab]
-        movabsb %al,0xabcdef1234567890
-
-// CHECK: movabsw %ax, -6066930261531658096
-// CHECK: encoding: [0x66,0xa3,0x90,0x78,0x56,0x34,0x12,0xef,0xcd,0xab]
-        movabsw %ax,0xabcdef1234567890
-
-// CHECK: movabsl %eax, -6066930261531658096
-// CHECK: encoding: [0xa3,0x90,0x78,0x56,0x34,0x12,0xef,0xcd,0xab]
-        movabsl %eax,0xabcdef1234567890
-
-// CHECK: movabsq %rax, -6066930261531658096
-// CHECK: encoding: [0x48,0xa3,0x90,0x78,0x56,0x34,0x12,0xef,0xcd,0xab]
-        movabsq %rax,0xabcdef1234567890
-
-// rdar://8014869
-//
-// CHECK: ret
-// CHECK:  encoding: [0xc3]
-        retq
-
-// CHECK: sete %al
-// CHECK: encoding: [0x0f,0x94,0xc0]
-        setz %al
-
-// CHECK: setne %al
-// CHECK: encoding: [0x0f,0x95,0xc0]
-        setnz %al
-
-// CHECK: je 0
-// CHECK: encoding: [0x74,A]
-        jz 0
-
-// CHECK: jne
-// CHECK: encoding: [0x75,A]
-        jnz 0
-
-// PR9264
-btl  $1, 0 // CHECK: btl $1, 0 # encoding: [0x0f,0xba,0x24,0x25,0x00,0x00,0x00,0x00,0x01]
-bt  $1, 0 // CHECK: btl $1, 0 # encoding: [0x0f,0xba,0x24,0x25,0x00,0x00,0x00,0x00,0x01]
-
-// rdar://8017515
-btq $0x01,%rdx
-// CHECK: btq $1, %rdx
-// CHECK:  encoding: [0x48,0x0f,0xba,0xe2,0x01]
-
-//rdar://8017633
-// CHECK: movzbl  %al, %esi
-// CHECK:  encoding: [0x0f,0xb6,0xf0]
-        movzx %al, %esi
-
-// CHECK: movzbq  %al, %rsi
-// CHECK:  encoding: [0x48,0x0f,0xb6,0xf0]
-        movzx %al, %rsi
-
-// CHECK: movsbw  %al, %ax
-// CHECK: encoding: [0x66,0x0f,0xbe,0xc0]
-movsx %al, %ax
-
-// CHECK: movsbl  %al, %eax
-// CHECK: encoding: [0x0f,0xbe,0xc0]
-movsx %al, %eax
-
-// CHECK: movswl  %ax, %eax
-// CHECK: encoding: [0x0f,0xbf,0xc0]
-movsx %ax, %eax
-
-// CHECK: movsbq  %bl, %rax
-// CHECK: encoding: [0x48,0x0f,0xbe,0xc3]
-movsx %bl, %rax
-
-// CHECK: movswq %cx, %rax
-// CHECK: encoding: [0x48,0x0f,0xbf,0xc1]
-movsx %cx, %rax
-
-// CHECK: movslq  %edi, %rax
-// CHECK: encoding: [0x48,0x63,0xc7]
-movsx %edi, %rax
-
-// CHECK: movzbw  %al, %ax
-// CHECK: encoding: [0x66,0x0f,0xb6,0xc0]
-movzx %al, %ax
-
-// CHECK: movzbl  %al, %eax
-// CHECK: encoding: [0x0f,0xb6,0xc0]
-movzx %al, %eax
-
-// CHECK: movzwl  %ax, %eax
-// CHECK: encoding: [0x0f,0xb7,0xc0]
-movzx %ax, %eax
-
-// CHECK: movzbq  %bl, %rax
-// CHECK: encoding: [0x48,0x0f,0xb6,0xc3]
-movzx %bl, %rax
-
-// CHECK: movzwq  %cx, %rax
-// CHECK: encoding: [0x48,0x0f,0xb7,0xc1]
-movzx %cx, %rax
-
-// CHECK: movsbw  (%rax), %ax
-// CHECK: encoding: [0x66,0x0f,0xbe,0x00]
-movsx (%rax), %ax
-
-// CHECK: movzbw  (%rax), %ax
-// CHECK: encoding: [0x66,0x0f,0xb6,0x00]
-movzx (%rax), %ax
-
-
-// rdar://7873482
-// CHECK: [0x65,0x8b,0x04,0x25,0x7c,0x00,0x00,0x00]
-        movl  %gs:124, %eax
-
-// CHECK: jmpq *8(%rax)
-// CHECK:   encoding: [0xff,0x60,0x08]
-  jmp  *8(%rax)
-
-// CHECK: btq $61, -216(%rbp)
-// CHECK:   encoding: [0x48,0x0f,0xba,0xa5,0x28,0xff,0xff,0xff,0x3d]
-  btq  $61, -216(%rbp)
-
-
-// rdar://8061602
-L1:
-  jecxz L1
-// CHECK: jecxz L1
-// CHECK:   encoding: [0x67,0xe3,A]
-  jrcxz L1
-// CHECK: jrcxz L1
-// CHECK:   encoding: [0xe3,A]
-
-// PR8061
-xchgl   368(%rax),%ecx
-// CHECK: xchgl %ecx, 368(%rax)
-xchgl   %ecx, 368(%rax)
-// CHECK: xchgl %ecx, 368(%rax)
-
-// rdar://8407548
-xchg  0xdeadbeef(%rbx,%rcx,8),%bl
-// CHECK: xchgb %bl, 3735928559(%rbx,%rcx,8)
-
-
-
-// PR7254
-lock  incl 1(%rsp)
-// CHECK: lock
-// CHECK: incl 1(%rsp)
-
-// rdar://8741045
-lock/incl 1(%rsp)
-// CHECK: lock
-// CHECK: incl 1(%rsp)
-
-
-lock addq %rsi, (%rdi)
-// CHECK: lock
-// CHECK: encoding: [0xf0]
-// CHECK: addq %rsi, (%rdi)
-// CHECK: encoding: [0x48,0x01,0x37]
-
-lock subq %rsi, (%rdi)
-// CHECK: lock
-// CHECK: encoding: [0xf0]
-// CHECK: subq %rsi, (%rdi)
-// CHECK: encoding: [0x48,0x29,0x37]
-
-lock andq %rsi, (%rdi)
-// CHECK: lock
-// CHECK: encoding: [0xf0]
-// CHECK: andq %rsi, (%rdi)
-// CHECK: encoding: [0x48,0x21,0x37]
-
-lock orq %rsi, (%rdi)
-// CHECK: lock
-// CHECK: encoding: [0xf0]
-// CHECK: orq %rsi, (%rdi)
-// CHECK: encoding: [0x48,0x09,0x37]
-
-lock xorq %rsi, (%rdi)
-// CHECK: lock
-// CHECK: encoding: [0xf0]
-// CHECK: xorq %rsi, (%rdi)
-// CHECK: encoding: [0x48,0x31,0x37]
-
-
-// rdar://8033482
-rep movsl
-// CHECK: rep
-// CHECK: encoding: [0xf3]
-// CHECK: movsl
-// CHECK: encoding: [0xa5]
-
-
-// rdar://8403974
-iret
-// CHECK: iretl
-// CHECK: encoding: [0xcf]
-iretw
-// CHECK: iretw
-// CHECK: encoding: [0x66,0xcf]
-iretl
-// CHECK: iretl
-// CHECK: encoding: [0xcf]
-iretq
-// CHECK: iretq
-// CHECK: encoding: [0x48,0xcf]
-
-// rdar://8416805
-// CHECK: retw  $31438
-// CHECK:  encoding: [0x66,0xc2,0xce,0x7a]
-          retw  $0x7ace
-
-// CHECK: lretw $31438
-// CHECK:  encoding: [0x66,0xca,0xce,0x7a]
-          lretw $0x7ace
-
-// PR8592
-lretq  // CHECK: lretq # encoding: [0x48,0xcb]
-lretl  // CHECK: lretl # encoding: [0xcb]
-lret   // CHECK: lretl # encoding: [0xcb]
-lretw  // CHECK: lretw # encoding: [0x66,0xcb]
-
-// rdar://8403907
-sysret
-// CHECK: sysretl
-// CHECK: encoding: [0x0f,0x07]
-sysretl
-// CHECK: sysretl
-// CHECK: encoding: [0x0f,0x07]
-sysretq
-// CHECK: sysretq
-// CHECK: encoding: [0x48,0x0f,0x07]
-
-// rdar://8407242
-push %fs
-// CHECK: pushq %fs
-// CHECK: encoding: [0x0f,0xa0]
-push %gs
-// CHECK: pushq %gs
-// CHECK: encoding: [0x0f,0xa8]
-
-pushw %fs
-// CHECK: pushw %fs
-// CHECK: encoding: [0x66,0x0f,0xa0]
-pushw %gs
-// CHECK: pushw %gs
-// CHECK: encoding: [0x66,0x0f,0xa8]
-
-
-pop %fs
-// CHECK: popq  %fs
-// CHECK: encoding: [0x0f,0xa1]
-pop %gs
-// CHECK: popq  %gs
-// CHECK: encoding: [0x0f,0xa9]
-
-popw %fs
-// CHECK: popw  %fs
-// CHECK: encoding: [0x66,0x0f,0xa1]
-popw %gs
-// CHECK: popw  %gs
-// CHECK: encoding: [0x66,0x0f,0xa9]
-
-// rdar://8438816
-fildq -8(%rsp)
-fildll -8(%rsp)
-// CHECK: fildll  -8(%rsp)
-// CHECK: encoding: [0xdf,0x6c,0x24,0xf8]
-// CHECK: fildll  -8(%rsp)
-// CHECK: encoding: [0xdf,0x6c,0x24,0xf8]
-
-// CHECK: callq a
-        callq a
-
-// CHECK: leaq  -40(%rbp), %r15
-  leaq  -40(%rbp), %r15
-
-
-
-// rdar://8013734 - Alias dr6=db6
-mov %dr6, %rax
-mov %db6, %rax
-// CHECK: movq  %dr6, %rax
-// CHECK: movq  %dr6, %rax
-
-
-// INC/DEC encodings.
-incb %al  // CHECK:  incb  %al # encoding: [0xfe,0xc0]
-incw %ax  // CHECK:  incw  %ax # encoding: [0x66,0xff,0xc0]
-incl %eax // CHECK:  incl  %eax # encoding: [0xff,0xc0]
-decb %al  // CHECK:  decb  %al # encoding: [0xfe,0xc8]
-decw %ax  // CHECK:  decw  %ax # encoding: [0x66,0xff,0xc8]
-decl %eax // CHECK:  decl  %eax # encoding: [0xff,0xc8]
-
-// rdar://8416805
-// CHECK: lgdtq 4(%rax)
-// CHECK:  encoding: [0x0f,0x01,0x50,0x04]
-          lgdt  4(%rax)
-
-// CHECK: lgdtq 4(%rax)
-// CHECK:  encoding: [0x0f,0x01,0x50,0x04]
-          lgdtq  4(%rax)
-
-// CHECK: lidtq 4(%rax)
-// CHECK:  encoding: [0x0f,0x01,0x58,0x04]
-          lidt  4(%rax)
-
-// CHECK: lidtq 4(%rax)
-// CHECK:  encoding: [0x0f,0x01,0x58,0x04]
-          lidtq  4(%rax)
-
-// CHECK: sgdtq 4(%rax)
-// CHECK:  encoding: [0x0f,0x01,0x40,0x04]
-          sgdt  4(%rax)
-
-// CHECK: sgdtq 4(%rax)
-// CHECK:  encoding: [0x0f,0x01,0x40,0x04]
-          sgdtq  4(%rax)
-
-// CHECK: sidtq 4(%rax)
-// CHECK:  encoding: [0x0f,0x01,0x48,0x04]
-          sidt  4(%rax)
-
-// CHECK: sidtq 4(%rax)
-// CHECK:  encoding: [0x0f,0x01,0x48,0x04]
-          sidtq  4(%rax)
-
-
-// rdar://8208615
-mov (%rsi), %gs  // CHECK: movl  (%rsi), %gs # encoding: [0x8e,0x2e]
-mov %gs, (%rsi)  // CHECK: movl  %gs, (%rsi) # encoding: [0x8c,0x2e]
-
-
-// rdar://8431864
-//CHECK: divb %bl
-//CHECK: divw %bx
-//CHECK: divl %ecx
-//CHECK: divl 3735928559(%ebx,%ecx,8)
-//CHECK: divl 69
-//CHECK: divl 32493
-//CHECK: divl 3133065982
-//CHECK: divl 305419896
-//CHECK: idivb  %bl
-//CHECK: idivw  %bx
-//CHECK: idivl  %ecx
-//CHECK: idivl  3735928559(%ebx,%ecx,8)
-//CHECK: idivl  69
-//CHECK: idivl  32493
-//CHECK: idivl  3133065982
-//CHECK: idivl  305419896
-  div  %bl,%al
-  div  %bx,%ax
-  div %ecx,%eax
-  div  0xdeadbeef(%ebx,%ecx,8),%eax
-  div  0x45,%eax
-  div  0x7eed,%eax
-  div  0xbabecafe,%eax
-  div  0x12345678,%eax
-  idiv  %bl,%al
-  idiv  %bx,%ax
-  idiv  %ecx,%eax
-  idiv  0xdeadbeef(%ebx,%ecx,8),%eax
-  idiv  0x45,%eax
-  idiv  0x7eed,%eax
-  idiv  0xbabecafe,%eax
-  idiv  0x12345678,%eax
-
-// PR8524
-movd  %rax, %mm5 // CHECK: movd %rax, %mm5 # encoding: [0x48,0x0f,0x6e,0xe8]
-movd  %mm5, %rbx // CHECK: movd %mm5, %rbx # encoding: [0x48,0x0f,0x7e,0xeb]
-movq  %rax, %mm5 // CHECK: movd %rax, %mm5 # encoding: [0x48,0x0f,0x6e,0xe8]
-movq  %mm5, %rbx // CHECK: movd %mm5, %rbx # encoding: [0x48,0x0f,0x7e,0xeb]
-
-rex64 // CHECK: rex64 # encoding: [0x48]
-data16 // CHECK: data16 # encoding: [0x66]
-
-// CHECK: data16
-// CHECK: encoding: [0x66]
-// CHECK: lgdtq 4(%rax)
-// CHECK:  encoding: [0x0f,0x01,0x50,0x04]
-data16 lgdt 4(%rax)
-
-// PR8855
-movq 18446744073709551615,%rbx   // CHECK: movq  -1, %rbx
-
-// PR8946
-movdqu  %xmm0, %xmm1 // CHECK: movdqu  %xmm0, %xmm1 # encoding: [0xf3,0x0f,0x6f,0xc8]
-
-// PR8935
-xgetbv // CHECK: xgetbv # encoding: [0x0f,0x01,0xd0]
-xsetbv // CHECK: xsetbv # encoding: [0x0f,0x01,0xd1]
-
-// CHECK: loope 0
-// CHECK: encoding: [0xe1,A]
-  loopz 0
-
-// CHECK: loopne 0
-// CHECK: encoding: [0xe0,A]
-  loopnz 0
-
-// CHECK: outsb (%rsi), %dx # encoding: [0x6e]
-// CHECK: outsb
-// CHECK: outsb
-  outsb
-  outsb  %ds:(%rsi), %dx
-  outsb  (%rsi), %dx
-
-// CHECK: outsw (%rsi), %dx # encoding: [0x66,0x6f]
-// CHECK: outsw
-// CHECK: outsw
-  outsw
-  outsw %ds:(%rsi), %dx
-  outsw (%rsi), %dx
-
-// CHECK: outsl (%rsi), %dx # encoding: [0x6f]
-// CHECK: outsl
-  outsl
-  outsl  %ds:(%rsi), %dx
-  outsl (%rsi), %dx
-
-// CHECK: insb  %dx, %es:(%rdi) # encoding: [0x6c]
-// CHECK: insb
-  insb
-  insb  %dx, %es:(%rdi)
-
-// CHECK: insw  %dx, %es:(%rdi) # encoding: [0x66,0x6d]
-// CHECK: insw
-  insw
-  insw  %dx, %es:(%rdi)
-
-// CHECK: insl %dx, %es:(%rdi) # encoding: [0x6d]
-// CHECK: insl
-  insl
-  insl  %dx, %es:(%rdi)
-
-// CHECK: movsb (%rsi), %es:(%rdi) # encoding: [0xa4]
-// CHECK: movsb
-// CHECK: movsb
-  movsb
-  movsb  %ds:(%rsi), %es:(%rdi)
-  movsb  (%rsi), %es:(%rdi)
-
-// CHECK: movsw (%rsi), %es:(%rdi) # encoding: [0x66,0xa5]
-// CHECK: movsw
-// CHECK: movsw
-  movsw
-  movsw  %ds:(%rsi), %es:(%rdi)
-  movsw (%rsi), %es:(%rdi)
-
-// CHECK: movsl (%rsi), %es:(%rdi) # encoding: [0xa5]
-// CHECK: movsl
-// CHECK: movsl
-  movsl
-  movsl  %ds:(%rsi), %es:(%rdi)
-  movsl (%rsi), %es:(%rdi)
-// rdar://10883092
-// CHECK: movsl
-  movsl  (%rsi), (%rdi)
-
-// CHECK: movsq (%rsi), %es:(%rdi) # encoding: [0x48,0xa5]
-// CHECK: movsq
-// CHECK: movsq
-  movsq
-  movsq  %ds:(%rsi), %es:(%rdi)
-  movsq  (%rsi), %es:(%rdi)
-
-// CHECK: lodsb (%rsi), %al # encoding: [0xac]
-// CHECK: lodsb
-// CHECK: lodsb
-// CHECK: lodsb
-// CHECK: lodsb
-  lodsb
-  lodsb  %ds:(%rsi), %al
-  lodsb (%rsi), %al
-  lods  %ds:(%rsi), %al
-  lods  (%rsi), %al
-
-// CHECK: lodsw (%rsi), %ax # encoding: [0x66,0xad]
-// CHECK: lodsw
-// CHECK: lodsw
-// CHECK: lodsw
-// CHECK: lodsw
-  lodsw
-  lodsw  %ds:(%rsi), %ax
-  lodsw (%rsi), %ax
-  lods  %ds:(%rsi), %ax
-  lods  (%rsi), %ax
-
-// CHECK: lodsl (%rsi), %eax # encoding: [0xad]
-// CHECK: lodsl
-// CHECK: lodsl
-// CHECK: lodsl
-// CHECK: lodsl
-  lodsl
-  lodsl  %ds:(%rsi), %eax
-  lodsl (%rsi), %eax
-  lods  %ds:(%rsi), %eax
-  lods  (%rsi), %eax
-
-// CHECK: lodsq (%rsi), %rax # encoding: [0x48,0xad]
-// CHECK: lodsq
-// CHECK: lodsq
-// CHECK: lodsq
-// CHECK: lodsq
-  lodsq
-  lodsq  %ds:(%rsi), %rax
-  lodsq (%rsi), %rax
-  lods  %ds:(%rsi), %rax
-  lods  (%rsi), %rax
-
-// CHECK: stosb %al, %es:(%rdi) # encoding: [0xaa]
-// CHECK: stosb
-// CHECK: stosb
-  stosb
-  stosb  %al, %es:(%rdi)
-  stos  %al, %es:(%rdi)
-
-// CHECK: stosw %ax, %es:(%rdi) # encoding: [0x66,0xab]
-// CHECK: stosw
-// CHECK: stosw
-  stosw
-  stosw  %ax, %es:(%rdi)
-  stos  %ax, %es:(%rdi)
-
-// CHECK: stosl %eax, %es:(%rdi) # encoding: [0xab]
-// CHECK: stosl
-// CHECK: stosl
-  stosl
-  stosl  %eax, %es:(%rdi)
-  stos  %eax, %es:(%rdi)
-
-// CHECK: stosq %rax, %es:(%rdi) # encoding: [0x48,0xab]
-// CHECK: stosq
-// CHECK: stosq
-  stosq
-  stosq  %rax, %es:(%rdi)
-  stos  %rax, %es:(%rdi)
-
-// CHECK: strw
-// CHECK: encoding: [0x66,0x0f,0x00,0xc8]
-  str %ax
-
-// CHECK: strl
-// CHECK: encoding: [0x0f,0x00,0xc8]
-  str %eax
-
-// CHECK: strw
-// CHECK: encoding: [0x66,0x0f,0x00,0xc8]
-  str %ax
-
-// CHECK: strq
-// CHECK: encoding: [0x48,0x0f,0x00,0xc8]
-  str %rax
-
-// CHECK: movd %rdi, %xmm0
-// CHECK: encoding: [0x66,0x48,0x0f,0x6e,0xc7]
-  movq %rdi,%xmm0
-
-// CHECK: movd %rdi, %xmm0
-// CHECK: encoding: [0x66,0x48,0x0f,0x6e,0xc7]
-  movd %rdi,%xmm0
-
-// CHECK: movd  %xmm0, %rax
-// CHECK: encoding: [0x66,0x48,0x0f,0x7e,0xc0]
-        movd  %xmm0, %rax
-
-// CHECK: movntil %eax, (%rdi)
-// CHECK: encoding: [0x0f,0xc3,0x07]
-// CHECK: movntil
-movntil %eax, (%rdi)
-movnti %eax, (%rdi)
-
-// CHECK: movntiq %rax, (%rdi)
-// CHECK: encoding: [0x48,0x0f,0xc3,0x07]
-// CHECK: movntiq
-movntiq %rax, (%rdi)
-movnti %rax, (%rdi)
-
-// CHECK: pclmulqdq $17, %xmm0, %xmm1
-// CHECK: encoding: [0x66,0x0f,0x3a,0x44,0xc8,0x11]
-pclmulhqhqdq %xmm0, %xmm1
-
-// CHECK: pclmulqdq $1, %xmm0, %xmm1
-// CHECK: encoding: [0x66,0x0f,0x3a,0x44,0xc8,0x01]
-pclmulqdq $1, %xmm0, %xmm1
-
-// CHECK: pclmulqdq $16, (%rdi), %xmm1
-// CHECK: encoding: [0x66,0x0f,0x3a,0x44,0x0f,0x10]
-pclmullqhqdq (%rdi), %xmm1
-
-// CHECK: pclmulqdq $0, (%rdi), %xmm1
-// CHECK: encoding: [0x66,0x0f,0x3a,0x44,0x0f,0x00]
-pclmulqdq $0, (%rdi), %xmm1
-
-// PR10345
-// CHECK: xchgq %rax, %rax
-// CHECK: encoding: [0x48,0x90]
-xchgq %rax, %rax
-
-// CHECK: xchgl %eax, %eax
-// CHECK: encoding: [0x87,0xc0]
-xchgl %eax, %eax
-
-// CHECK: xchgw %ax, %ax
-// CHECK: encoding: [0x66,0x90]
-xchgw %ax, %ax
-
-// CHECK: xchgl %ecx, %eax
-// CHECK: encoding: [0x91]
-xchgl %ecx, %eax
-
-// CHECK: xchgl %ecx, %eax
-// CHECK: encoding: [0x91]
-xchgl %eax, %ecx
-
-// CHECK: sysexit
-// CHECK: encoding: [0x0f,0x35]
-sysexit
-
-// CHECK: sysexitl
-// CHECK: encoding: [0x0f,0x35]
-sysexitl
-
-// CHECK: sysexitq
-// CHECK: encoding: [0x48,0x0f,0x35]
-sysexitq
-
-// CHECK: clac
-// CHECK: encoding: [0x0f,0x01,0xca]
-clac
-
-// CHECK: stac
-// CHECK: encoding: [0x0f,0x01,0xcb]
-stac
-
-// CHECK: faddp %st(1)
-// CHECK: fmulp %st(1)
-// CHECK: fsubp %st(1)
-// CHECK: fsubrp %st(1)
-// CHECK: fdivp %st(1)
-// CHECK: fdivrp %st(1)
-faddp %st(0), %st(1)
-fmulp %st(0), %st(1)
-fsubp %st(0), %st(1)
-fsubrp %st(0), %st(1)
-fdivp %st(0), %st(1)
-fdivrp %st(0), %st(1)
-
-// CHECK: faddp %st(1)
-// CHECK: fmulp %st(1)
-// CHECK: fsubp %st(1)
-// CHECK: fsubrp %st(1)
-// CHECK: fdivp %st(1)
-// CHECK: fdivrp %st(1)
-faddp %st(1), %st(0)
-fmulp %st(1), %st(0)
-fsubp %st(1), %st(0)
-fsubrp %st(1), %st(0)
-fdivp %st(1), %st(0)
-fdivrp %st(1), %st(0)
-
-// CHECK: faddp %st(1)
-// CHECK: fmulp %st(1)
-// CHECK: fsubp %st(1)
-// CHECK: fsubrp %st(1)
-// CHECK: fdivp %st(1)
-// CHECK: fdivrp %st(1)
-faddp %st(1)
-fmulp %st(1)
-fsubp %st(1)
-fsubrp %st(1)
-fdivp %st(1)
-fdivrp %st(1)
-
-// CHECK: faddp %st(1)
-// CHECK: fmulp %st(1)
-// CHECK: fsubp %st(1)
-// CHECK: fsubrp %st(1)
-// CHECK: fdivp %st(1)
-// CHECK: fdivrp %st(1)
-faddp
-fmulp
-fsubp
-fsubrp
-fdivp
-fdivrp
-
-// CHECK: fadd %st(1)
-// CHECK: fmul %st(1)
-// CHECK: fsub %st(1)
-// CHECK: fsubr %st(1)
-// CHECK: fdiv %st(1)
-// CHECK: fdivr %st(1)
-fadd %st(1), %st(0)
-fmul %st(1), %st(0)
-fsub %st(1), %st(0)
-fsubr %st(1), %st(0)
-fdiv %st(1), %st(0)
-fdivr %st(1), %st(0)
-
-// CHECK: fadd %st(0), %st(1)
-// CHECK: fmul %st(0), %st(1)
-// CHECK: fsub %st(0), %st(1)
-// CHECK: fsubr %st(0), %st(1)
-// CHECK: fdiv %st(0), %st(1)
-// CHECK: fdivr %st(0), %st(1)
-fadd %st(0), %st(1)
-fmul %st(0), %st(1)
-fsub %st(0), %st(1)
-fsubr %st(0), %st(1)
-fdiv %st(0), %st(1)
-fdivr %st(0), %st(1)
-
-// CHECK: fadd %st(1)
-// CHECK: fmul %st(1)
-// CHECK: fsub %st(1)
-// CHECK: fsubr %st(1)
-// CHECK: fdiv %st(1)
-// CHECK: fdivr %st(1)
-fadd %st(1)
-fmul %st(1)
-fsub %st(1)
-fsubr %st(1)
-fdiv %st(1)
-fdivr %st(1)
-
-// CHECK: movd %xmm0, %eax
-// CHECK: movd %xmm0, %rax
-// CHECK: movd %xmm0, %rax
-// CHECK: vmovd %xmm0, %eax
-// CHECK: vmovq %xmm0, %rax
-// CHECK: vmovq %xmm0, %rax
-movd %xmm0, %eax
-movd %xmm0, %rax
-movq %xmm0, %rax
-vmovd %xmm0, %eax
-vmovd %xmm0, %rax
-vmovq %xmm0, %rax
-
-// CHECK: seto 3735928559(%r10,%r9,8)
-// CHECK:  encoding: [0x43,0x0f,0x90,0x84,0xca,0xef,0xbe,0xad,0xde]
-  seto 0xdeadbeef(%r10,%r9,8)
-
-// CHECK:   monitorx
-// CHECK:  encoding: [0x0f,0x01,0xfa]
-          monitorx
-
-// CHECK:   monitorx
-// CHECK:  encoding: [0x0f,0x01,0xfa]
-          monitorx %rax, %rcx, %rdx
-
-// CHECK:   mwaitx
-// CHECK:  encoding: [0x0f,0x01,0xfb]
-          mwaitx
-
-// CHECK:   mwaitx
-// CHECK:  encoding: [0x0f,0x01,0xfb]
-          mwaitx %rax, %rcx, %rbx
-
-// CHECK:   movl %r15d, (%r15,%r15)
-// CHECK:  encoding: [0x47,0x89,0x3c,0x3f]
-movl %r15d, (%r15,%r15)
+// RUN: llvm-mc -triple x86_64-unknown-unknown -show-encoding %s > %t 2> %t.err
+// RUN: FileCheck < %t %s
+// RUN: FileCheck --check-prefix=CHECK-STDERR < %t.err %s
+
+  monitor
+// CHECK: monitor
+// CHECK: encoding: [0x0f,0x01,0xc8]
+  monitor %rax, %rcx, %rdx
+// CHECK: monitor
+// CHECK: encoding: [0x0f,0x01,0xc8]
+  mwait
+// CHECK: mwait
+// CHECK: encoding: [0x0f,0x01,0xc9]
+  mwait %rax, %rcx
+// CHECK: mwait
+// CHECK: encoding: [0x0f,0x01,0xc9]
+
+// Suffix inference:
+
+// CHECK: addl $0, %eax
+        add $0, %eax
+// CHECK: addb $255, %al
+        add $0xFF, %al
+// CHECK: orq %rax, %rdx
+        or %rax, %rdx
+// CHECK: shlq $3, %rax
+        shl $3, %rax
+
+
+// CHECK: subb %al, %al
+        subb %al, %al
+
+// CHECK: addl $24, %eax
+        addl $24, %eax
+
+// CHECK: movl %eax, 10(%ebp)
+        movl %eax, 10(%ebp)
+// CHECK: movl %eax, 10(%ebp,%ebx)
+        movl %eax, 10(%ebp, %ebx)
+// CHECK: movl %eax, 10(%ebp,%ebx,4)
+        movl %eax, 10(%ebp, %ebx, 4)
+// CHECK: movl %eax, 10(,%ebx,4)
+        movl %eax, 10(, %ebx, 4)
+
+// CHECK: movl 0, %eax        
+        movl 0, %eax
+// CHECK: movl $0, %eax        
+        movl $0, %eax
+        
+// CHECK: ret
+        ret
+        
+// CHECK: retw
+        retw
+        
+// FIXME: Check that this matches SUB32ri8
+// CHECK: subl $1, %eax
+        subl $1, %eax
+        
+// FIXME: Check that this matches SUB32ri8
+// CHECK: subl $-1, %eax
+        subl $-1, %eax
+        
+// FIXME: Check that this matches SUB32ri
+// CHECK: subl $256, %eax
+        subl $256, %eax
+
+// FIXME: Check that this matches XOR64ri8
+// CHECK: xorq $1, %rax
+        xorq $1, %rax
+        
+// FIXME: Check that this matches XOR64ri32
+// CHECK: xorq $256, %rax
+        xorq $256, %rax
+
+// FIXME: Check that this matches SUB8rr
+// CHECK: subb %al, %bl
+        subb %al, %bl
+
+// FIXME: Check that this matches SUB16rr
+// CHECK: subw %ax, %bx
+        subw %ax, %bx
+        
+// FIXME: Check that this matches SUB32rr
+// CHECK: subl %eax, %ebx
+        subl %eax, %ebx
+        
+// FIXME: Check that this matches the correct instruction.
+// CHECK: callq *%rax
+        call *%rax
+
+// FIXME: Check that this matches the correct instruction.
+// CHECK: shldl %cl, %eax, %ebx
+        shldl %cl, %eax, %ebx
+
+// CHECK: shll $2, %eax
+        shll $2, %eax
+
+// CHECK: shll $2, %eax
+        sall $2, %eax
+
+// CHECK: rep
+// CHECK: insb
+        rep;insb
+
+// CHECK: rep
+// CHECK: outsb
+        rep;outsb
+
+// CHECK: rep
+// CHECK: movsb
+        rep;movsb
+
+
+// rdar://8470918
+smovb // CHECK: movsb
+smovw // CHECK: movsw
+smovl // CHECK: movsl
+smovq // CHECK: movsq
+
+// rdar://8456361
+// CHECK: rep
+// CHECK: movsl
+        rep movsd
+
+// CHECK: rep
+// CHECK: lodsb
+        rep;lodsb
+
+// CHECK: rep
+// CHECK: stosb
+        rep;stosb
+
+// NOTE: repz and repe have the same opcode as rep
+// CHECK: rep
+// CHECK: cmpsb
+        repz;cmpsb
+
+// NOTE: repnz has the same opcode as repne
+// CHECK: repne
+// CHECK: cmpsb
+        repnz;cmpsb
+
+// NOTE: repe and repz have the same opcode as rep
+// CHECK: rep
+// CHECK: scasb
+        repe;scasb
+
+// CHECK: repne
+// CHECK: scasb
+        repne;scasb
+
+// CHECK: lock
+// CHECK: cmpxchgb %al, (%ebx)
+        lock;cmpxchgb %al, 0(%ebx)
+
+// CHECK: cs
+// CHECK: movb (%eax), %al
+        cs;movb 0(%eax), %al
+
+// CHECK: ss
+// CHECK: movb (%eax), %al
+        ss;movb 0(%eax), %al
+
+// CHECK: ds
+// CHECK: movb (%eax), %al
+        ds;movb 0(%eax), %al
+
+// CHECK: es
+// CHECK: movb (%eax), %al
+        es;movb 0(%eax), %al
+
+// CHECK: fs
+// CHECK: movb (%eax), %al
+        fs;movb 0(%eax), %al
+
+// CHECK: gs
+// CHECK: movb (%eax), %al
+        gs;movb 0(%eax), %al
+
+// CHECK: fadd %st(0)
+// CHECK: fadd %st(1)
+// CHECK: fadd %st(7)
+
+fadd %st(0)
+fadd %st(1)
+fadd %st(7)
+
+// CHECK: leal 0, %eax
+        leal 0, %eax
+
+// rdar://7986634 - Insensitivity on opcodes.
+// CHECK: int3
+INT3
+
+// rdar://8735979 - int $3 -> int3
+// CHECK: int3
+int $3
+
+// CHECK: int $1
+// CHECK:  encoding: [0xcd,0x01]
+int $1
+
+// CHECK: icebp
+// CHECK:  encoding: [0xf1]
+icebp
+
+// Allow scale factor without index register.
+// CHECK: movaps  %xmm3, (%esi)
+// CHECK-STDERR: warning: scale factor without index register is ignored
+movaps %xmm3, (%esi, 2)
+
+// CHECK: imull $12, %eax
+imul $12, %eax
+
+// CHECK: imull %ecx, %eax
+imull %ecx, %eax
+
+
+// rdar://8208481
+// CHECK: outb  %al, $161
+outb  %al, $161
+// CHECK: outw  %ax, $128
+outw  %ax, $128
+// CHECK: inb $161, %al
+inb  $161, %al
+
+// rdar://8017621
+// CHECK: pushq $1
+push $1
+
+// rdar://9716860
+pushq $1
+// CHECK: encoding: [0x6a,0x01]
+pushq $1111111
+// CHECK: encoding: [0x68,0x47,0xf4,0x10,0x00]
+
+// rdar://8017530
+// CHECK: sldtw 4
+sldt  4
+
+// rdar://8208499
+// CHECK: cmovnew %bx, %ax
+cmovnz %bx, %ax
+// CHECK: cmovneq %rbx, %rax
+cmovnzq %rbx, %rax
+
+
+// rdar://8407928
+// CHECK: inb $127, %al
+// CHECK: inw %dx, %ax
+// CHECK: outb  %al, $127
+// CHECK: outw  %ax, %dx
+// CHECK: inl %dx, %eax
+inb $0x7f
+inw %dx
+outb  $0x7f
+outw  %dx
+inl %dx
+
+
+// PR8114
+// CHECK: outb  %al, %dx
+// CHECK: outb  %al, %dx
+// CHECK: outw  %ax, %dx
+// CHECK: outw  %ax, %dx
+// CHECK: outl  %eax, %dx
+// CHECK: outl  %eax, %dx
+
+out  %al, (%dx)
+outb  %al, (%dx)
+out  %ax, (%dx)
+outw  %ax, (%dx)
+out  %eax, (%dx)
+outl  %eax, (%dx)
+
+// CHECK: inb %dx, %al
+// CHECK: inb %dx, %al
+// CHECK: inw %dx, %ax
+// CHECK: inw %dx, %ax
+// CHECK: inl %dx, %eax
+// CHECK: inl %dx, %eax
+
+in  (%dx), %al
+inb  (%dx), %al
+in  (%dx), %ax
+inw  (%dx), %ax
+in  (%dx), %eax
+inl  (%dx), %eax
+
+//PR15455
+
+// permitted invalid memory forms 
+outs  (%rsi), (%dx) 
+// CHECK: outsw (%rsi), %dx
+outsb  (%rsi), (%dx)
+// CHECK: outsb (%rsi), %dx
+outsw  (%rsi), (%dx)
+// CHECK: outsw (%rsi), %dx
+outsl  (%rsi), (%dx)
+// CHECK: outsl (%rsi), %dx
+
+ins  (%dx), %es:(%rdi)
+// CHECK: insw  %dx, %es:(%rdi)
+insb  (%dx), %es:(%rdi)
+// CHECK: insb  %dx, %es:(%rdi)
+insw  (%dx), %es:(%rdi)
+// CHECK: insw  %dx, %es:(%rdi)
+insl  (%dx), %es:(%rdi)
+// CHECK: insl  %dx, %es:(%rdi) 
+
+// rdar://8431422
+
+// CHECK: fxch %st(1)
+// CHECK: fucom %st(1)
+// CHECK: fucomp %st(1)
+// CHECK: faddp %st(1)
+// CHECK: faddp %st(0)
+// CHECK: fsubp %st(1)
+// CHECK: fsubrp %st(1)
+// CHECK: fmulp %st(1)
+// CHECK: fdivp %st(1)
+// CHECK: fdivrp %st(1)
+
+fxch
+fucom
+fucomp
+faddp
+faddp %st
+fsubp
+fsubrp
+fmulp
+fdivp
+fdivrp
+
+// CHECK: fcomi %st(1)
+// CHECK: fcomi %st(2)
+// CHECK: fucomi %st(1)
+// CHECK: fucomi %st(2)
+// CHECK: fucomi %st(2)
+
+fcomi
+fcomi  %st(2)
+fucomi
+fucomi  %st(2)
+fucomi  %st(2), %st
+
+// CHECK: fnstsw %ax
+// CHECK: fnstsw %ax
+// CHECK: fnstsw %ax
+// CHECK: fnstsw %ax
+
+fnstsw
+fnstsw %ax
+fnstsw %eax
+fnstsw %al
+
+// rdar://8431880
+// CHECK: rclb  %bl
+// CHECK: rcll  3735928559(%ebx,%ecx,8)
+// CHECK: rcrl  %ecx
+// CHECK: rcrl  305419896
+rcl %bl
+rcll  0xdeadbeef(%ebx,%ecx,8)
+rcr %ecx
+rcrl  0x12345678
+
+rclb  %bl       // CHECK: rclb %bl     # encoding: [0xd0,0xd3]
+rclb  $1, %bl   // CHECK: rclb %bl     # encoding: [0xd0,0xd3]
+rclb  $2, %bl   // CHECK: rclb $2, %bl # encoding: [0xc0,0xd3,0x02]
+
+// rdar://8418316
+// PR12173
+// CHECK: shldw %cl, %bx, %dx
+// CHECK: shldw %cl, %bx, %dx
+// CHECK: shldw $1, %bx, %dx
+// CHECK: shldw %cl, %bx, (%rax)
+// CHECK: shldw %cl, %bx, (%rax)
+// CHECK: shrdw %cl, %bx, %dx
+// CHECK: shrdw %cl, %bx, %dx
+// CHECK: shrdw $1, %bx, %dx
+// CHECK: shrdw %cl, %bx, (%rax)
+// CHECK: shrdw %cl, %bx, (%rax)
+
+shld  %bx, %dx
+shld  %cl, %bx, %dx
+shld  $1, %bx, %dx
+shld  %bx, (%rax)
+shld  %cl, %bx, (%rax)
+shrd  %bx, %dx
+shrd  %cl, %bx, %dx
+shrd  $1, %bx, %dx
+shrd  %bx, (%rax)
+shrd  %cl, %bx, (%rax)
+
+// CHECK: sldtl %ecx
+// CHECK: encoding: [0x0f,0x00,0xc1]
+// CHECK: sldtw %cx
+// CHECK: encoding: [0x66,0x0f,0x00,0xc1]
+
+sldt  %ecx
+sldt  %cx
+
+// CHECK: lcalll  *3135175374 
+// CHECK: ljmpl *3135175374
+lcall  *0xbadeface
+ljmp  *0xbadeface
+
+
+// rdar://8444631
+// CHECK: enter $31438, $0
+// CHECK: encoding: [0xc8,0xce,0x7a,0x00]
+// CHECK: enter $31438, $1
+// CHECK: encoding: [0xc8,0xce,0x7a,0x01]
+// CHECK: enter $31438, $127
+// CHECK: encoding: [0xc8,0xce,0x7a,0x7f]
+enter $0x7ace,$0
+enter $0x7ace,$1
+enter $0x7ace,$0x7f
+
+
+// rdar://8456364
+// CHECK: movw  %cs, %ax
+mov %CS, %ax
+
+// rdar://8456391
+fcmovb %st(1), %st(0)   // CHECK: fcmovb  %st(1), %st(0)
+fcmove %st(1), %st(0)   // CHECK: fcmove  %st(1), %st(0)
+fcmovbe %st(1), %st(0)  // CHECK: fcmovbe  %st(1), %st(0)
+fcmovu %st(1), %st(0)   // CHECK: fcmovu   %st(1), %st(0)
+
+fcmovnb %st(1), %st(0)  // CHECK: fcmovnb  %st(1), %st(0)
+fcmovne %st(1), %st(0)  // CHECK: fcmovne  %st(1), %st(0)
+fcmovnbe %st(1), %st(0) // CHECK: fcmovnbe  %st(1), %st(0)
+fcmovnu %st(1), %st(0)  // CHECK: fcmovnu  %st(1), %st(0)
+
+fcmovnae %st(1), %st(0) // CHECK: fcmovb  %st(1), %st(0)
+fcmovna %st(1), %st(0)  // CHECK: fcmovbe  %st(1), %st(0)
+
+fcmovae %st(1), %st(0)  // CHECK: fcmovnb  %st(1), %st(0)
+fcmova %st(1), %st(0)   // CHECK: fcmovnbe  %st(1), %st(0)
+
+// rdar://8456417
+.byte (88 + 1) & 15  // CHECK: .byte  9
+
+// rdar://8456412
+mov %rdx, %cr0
+// CHECK: movq  %rdx, %cr0
+// CHECK: encoding: [0x0f,0x22,0xc2]
+mov %rdx, %cr4
+// CHECK: movq  %rdx, %cr4
+// CHECK: encoding: [0x0f,0x22,0xe2]
+mov %rdx, %cr8
+// CHECK: movq  %rdx, %cr8
+// CHECK: encoding: [0x44,0x0f,0x22,0xc2]
+mov %rdx, %cr15
+// CHECK: movq  %rdx, %cr15
+// CHECK: encoding: [0x44,0x0f,0x22,0xfa]
+
+// rdar://8456371 - Handle commutable instructions written backward.
+// CHECK:   faddp %st(1)
+// CHECK: fmulp %st(2)
+faddp %st, %st(1)
+fmulp %st, %st(2)
+
+// rdar://8468087 - Encode these accurately, they are not synonyms.
+// CHECK: fmul  %st(0), %st(1)
+// CHECK: encoding: [0xdc,0xc9]
+// CHECK: fmul  %st(1)
+// CHECK: encoding: [0xd8,0xc9]
+fmul %st, %st(1)
+fmul %st(1), %st
+
+// CHECK: fadd  %st(0), %st(1)
+// CHECK: encoding: [0xdc,0xc1]
+// CHECK: fadd  %st(1)
+// CHECK: encoding: [0xd8,0xc1]
+fadd %st, %st(1)
+fadd %st(1), %st
+
+
+// rdar://8416805
+// CHECK: xorb  %al, %al
+// CHECK: encoding: [0x30,0xc0]
+// CHECK: xorw  %di, %di
+// CHECK: encoding: [0x66,0x31,0xff]
+// CHECK: xorl  %esi, %esi
+// CHECK: encoding: [0x31,0xf6]
+// CHECK: xorq  %rsi, %rsi
+// CHECK: encoding: [0x48,0x31,0xf6]
+clrb    %al
+clr    %di
+clr    %esi
+clr    %rsi
+
+// rdar://8456378
+cltq  // CHECK: cltq
+cdqe  // CHECK: cltq
+cwde  // CHECK: cwtl
+cwtl  // CHECK: cwtl
+
+// rdar://8416805
+cbw   // CHECK: cbtw
+cwd   // CHECK: cwtd
+cdq   // CHECK: cltd
+cqo   // CHECK: cqto
+
+// rdar://8456378 and PR7557 - fstsw
+fstsw %ax
+// CHECK: wait
+// CHECK: fnstsw
+fstsw (%rax)
+// CHECK: wait
+// CHECK: fnstsw (%rax)
+
+// PR8259
+fstcw (%rsp)
+// CHECK: wait
+// CHECK: fnstcw (%rsp)
+
+// PR8259
+fstcw (%rsp)
+// CHECK: wait
+// CHECK: fnstcw (%rsp)
+
+// PR8258
+finit
+// CHECK: wait
+// CHECK: fninit
+
+fsave 32493
+// CHECK: wait
+// CHECK: fnsave 32493
+
+
+// rdar://8456382 - cvtsd2si support.
+cvtsd2si  %xmm1, %rax
+// CHECK: cvtsd2si  %xmm1, %rax
+// CHECK: encoding: [0xf2,0x48,0x0f,0x2d,0xc1]
+cvtsd2si  %xmm1, %eax
+// CHECK: cvtsd2si  %xmm1, %eax
+// CHECK: encoding: [0xf2,0x0f,0x2d,0xc1]
+
+cvtsd2siq %xmm0, %rax // CHECK: cvtsd2si  %xmm0, %rax
+cvtsd2sil %xmm0, %eax // CHECK: cvtsd2si  %xmm0, %eax
+cvtsd2si %xmm0, %rax  // CHECK: cvtsd2si  %xmm0, %rax
+
+
+cvttpd2dq %xmm1, %xmm0  // CHECK: cvttpd2dq %xmm1, %xmm0
+cvttpd2dq (%rax), %xmm0 // CHECK: cvttpd2dq (%rax), %xmm0
+
+cvttps2dq %xmm1, %xmm0  // CHECK: cvttps2dq %xmm1, %xmm0
+cvttps2dq (%rax), %xmm0 // CHECK: cvttps2dq (%rax), %xmm0
+
+// rdar://8456376 - llvm-mc rejects 'roundss'
+roundss $0xE, %xmm0, %xmm0 // CHECK: encoding: [0x66,0x0f,0x3a,0x0a,0xc0,0x0e]
+roundps $0xE, %xmm0, %xmm0 // CHECK: encoding: [0x66,0x0f,0x3a,0x08,0xc0,0x0e]
+roundsd $0xE, %xmm0, %xmm0 // CHECK: encoding: [0x66,0x0f,0x3a,0x0b,0xc0,0x0e]
+roundpd $0xE, %xmm0, %xmm0 // CHECK: encoding: [0x66,0x0f,0x3a,0x09,0xc0,0x0e]
+
+
+// rdar://8482675 - 32-bit mem operand support in 64-bit mode (0x67 prefix)
+leal  8(%eax), %esi
+// CHECK: leal  8(%eax), %esi
+// CHECK: encoding: [0x67,0x8d,0x70,0x08]
+leaq  8(%eax), %rsi
+// CHECK: leaq  8(%eax), %rsi
+// CHECK: encoding: [0x67,0x48,0x8d,0x70,0x08]
+leaq  8(%rax), %rsi
+// CHECK: leaq  8(%rax), %rsi
+// CHECK: encoding: [0x48,0x8d,0x70,0x08]
+
+
+cvttpd2dq  0xdeadbeef(%ebx,%ecx,8),%xmm5
+// CHECK: cvttpd2dq 3735928559(%ebx,%ecx,8), %xmm5
+// CHECK: encoding: [0x67,0x66,0x0f,0xe6,0xac,0xcb,0xef,0xbe,0xad,0xde]
+
+// rdar://8490728 - llvm-mc rejects 'movmskpd'
+movmskpd  %xmm6, %rax
+// CHECK: movmskpd  %xmm6, %eax
+// CHECK: encoding: [0x66,0x0f,0x50,0xc6]
+movmskpd  %xmm6, %eax
+// CHECK: movmskpd  %xmm6, %eax
+// CHECK: encoding: [0x66,0x0f,0x50,0xc6]
+
+// rdar://8491845 - Gas supports commuted forms of non-commutable instructions.
+fdivrp %st(0), %st(1) // CHECK: encoding: [0xde,0xf9]
+fdivrp %st(1), %st(0) // CHECK: encoding: [0xde,0xf9]
+
+fsubrp %ST(0), %ST(1) // CHECK: encoding: [0xde,0xe9]
+fsubrp %ST(1), %ST(0) // CHECK: encoding: [0xde,0xe9]
+
+// also PR8861
+fdivp %st(0), %st(1) // CHECK: encoding: [0xde,0xf1]
+fdivp %st(1), %st(0) // CHECK: encoding: [0xde,0xf1]
+
+
+movl  foo(%rip), %eax
+// CHECK: movl  foo(%rip), %eax
+// CHECK: encoding: [0x8b,0x05,A,A,A,A]
+// CHECK: fixup A - offset: 2, value: foo-4, kind: reloc_riprel_4byte
+
+movb  $12, foo(%rip)
+// CHECK: movb  $12, foo(%rip)
+// CHECK: encoding: [0xc6,0x05,A,A,A,A,0x0c]
+// CHECK:    fixup A - offset: 2, value: foo-5, kind: reloc_riprel_4byte
+
+movw  $12, foo(%rip)
+// CHECK: movw  $12, foo(%rip)
+// CHECK: encoding: [0x66,0xc7,0x05,A,A,A,A,0x0c,0x00]
+// CHECK:    fixup A - offset: 3, value: foo-6, kind: reloc_riprel_4byte
+
+movl  $12, foo(%rip)
+// CHECK: movl  $12, foo(%rip)
+// CHECK: encoding: [0xc7,0x05,A,A,A,A,0x0c,0x00,0x00,0x00]
+// CHECK:    fixup A - offset: 2, value: foo-8, kind: reloc_riprel_4byte
+
+movq  $12, foo(%rip)
+// CHECK:  movq $12, foo(%rip)
+// CHECK: encoding: [0x48,0xc7,0x05,A,A,A,A,0x0c,0x00,0x00,0x00]
+// CHECK:    fixup A - offset: 3, value: foo-8, kind: reloc_riprel_4byte
+
+movl  foo(%eip), %eax
+// CHECK: movl  foo(%eip), %eax
+// CHECK: encoding: [0x67,0x8b,0x05,A,A,A,A]
+// CHECK: fixup A - offset: 3, value: foo-4, kind: reloc_riprel_4byte
+
+movb  $12, foo(%eip)
+// CHECK: movb  $12, foo(%eip)
+// CHECK: encoding: [0x67,0xc6,0x05,A,A,A,A,0x0c]
+// CHECK:    fixup A - offset: 3, value: foo-5, kind: reloc_riprel_4byte
+
+movw  $12, foo(%eip)
+// CHECK: movw  $12, foo(%eip)
+// CHECK: encoding: [0x67,0x66,0xc7,0x05,A,A,A,A,0x0c,0x00]
+// CHECK:    fixup A - offset: 4, value: foo-6, kind: reloc_riprel_4byte
+
+movl  $12, foo(%eip)
+// CHECK: movl  $12, foo(%eip)
+// CHECK: encoding: [0x67,0xc7,0x05,A,A,A,A,0x0c,0x00,0x00,0x00]
+// CHECK:    fixup A - offset: 3, value: foo-8, kind: reloc_riprel_4byte
+
+movq  $12, foo(%eip)
+// CHECK:  movq $12, foo(%eip)
+// CHECK: encoding: [0x67,0x48,0xc7,0x05,A,A,A,A,0x0c,0x00,0x00,0x00]
+// CHECK:    fixup A - offset: 4, value: foo-8, kind: reloc_riprel_4byte
+
+// CHECK: addq  $-424, %rax
+// CHECK: encoding: [0x48,0x05,0x58,0xfe,0xff,0xff]
+addq $-424, %rax
+
+
+// CHECK: movq  _foo@GOTPCREL(%rip), %rax
+// CHECK:  encoding: [0x48,0x8b,0x05,A,A,A,A]
+// CHECK:  fixup A - offset: 3, value: _foo@GOTPCREL-4, kind: reloc_riprel_4byte_movq_load
+movq _foo@GOTPCREL(%rip), %rax
+
+// CHECK: movq  _foo@GOTPCREL(%rip), %r14
+// CHECK:  encoding: [0x4c,0x8b,0x35,A,A,A,A]
+// CHECK:  fixup A - offset: 3, value: _foo@GOTPCREL-4, kind: reloc_riprel_4byte_movq_load
+movq _foo@GOTPCREL(%rip), %r14
+
+// CHECK: movq  _foo@GOTPCREL(%eip), %rax
+// CHECK:  encoding: [0x67,0x48,0x8b,0x05,A,A,A,A]
+// CHECK:  fixup A - offset: 4, value: _foo@GOTPCREL-4, kind: reloc_riprel_4byte_movq_load
+movq _foo@GOTPCREL(%eip), %rax
+
+// CHECK: movq  _foo@GOTPCREL(%eip), %r14
+// CHECK:  encoding: [0x67,0x4c,0x8b,0x35,A,A,A,A]
+// CHECK:  fixup A - offset: 4, value: _foo@GOTPCREL-4, kind: reloc_riprel_4byte_movq_load
+movq _foo@GOTPCREL(%eip), %r14
+
+// CHECK: movq  (%r13,%rax,8), %r13
+// CHECK:  encoding: [0x4d,0x8b,0x6c,0xc5,0x00]
+movq 0x00(%r13,%rax,8),%r13
+
+// CHECK: testq %rax, %rbx
+// CHECK:  encoding: [0x48,0x85,0xc3]
+testq %rax, %rbx
+
+// CHECK: cmpq  %rbx, %r14
+// CHECK:   encoding: [0x49,0x39,0xde]
+        cmpq %rbx, %r14
+
+// rdar://7947167
+
+movsq
+// CHECK: movsq
+// CHECK:   encoding: [0x48,0xa5]
+
+movsl
+// CHECK: movsl
+// CHECK:   encoding: [0xa5]
+
+stosq
+// CHECK: stosq
+// CHECK:   encoding: [0x48,0xab]
+stosl
+// CHECK: stosl
+// CHECK:   encoding: [0xab]
+
+
+// Not moffset forms of moves, they are x86-32 only! rdar://7947184
+movb  0, %al    // CHECK: movb 0, %al # encoding: [0x8a,0x04,0x25,0x00,0x00,0x00,0x00]
+movw  0, %ax    // CHECK: movw 0, %ax # encoding: [0x66,0x8b,0x04,0x25,0x00,0x00,0x00,0x00]
+movl  0, %eax   // CHECK: movl 0, %eax # encoding: [0x8b,0x04,0x25,0x00,0x00,0x00,0x00]
+
+// CHECK: pushfq  # encoding: [0x9c]
+        pushf
+// CHECK: pushfq  # encoding: [0x9c]
+        pushfq
+// CHECK: popfq         # encoding: [0x9d]
+        popf
+// CHECK: popfq         # encoding: [0x9d]
+        popfq
+
+// CHECK: movabsq $-281474976710654, %rax
+// CHECK: encoding: [0x48,0xb8,0x02,0x00,0x00,0x00,0x00,0x00,0xff,0xff]
+        movabsq $0xFFFF000000000002, %rax
+
+// CHECK: movabsq $-281474976710654, %rax
+// CHECK: encoding: [0x48,0xb8,0x02,0x00,0x00,0x00,0x00,0x00,0xff,0xff]
+        movq $0xFFFF000000000002, %rax
+
+// CHECK: movq $-65536, %rax
+// CHECK: encoding: [0x48,0xc7,0xc0,0x00,0x00,0xff,0xff]
+        movq $0xFFFFFFFFFFFF0000, %rax
+
+// CHECK: movq $-256, %rax
+// CHECK: encoding: [0x48,0xc7,0xc0,0x00,0xff,0xff,0xff]
+        movq $0xFFFFFFFFFFFFFF00, %rax
+
+// CHECK: movq $10, %rax
+// CHECK: encoding: [0x48,0xc7,0xc0,0x0a,0x00,0x00,0x00]
+        movq $10, %rax
+
+// CHECK: movabsb -6066930261531658096, %al
+// CHECK: encoding: [0xa0,0x90,0x78,0x56,0x34,0x12,0xef,0xcd,0xab]
+        movabsb 0xabcdef1234567890,%al
+
+// CHECK: movabsw -6066930261531658096, %ax
+// CHECK: encoding: [0x66,0xa1,0x90,0x78,0x56,0x34,0x12,0xef,0xcd,0xab]
+        movabsw 0xabcdef1234567890,%ax
+
+// CHECK: movabsl -6066930261531658096, %eax
+// CHECK: encoding: [0xa1,0x90,0x78,0x56,0x34,0x12,0xef,0xcd,0xab]
+        movabsl 0xabcdef1234567890,%eax
+
+// CHECK: movabsq -6066930261531658096, %rax
+// CHECK: encoding: [0x48,0xa1,0x90,0x78,0x56,0x34,0x12,0xef,0xcd,0xab]
+        movabsq 0xabcdef1234567890, %rax
+
+// CHECK: movabsb %al, -6066930261531658096
+// CHECK: encoding: [0xa2,0x90,0x78,0x56,0x34,0x12,0xef,0xcd,0xab]
+        movabsb %al,0xabcdef1234567890
+
+// CHECK: movabsw %ax, -6066930261531658096
+// CHECK: encoding: [0x66,0xa3,0x90,0x78,0x56,0x34,0x12,0xef,0xcd,0xab]
+        movabsw %ax,0xabcdef1234567890
+
+// CHECK: movabsl %eax, -6066930261531658096
+// CHECK: encoding: [0xa3,0x90,0x78,0x56,0x34,0x12,0xef,0xcd,0xab]
+        movabsl %eax,0xabcdef1234567890
+
+// CHECK: movabsq %rax, -6066930261531658096
+// CHECK: encoding: [0x48,0xa3,0x90,0x78,0x56,0x34,0x12,0xef,0xcd,0xab]
+        movabsq %rax,0xabcdef1234567890
+
+// rdar://8014869
+//
+// CHECK: ret
+// CHECK:  encoding: [0xc3]
+        retq
+
+// CHECK: sete %al
+// CHECK: encoding: [0x0f,0x94,0xc0]
+        setz %al
+
+// CHECK: setne %al
+// CHECK: encoding: [0x0f,0x95,0xc0]
+        setnz %al
+
+// CHECK: je 0
+// CHECK: encoding: [0x74,A]
+        jz 0
+
+// CHECK: jne
+// CHECK: encoding: [0x75,A]
+        jnz 0
+
+// PR9264
+btl  $1, 0 // CHECK: btl $1, 0 # encoding: [0x0f,0xba,0x24,0x25,0x00,0x00,0x00,0x00,0x01]
+bt  $1, 0 // CHECK: btl $1, 0 # encoding: [0x0f,0xba,0x24,0x25,0x00,0x00,0x00,0x00,0x01]
+
+// rdar://8017515
+btq $0x01,%rdx
+// CHECK: btq $1, %rdx
+// CHECK:  encoding: [0x48,0x0f,0xba,0xe2,0x01]
+
+//rdar://8017633
+// CHECK: movzbl  %al, %esi
+// CHECK:  encoding: [0x0f,0xb6,0xf0]
+        movzx %al, %esi
+
+// CHECK: movzbq  %al, %rsi
+// CHECK:  encoding: [0x48,0x0f,0xb6,0xf0]
+        movzx %al, %rsi
+
+// CHECK: movsbw  %al, %ax
+// CHECK: encoding: [0x66,0x0f,0xbe,0xc0]
+movsx %al, %ax
+
+// CHECK: movsbl  %al, %eax
+// CHECK: encoding: [0x0f,0xbe,0xc0]
+movsx %al, %eax
+
+// CHECK: movswl  %ax, %eax
+// CHECK: encoding: [0x0f,0xbf,0xc0]
+movsx %ax, %eax
+
+// CHECK: movsbq  %bl, %rax
+// CHECK: encoding: [0x48,0x0f,0xbe,0xc3]
+movsx %bl, %rax
+
+// CHECK: movswq %cx, %rax
+// CHECK: encoding: [0x48,0x0f,0xbf,0xc1]
+movsx %cx, %rax
+
+// CHECK: movslq  %edi, %rax
+// CHECK: encoding: [0x48,0x63,0xc7]
+movsx %edi, %rax
+
+// CHECK: movzbw  %al, %ax
+// CHECK: encoding: [0x66,0x0f,0xb6,0xc0]
+movzx %al, %ax
+
+// CHECK: movzbl  %al, %eax
+// CHECK: encoding: [0x0f,0xb6,0xc0]
+movzx %al, %eax
+
+// CHECK: movzwl  %ax, %eax
+// CHECK: encoding: [0x0f,0xb7,0xc0]
+movzx %ax, %eax
+
+// CHECK: movzbq  %bl, %rax
+// CHECK: encoding: [0x48,0x0f,0xb6,0xc3]
+movzx %bl, %rax
+
+// CHECK: movzwq  %cx, %rax
+// CHECK: encoding: [0x48,0x0f,0xb7,0xc1]
+movzx %cx, %rax
+
+// CHECK: movsbw  (%rax), %ax
+// CHECK: encoding: [0x66,0x0f,0xbe,0x00]
+movsx (%rax), %ax
+
+// CHECK: movzbw  (%rax), %ax
+// CHECK: encoding: [0x66,0x0f,0xb6,0x00]
+movzx (%rax), %ax
+
+
+// rdar://7873482
+// CHECK: [0x65,0x8b,0x04,0x25,0x7c,0x00,0x00,0x00]
+        movl  %gs:124, %eax
+
+// CHECK: jmpq *8(%rax)
+// CHECK:   encoding: [0xff,0x60,0x08]
+  jmp  *8(%rax)
+
+// CHECK: btq $61, -216(%rbp)
+// CHECK:   encoding: [0x48,0x0f,0xba,0xa5,0x28,0xff,0xff,0xff,0x3d]
+  btq  $61, -216(%rbp)
+
+
+// rdar://8061602
+L1:
+  jecxz L1
+// CHECK: jecxz L1
+// CHECK:   encoding: [0x67,0xe3,A]
+  jrcxz L1
+// CHECK: jrcxz L1
+// CHECK:   encoding: [0xe3,A]
+
+// PR8061
+xchgl   368(%rax),%ecx
+// CHECK: xchgl %ecx, 368(%rax)
+xchgl   %ecx, 368(%rax)
+// CHECK: xchgl %ecx, 368(%rax)
+
+// rdar://8407548
+xchg  0xdeadbeef(%rbx,%rcx,8),%bl
+// CHECK: xchgb %bl, 3735928559(%rbx,%rcx,8)
+
+
+
+// PR7254
+lock  incl 1(%rsp)
+// CHECK: lock
+// CHECK: incl 1(%rsp)
+
+// rdar://8741045
+lock/incl 1(%rsp)
+// CHECK: lock
+// CHECK: incl 1(%rsp)
+
+
+lock addq %rsi, (%rdi)
+// CHECK: lock
+// CHECK: encoding: [0xf0]
+// CHECK: addq %rsi, (%rdi)
+// CHECK: encoding: [0x48,0x01,0x37]
+
+lock subq %rsi, (%rdi)
+// CHECK: lock
+// CHECK: encoding: [0xf0]
+// CHECK: subq %rsi, (%rdi)
+// CHECK: encoding: [0x48,0x29,0x37]
+
+lock andq %rsi, (%rdi)
+// CHECK: lock
+// CHECK: encoding: [0xf0]
+// CHECK: andq %rsi, (%rdi)
+// CHECK: encoding: [0x48,0x21,0x37]
+
+lock orq %rsi, (%rdi)
+// CHECK: lock
+// CHECK: encoding: [0xf0]
+// CHECK: orq %rsi, (%rdi)
+// CHECK: encoding: [0x48,0x09,0x37]
+
+lock xorq %rsi, (%rdi)
+// CHECK: lock
+// CHECK: encoding: [0xf0]
+// CHECK: xorq %rsi, (%rdi)
+// CHECK: encoding: [0x48,0x31,0x37]
+
+
+// rdar://8033482
+rep movsl
+// CHECK: rep
+// CHECK: encoding: [0xf3]
+// CHECK: movsl
+// CHECK: encoding: [0xa5]
+
+
+// rdar://8403974
+iret
+// CHECK: iretl
+// CHECK: encoding: [0xcf]
+iretw
+// CHECK: iretw
+// CHECK: encoding: [0x66,0xcf]
+iretl
+// CHECK: iretl
+// CHECK: encoding: [0xcf]
+iretq
+// CHECK: iretq
+// CHECK: encoding: [0x48,0xcf]
+
+// rdar://8416805
+// CHECK: retw  $31438
+// CHECK:  encoding: [0x66,0xc2,0xce,0x7a]
+          retw  $0x7ace
+
+// CHECK: lretw $31438
+// CHECK:  encoding: [0x66,0xca,0xce,0x7a]
+          lretw $0x7ace
+
+// PR8592
+lretq  // CHECK: lretq # encoding: [0x48,0xcb]
+lretl  // CHECK: lretl # encoding: [0xcb]
+lret   // CHECK: lretl # encoding: [0xcb]
+lretw  // CHECK: lretw # encoding: [0x66,0xcb]
+
+// rdar://8403907
+sysret
+// CHECK: sysretl
+// CHECK: encoding: [0x0f,0x07]
+sysretl
+// CHECK: sysretl
+// CHECK: encoding: [0x0f,0x07]
+sysretq
+// CHECK: sysretq
+// CHECK: encoding: [0x48,0x0f,0x07]
+
+// rdar://8407242
+push %fs
+// CHECK: pushq %fs
+// CHECK: encoding: [0x0f,0xa0]
+push %gs
+// CHECK: pushq %gs
+// CHECK: encoding: [0x0f,0xa8]
+
+pushw %fs
+// CHECK: pushw %fs
+// CHECK: encoding: [0x66,0x0f,0xa0]
+pushw %gs
+// CHECK: pushw %gs
+// CHECK: encoding: [0x66,0x0f,0xa8]
+
+
+pop %fs
+// CHECK: popq  %fs
+// CHECK: encoding: [0x0f,0xa1]
+pop %gs
+// CHECK: popq  %gs
+// CHECK: encoding: [0x0f,0xa9]
+
+popw %fs
+// CHECK: popw  %fs
+// CHECK: encoding: [0x66,0x0f,0xa1]
+popw %gs
+// CHECK: popw  %gs
+// CHECK: encoding: [0x66,0x0f,0xa9]
+
+// rdar://8438816
+fildq -8(%rsp)
+fildll -8(%rsp)
+// CHECK: fildll  -8(%rsp)
+// CHECK: encoding: [0xdf,0x6c,0x24,0xf8]
+// CHECK: fildll  -8(%rsp)
+// CHECK: encoding: [0xdf,0x6c,0x24,0xf8]
+
+// CHECK: callq a
+        callq a
+
+// CHECK: leaq  -40(%rbp), %r15
+  leaq  -40(%rbp), %r15
+
+
+
+// rdar://8013734 - Alias dr6=db6
+mov %dr6, %rax
+mov %db6, %rax
+// CHECK: movq  %dr6, %rax
+// CHECK: movq  %dr6, %rax
+
+
+// INC/DEC encodings.
+incb %al  // CHECK:  incb  %al # encoding: [0xfe,0xc0]
+incw %ax  // CHECK:  incw  %ax # encoding: [0x66,0xff,0xc0]
+incl %eax // CHECK:  incl  %eax # encoding: [0xff,0xc0]
+decb %al  // CHECK:  decb  %al # encoding: [0xfe,0xc8]
+decw %ax  // CHECK:  decw  %ax # encoding: [0x66,0xff,0xc8]
+decl %eax // CHECK:  decl  %eax # encoding: [0xff,0xc8]
+
+// rdar://8416805
+// CHECK: lgdtq 4(%rax)
+// CHECK:  encoding: [0x0f,0x01,0x50,0x04]
+          lgdt  4(%rax)
+
+// CHECK: lgdtq 4(%rax)
+// CHECK:  encoding: [0x0f,0x01,0x50,0x04]
+          lgdtq  4(%rax)
+
+// CHECK: lidtq 4(%rax)
+// CHECK:  encoding: [0x0f,0x01,0x58,0x04]
+          lidt  4(%rax)
+
+// CHECK: lidtq 4(%rax)
+// CHECK:  encoding: [0x0f,0x01,0x58,0x04]
+          lidtq  4(%rax)
+
+// CHECK: sgdtq 4(%rax)
+// CHECK:  encoding: [0x0f,0x01,0x40,0x04]
+          sgdt  4(%rax)
+
+// CHECK: sgdtq 4(%rax)
+// CHECK:  encoding: [0x0f,0x01,0x40,0x04]
+          sgdtq  4(%rax)
+
+// CHECK: sidtq 4(%rax)
+// CHECK:  encoding: [0x0f,0x01,0x48,0x04]
+          sidt  4(%rax)
+
+// CHECK: sidtq 4(%rax)
+// CHECK:  encoding: [0x0f,0x01,0x48,0x04]
+          sidtq  4(%rax)
+
+
+// rdar://8208615
+mov (%rsi), %gs  // CHECK: movl  (%rsi), %gs # encoding: [0x8e,0x2e]
+mov %gs, (%rsi)  // CHECK: movl  %gs, (%rsi) # encoding: [0x8c,0x2e]
+
+
+// rdar://8431864
+//CHECK: divb %bl
+//CHECK: divw %bx
+//CHECK: divl %ecx
+//CHECK: divl 3735928559(%ebx,%ecx,8)
+//CHECK: divl 69
+//CHECK: divl 32493
+//CHECK: divl 3133065982
+//CHECK: divl 305419896
+//CHECK: idivb  %bl
+//CHECK: idivw  %bx
+//CHECK: idivl  %ecx
+//CHECK: idivl  3735928559(%ebx,%ecx,8)
+//CHECK: idivl  69
+//CHECK: idivl  32493
+//CHECK: idivl  3133065982
+//CHECK: idivl  305419896
+  div  %bl,%al
+  div  %bx,%ax
+  div  %ecx,%eax
+  div  0xdeadbeef(%ebx,%ecx,8),%eax
+  div 0x45,%eax
+  div 0x7eed,%eax
+  div 0xbabecafe,%eax
+  div 0x12345678,%eax
+  idiv  %bl,%al
+  idiv  %bx,%ax
+  idiv  %ecx,%eax
+  idiv  0xdeadbeef(%ebx,%ecx,8),%eax
+  idiv  0x45,%eax
+  idiv  0x7eed,%eax
+  idiv  0xbabecafe,%eax
+  idiv  0x12345678,%eax
+
+// PR8524
+movd  %rax, %mm5 // CHECK: movd %rax, %mm5 # encoding: [0x48,0x0f,0x6e,0xe8]
+movd  %mm5, %rbx // CHECK: movd %mm5, %rbx # encoding: [0x48,0x0f,0x7e,0xeb]
+movq  %rax, %mm5 // CHECK: movd %rax, %mm5 # encoding: [0x48,0x0f,0x6e,0xe8]
+movq  %mm5, %rbx // CHECK: movd %mm5, %rbx # encoding: [0x48,0x0f,0x7e,0xeb]
+
+rex64 // CHECK: rex64 # encoding: [0x48]
+data16 // CHECK: data16 # encoding: [0x66]
+
+// CHECK: data16
+// CHECK: encoding: [0x66]
+// CHECK: lgdtq 4(%rax)
+// CHECK:  encoding: [0x0f,0x01,0x50,0x04]
+data16 lgdt 4(%rax)
+
+// PR8855
+movq 18446744073709551615,%rbx   // CHECK: movq  -1, %rbx
+
+// PR8946
+movdqu  %xmm0, %xmm1 // CHECK: movdqu  %xmm0, %xmm1 # encoding: [0xf3,0x0f,0x6f,0xc8]
+
+// PR8935
+xgetbv // CHECK: xgetbv # encoding: [0x0f,0x01,0xd0]
+xsetbv // CHECK: xsetbv # encoding: [0x0f,0x01,0xd1]
+
+// CHECK: loope 0
+// CHECK: encoding: [0xe1,A]
+  loopz 0
+
+// CHECK: loopne 0
+// CHECK: encoding: [0xe0,A]
+  loopnz 0
+
+// CHECK: outsb (%rsi), %dx # encoding: [0x6e]
+// CHECK: outsb
+// CHECK: outsb
+  outsb
+  outsb %ds:(%rsi), %dx
+  outsb (%rsi), %dx
+
+// CHECK: outsw (%rsi), %dx # encoding: [0x66,0x6f]
+// CHECK: outsw
+// CHECK: outsw
+  outsw
+  outsw  %ds:(%rsi), %dx
+  outsw  (%rsi), %dx
+
+// CHECK: outsl (%rsi), %dx # encoding: [0x6f]
+// CHECK: outsl
+  outsl
+  outsl  %ds:(%rsi), %dx
+  outsl  (%rsi), %dx
+
+// CHECK: insb  %dx, %es:(%rdi) # encoding: [0x6c]
+// CHECK: insb
+  insb
+  insb  %dx, %es:(%rdi)
+
+// CHECK: insw  %dx, %es:(%rdi) # encoding: [0x66,0x6d]
+// CHECK: insw
+  insw
+  insw  %dx, %es:(%rdi)
+
+// CHECK: insl %dx, %es:(%rdi) # encoding: [0x6d]
+// CHECK: insl
+  insl
+  insl  %dx, %es:(%rdi)
+
+// CHECK: movsb (%rsi), %es:(%rdi) # encoding: [0xa4]
+// CHECK: movsb
+// CHECK: movsb
+  movsb
+  movsb  %ds:(%rsi), %es:(%rdi)
+  movsb  (%rsi), %es:(%rdi)
+
+// CHECK: movsw (%rsi), %es:(%rdi) # encoding: [0x66,0xa5]
+// CHECK: movsw
+// CHECK: movsw
+  movsw
+  movsw  %ds:(%rsi), %es:(%rdi)
+  movsw  (%rsi), %es:(%rdi)
+
+// CHECK: movsl (%rsi), %es:(%rdi) # encoding: [0xa5]
+// CHECK: movsl
+// CHECK: movsl
+  movsl
+  movsl  %ds:(%rsi), %es:(%rdi)
+  movsl  (%rsi), %es:(%rdi)
+// rdar://10883092
+// CHECK: movsl
+  movsl  (%rsi), (%rdi)
+
+// CHECK: movsq (%rsi), %es:(%rdi) # encoding: [0x48,0xa5]
+// CHECK: movsq
+// CHECK: movsq
+  movsq
+  movsq  %ds:(%rsi), %es:(%rdi)
+  movsq  (%rsi), %es:(%rdi)
+
+// CHECK: lodsb (%rsi), %al # encoding: [0xac]
+// CHECK: lodsb
+// CHECK: lodsb
+// CHECK: lodsb
+// CHECK: lodsb
+  lodsb
+  lodsb  %ds:(%rsi), %al
+  lodsb  (%rsi), %al
+  lods  %ds:(%rsi), %al
+  lods  (%rsi), %al
+
+// CHECK: lodsw (%rsi), %ax # encoding: [0x66,0xad]
+// CHECK: lodsw
+// CHECK: lodsw
+// CHECK: lodsw
+// CHECK: lodsw
+  lodsw
+  lodsw  %ds:(%rsi), %ax
+  lodsw  (%rsi), %ax
+  lods  %ds:(%rsi), %ax
+  lods  (%rsi), %ax
+
+// CHECK: lodsl (%rsi), %eax # encoding: [0xad]
+// CHECK: lodsl
+// CHECK: lodsl
+// CHECK: lodsl
+// CHECK: lodsl
+  lodsl
+  lodsl  %ds:(%rsi), %eax
+  lodsl  (%rsi), %eax
+  lods  %ds:(%rsi), %eax
+  lods  (%rsi), %eax
+
+// CHECK: lodsq (%rsi), %rax # encoding: [0x48,0xad]
+// CHECK: lodsq
+// CHECK: lodsq
+// CHECK: lodsq
+// CHECK: lodsq
+  lodsq
+  lodsq  %ds:(%rsi), %rax
+  lodsq  (%rsi), %rax
+  lods  %ds:(%rsi), %rax
+  lods  (%rsi), %rax
+
+// CHECK: stosb %al, %es:(%rdi) # encoding: [0xaa]
+// CHECK: stosb
+// CHECK: stosb
+  stosb
+  stosb  %al, %es:(%rdi)
+  stos  %al, %es:(%rdi)
+
+// CHECK: stosw %ax, %es:(%rdi) # encoding: [0x66,0xab]
+// CHECK: stosw
+// CHECK: stosw
+  stosw
+  stosw  %ax, %es:(%rdi)
+  stos  %ax, %es:(%rdi)
+
+// CHECK: stosl %eax, %es:(%rdi) # encoding: [0xab]
+// CHECK: stosl
+// CHECK: stosl
+  stosl
+  stosl  %eax, %es:(%rdi)
+  stos  %eax, %es:(%rdi)
+
+// CHECK: stosq %rax, %es:(%rdi) # encoding: [0x48,0xab]
+// CHECK: stosq
+// CHECK: stosq
+  stosq
+  stosq  %rax, %es:(%rdi)
+  stos  %rax, %es:(%rdi)
+
+// CHECK: strw
+// CHECK: encoding: [0x66,0x0f,0x00,0xc8]
+  str %ax
+
+// CHECK: strl
+// CHECK: encoding: [0x0f,0x00,0xc8]
+  str %eax
+
+// CHECK: strw
+// CHECK: encoding: [0x66,0x0f,0x00,0xc8]
+  str %ax
+
+// CHECK: strq
+// CHECK: encoding: [0x48,0x0f,0x00,0xc8]
+  str %rax
+
+// CHECK: movd %rdi, %xmm0
+// CHECK: encoding: [0x66,0x48,0x0f,0x6e,0xc7]
+  movq %rdi,%xmm0
+
+// CHECK: movd %rdi, %xmm0
+// CHECK: encoding: [0x66,0x48,0x0f,0x6e,0xc7]
+  movd %rdi,%xmm0
+
+// CHECK: movd  %xmm0, %rax
+// CHECK: encoding: [0x66,0x48,0x0f,0x7e,0xc0]
+        movd  %xmm0, %rax
+
+// CHECK: movntil %eax, (%rdi)
+// CHECK: encoding: [0x0f,0xc3,0x07]
+// CHECK: movntil
+movntil %eax, (%rdi)
+movnti %eax, (%rdi)
+
+// CHECK: movntiq %rax, (%rdi)
+// CHECK: encoding: [0x48,0x0f,0xc3,0x07]
+// CHECK: movntiq
+movntiq %rax, (%rdi)
+movnti %rax, (%rdi)
+
+// CHECK: pclmulqdq $17, %xmm0, %xmm1
+// CHECK: encoding: [0x66,0x0f,0x3a,0x44,0xc8,0x11]
+pclmulhqhqdq %xmm0, %xmm1
+
+// CHECK: pclmulqdq $1, %xmm0, %xmm1
+// CHECK: encoding: [0x66,0x0f,0x3a,0x44,0xc8,0x01]
+pclmulqdq $1, %xmm0, %xmm1
+
+// CHECK: pclmulqdq $16, (%rdi), %xmm1
+// CHECK: encoding: [0x66,0x0f,0x3a,0x44,0x0f,0x10]
+pclmullqhqdq (%rdi), %xmm1
+
+// CHECK: pclmulqdq $0, (%rdi), %xmm1
+// CHECK: encoding: [0x66,0x0f,0x3a,0x44,0x0f,0x00]
+pclmulqdq $0, (%rdi), %xmm1
+
+// PR10345
+// CHECK: xchgq %rax, %rax
+// CHECK: encoding: [0x48,0x90]
+xchgq %rax, %rax
+
+// CHECK: xchgl %eax, %eax
+// CHECK: encoding: [0x87,0xc0]
+xchgl %eax, %eax
+
+// CHECK: xchgw %ax, %ax
+// CHECK: encoding: [0x66,0x90]
+xchgw %ax, %ax
+
+// CHECK: xchgl %ecx, %eax
+// CHECK: encoding: [0x91]
+xchgl %ecx, %eax
+
+// CHECK: xchgl %ecx, %eax
+// CHECK: encoding: [0x91]
+xchgl %eax, %ecx
+
+// CHECK: sysexit
+// CHECK: encoding: [0x0f,0x35]
+sysexit
+
+// CHECK: sysexitl
+// CHECK: encoding: [0x0f,0x35]
+sysexitl
+
+// CHECK: sysexitq
+// CHECK: encoding: [0x48,0x0f,0x35]
+sysexitq
+
+// CHECK: clac
+// CHECK: encoding: [0x0f,0x01,0xca]
+clac
+
+// CHECK: stac
+// CHECK: encoding: [0x0f,0x01,0xcb]
+stac
+
+// CHECK: faddp %st(1)
+// CHECK: fmulp %st(1)
+// CHECK: fsubp %st(1)
+// CHECK: fsubrp %st(1)
+// CHECK: fdivp %st(1)
+// CHECK: fdivrp %st(1)
+faddp %st(0), %st(1)
+fmulp %st(0), %st(1)
+fsubp %st(0), %st(1)
+fsubrp %st(0), %st(1)
+fdivp %st(0), %st(1)
+fdivrp %st(0), %st(1)
+
+// CHECK: faddp %st(1)
+// CHECK: fmulp %st(1)
+// CHECK: fsubp %st(1)
+// CHECK: fsubrp %st(1)
+// CHECK: fdivp %st(1)
+// CHECK: fdivrp %st(1)
+faddp %st(1), %st(0)
+fmulp %st(1), %st(0)
+fsubp %st(1), %st(0)
+fsubrp %st(1), %st(0)
+fdivp %st(1), %st(0)
+fdivrp %st(1), %st(0)
+
+// CHECK: faddp %st(1)
+// CHECK: fmulp %st(1)
+// CHECK: fsubp %st(1)
+// CHECK: fsubrp %st(1)
+// CHECK: fdivp %st(1)
+// CHECK: fdivrp %st(1)
+faddp %st(1)
+fmulp %st(1)
+fsubp %st(1)
+fsubrp %st(1)
+fdivp %st(1)
+fdivrp %st(1)
+
+// CHECK: faddp %st(1)
+// CHECK: fmulp %st(1)
+// CHECK: fsubp %st(1)
+// CHECK: fsubrp %st(1)
+// CHECK: fdivp %st(1)
+// CHECK: fdivrp %st(1)
+faddp
+fmulp
+fsubp
+fsubrp
+fdivp
+fdivrp
+
+// CHECK: fadd %st(1)
+// CHECK: fmul %st(1)
+// CHECK: fsub %st(1)
+// CHECK: fsubr %st(1)
+// CHECK: fdiv %st(1)
+// CHECK: fdivr %st(1)
+fadd %st(1), %st(0)
+fmul %st(1), %st(0)
+fsub %st(1), %st(0)
+fsubr %st(1), %st(0)
+fdiv %st(1), %st(0)
+fdivr %st(1), %st(0)
+
+// CHECK: fadd %st(0), %st(1)
+// CHECK: fmul %st(0), %st(1)
+// CHECK: fsub %st(0), %st(1)
+// CHECK: fsubr %st(0), %st(1)
+// CHECK: fdiv %st(0), %st(1)
+// CHECK: fdivr %st(0), %st(1)
+fadd %st(0), %st(1)
+fmul %st(0), %st(1)
+fsub %st(0), %st(1)
+fsubr %st(0), %st(1)
+fdiv %st(0), %st(1)
+fdivr %st(0), %st(1)
+
+// CHECK: fadd %st(1)
+// CHECK: fmul %st(1)
+// CHECK: fsub %st(1)
+// CHECK: fsubr %st(1)
+// CHECK: fdiv %st(1)
+// CHECK: fdivr %st(1)
+fadd %st(1)
+fmul %st(1)
+fsub %st(1)
+fsubr %st(1)
+fdiv %st(1)
+fdivr %st(1)
+
+// CHECK: movd %xmm0, %eax
+// CHECK: movd %xmm0, %rax
+// CHECK: movd %xmm0, %rax
+// CHECK: vmovd %xmm0, %eax
+// CHECK: vmovq %xmm0, %rax
+// CHECK: vmovq %xmm0, %rax
+movd %xmm0, %eax
+movd %xmm0, %rax
+movq %xmm0, %rax
+vmovd %xmm0, %eax
+vmovd %xmm0, %rax
+vmovq %xmm0, %rax
+
+// CHECK: seto 3735928559(%r10,%r9,8)
+// CHECK:  encoding: [0x43,0x0f,0x90,0x84,0xca,0xef,0xbe,0xad,0xde]
+  seto 0xdeadbeef(%r10,%r9,8)
+
+// CHECK:   monitorx
+// CHECK:  encoding: [0x0f,0x01,0xfa]
+          monitorx
+
+// CHECK:   monitorx
+// CHECK:  encoding: [0x0f,0x01,0xfa]
+          monitorx %rax, %rcx, %rdx
+
+// CHECK:   mwaitx
+// CHECK:  encoding: [0x0f,0x01,0xfb]
+          mwaitx
+
+// CHECK:   mwaitx
+// CHECK:  encoding: [0x0f,0x01,0xfb]
+          mwaitx %rax, %rcx, %rbx
+
+// CHECK:   movl %r15d, (%r15,%r15)
+// CHECK:  encoding: [0x47,0x89,0x3c,0x3f]
+movl %r15d, (%r15,%r15)