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[X86][SSE] Add explicit braces to avoid -Wdangling-else warning.
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Authored by mboehme on Jan 24 2017, 4:37 AM.

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Show First 20 Lines • Show All 30,472 Lines • ▼ Show 20 Lines	static SDValue combineVectorShift(SDNode *N, SelectionDAG &DAG,

// This fails for mask register (vXi1) shifts.		// This fails for mask register (vXi1) shifts.
if ((NumBitsPerElt % 8) != 0)		if ((NumBitsPerElt % 8) != 0)
return SDValue();		return SDValue();

// Out of range logical bit shifts are guaranteed to be zero.		// Out of range logical bit shifts are guaranteed to be zero.
// Out of range arithmetic bit shifts splat the sign bit.		// Out of range arithmetic bit shifts splat the sign bit.
APInt ShiftVal = cast<ConstantSDNode>(N->getOperand(1))->getAPIntValue();		APInt ShiftVal = cast<ConstantSDNode>(N->getOperand(1))->getAPIntValue();
if (ShiftVal.zextOrTrunc(8).uge(NumBitsPerElt))		if (ShiftVal.zextOrTrunc(8).uge(NumBitsPerElt)) {
if (LogicalShift)		if (LogicalShift)
return getZeroVector(VT.getSimpleVT(), Subtarget, DAG, SDLoc(N));		return getZeroVector(VT.getSimpleVT(), Subtarget, DAG, SDLoc(N));
else		else
ShiftVal = NumBitsPerElt - 1;		ShiftVal = NumBitsPerElt - 1;
		}

SDValue N0 = N->getOperand(0);		SDValue N0 = N->getOperand(0);

// Shift N0 by zero -> N0.		// Shift N0 by zero -> N0.
if (!ShiftVal)		if (!ShiftVal)
return N0;		return N0;

// Shift zero -> zero.		// Shift zero -> zero.
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