[X86]Enable the use of 'mov' with a 64bit GPR and a large immediate

[coby]

Summary

Enable the next form (intel style):
"mov <reg64>, <largeImm>"
which is should be available,
where <largeImm> stands for immediates which exceed the range of a singed 32bit integer

Differential Revision: https://reviews.llvm.org/D28988

[craig.topper]

LGTM

llvm/trunk/lib/Target/X86/X86InstrInfo.td

 
 // Force mov without a suffix with a segment and mem to prefer the 'l' form of
 // the move.  All segment/mem forms are equivalent, this has the shortest
 // encoding.
 def : InstAlias<"mov\t{$mem, $seg|$seg, $mem}", (MOV32sm SEGMENT_REG:$seg, i32mem:$mem), 0>;
 def : InstAlias<"mov\t{$seg, $mem|$mem, $seg}", (MOV32ms i32mem:$mem, SEGMENT_REG:$seg), 0>;
 
 // Match 'movq <largeimm>, <reg>' as an alias for movabsq.
-def : InstAlias<"movq\t{$imm, $reg|$reg, $imm}", (MOV64ri GR64:$reg, i64imm:$imm), 0>;
+def : InstAlias<"mov{q}\t{$imm, $reg|$reg, $imm}", (MOV64ri GR64:$reg, i64imm:$imm), 0>;
 
 // Match 'movq GR64, MMX' as an alias for movd.
 def : InstAlias<"movq\t{$src, $dst|$dst, $src}",
                 (MMX_MOVD64to64rr VR64:$dst, GR64:$src), 0>;
 def : InstAlias<"movq\t{$src, $dst|$dst, $src}",
                 (MMX_MOVD64from64rr GR64:$dst, VR64:$src), 0>;
 
 // movsx aliases

llvm/trunk/test/MC/X86/intel-syntax.s

 // CHECK: movq  $123, -16(%rsp)
   mov QWORD PTR [RSP - 16], 123
 // CHECK: movb  $97, -17(%rsp)
   mov BYTE PTR [RSP - 17], 97
 // CHECK: movl  -4(%rsp), %eax
   mov  EAX, DWORD PTR [RSP - 4]
 // CHECK: movq    (%rsp), %rax
   mov     RAX, QWORD PTR [RSP]
+// CHECK: movabsq $4294967289, %rax
+  mov     RAX, 4294967289
 // CHECK: movl  $-4, -4(%rsp)
   mov DWORD PTR [RSP - 4], -4
 // CHECK: movq  0, %rcx
   mov RCX, QWORD PTR [0]
 // CHECK: movl  -24(%rsp,%rax,4), %eax  
   mov  EAX, DWORD PTR [RSP + 4*RAX - 24]
 // CHECK: movb  %dil, (%rdx,%rcx)
   mov BYTE PTR [RDX + RCX], DIL