The goal is to relax the alignment check for the X86 architecure
restoring the behaviour exhibited by LLVM 3.8 and GCC.
According to the Intel Architectures Software Developer’s Manual, Volume 3A:
The integrity of a bus lock is not affected by the alignment of
the memory field. The LOCK semantics are followed for as many bus cycles
as necessary to update the entire operand. However, it is recommend that
locked accesses be aligned on their natural boundaries for better
Atomics operations like CMPXCHG16B for i128 do need to be naturally aligned.
Patch by: Valentin Churavy