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TTI: Add comment clarifying the meaning of MemIntrinsicInfo::PtrVal
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Authored by tstellarAMD on Dec 7 2016, 7:48 PM.

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Summary

EarlyCSE assumes that intrinsics with a defined PtrVal are functionally
equivalent to a load/store and it will CSE two intrinsics that have the
same PtrVal even if other arguments are different.

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rL LLVM

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tstellarAMD retitled this revision from to TTI: Add comment clarifying the meaning of MemIntrinsicInfo::PtrVal.
tstellarAMD updated this object.
tstellarAMD added a reviewer: mcrosier.
tstellarAMD added a subscriber: llvm-commits.
mcrosier added a reviewer: ssijaric.EditedJan 10 2017, 7:09 AM

Adding Sanjin as a reviewer as he wrote the original patch.

mcrosier accepted this revision.Jan 10 2017, 7:14 AM
mcrosier edited edge metadata.

LGTM, but please wait a day or two to see if Sanjin has any additional comments.

This revision is now accepted and ready to land.Jan 10 2017, 7:14 AM
ssijaric accepted this revision.Jan 10 2017, 11:26 AM
ssijaric edited edge metadata.

LGTM. The CSE code for commoning of intrinsic loads and stores should probably be refactored. I should revisit https://reviews.llvm.org/D8313 or https://reviews.llvm.org/D15616.

This revision was automatically updated to reflect the committed changes.