[X86][MS] Allow the invoking of a stand-alone 'movsd' instruction

[coby]

Summary

small fixup which enables the issuing of the aforementioned instruction (w/o operands), on MS/Intel syntax.

Differential Revision: https://reviews.llvm.org/D26913

[myatsina]

LGTM

lib/Target/X86/AsmParser/X86AsmParser.cpp

bool X86AsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
   // Add default SI and DI operands to "movs[bwlq]".
   if (((Name.startswith("movs") &&
         (Name == "movs" || Name == "movsb" || Name == "movsw" ||
          Name == "movsl" || Name == "movsd" || Name == "movsq")) ||
        (Name.startswith("smov") &&
         (Name == "smov" || Name == "smovb" || Name == "smovw" ||
          Name == "smovl" || Name == "smovd" || Name == "smovq"))) &&
       (Operands.size() == 1 || Operands.size() == 3)) {
-    if (Name == "movsd" && Operands.size() == 1)
+    if (Name == "movsd" && Operands.size() == 1 && !isParsingIntelSyntax())
       Operands.back() = X86Operand::CreateToken("movsl", NameLoc);
     AddDefaultSrcDestOperands(TmpOperands, DefaultMemSIOperand(NameLoc),
                               DefaultMemDIOperand(NameLoc));
     HadVerifyError = VerifyAndAdjustOperands(Operands, TmpOperands);
   }
 
   // Check if we encountered an error for one the string insturctions
   if (HadVerifyError) {

test/MC/X86/intel-syntax.s

 // CHECK: movq %rax, %fs:20(%rbx)
     mov QWORD PTR FS:20[rbx], RAX
 // CHECK: vshufpd $1, %xmm2, %xmm1, %xmm0
     vshufpd XMM0, XMM1, XMM2, 1
 // CHECK: vpgatherdd %xmm8, (%r15,%xmm9,2), %xmm1
     vpgatherdd XMM10, XMMWORD PTR [R15 + 2*XMM9], XMM8
 // CHECK: movsd -8, %xmm5
     movsd   XMM5, QWORD PTR [-8]
+// CHECK: movsl (%rsi), %es:(%rdi)
+    movsd
 // CHECK: movl %ecx, (%eax)
     mov [eax], ecx
 // CHECK: movl %ecx, (,%ebx,4)
     mov [4*ebx], ecx
  // CHECK:   movl %ecx, (,%ebx,4)
     mov [ebx*4], ecx
 // CHECK: movl %ecx, 1024
     mov [1024], ecx