Implement inalloca codegen for x86 with the new inalloca design

[rnk]

Summary

Calls with inalloca are lowered by skipping all stores for arguments
passed in memory and the initial stack adjustment to allocate argument
memory.

Now the frontend is responsible for the memory layout, and the backend
doesn't have to do any work. As a result these changes are pretty
minimal.

[rnk]

• Minor tweaks

[echristo]

include/llvm/Support/CallSite.h

271 ↗

(On Diff #6753)

This change seems weird. Even if it's documented to be the last one I'm not sure why...

lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp

78 ↗

(On Diff #6753)

Eh? I think I see it but it could use a comment.

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

5386 ↗

(On Diff #6753)

Should probably document this assertion somewhere?

7096 ↗

(On Diff #6753)

This looks weird.

7323 ↗

(On Diff #6753)

This looks weird. What's up?

lib/Target/X86/X86FastISel.cpp

2490 ↗

(On Diff #6753)

Comment?

lib/Target/X86/X86FrameLowering.cpp

1495 ↗

(On Diff #6753)

Might want to explain when we would expect it to be negative.

1529 ↗

(On Diff #6753)

Ditto.

lib/Target/X86/X86ISelLowering.cpp

2933 ↗

(On Diff #6753)

Rename this in a separate patch?

[rnk]

I'll split some stuff and reupload.

include/llvm/Support/CallSite.h

271 ↗

(On Diff #6753)

It has to be last because it holds all the arguments passed in memory, and memory arguments are always the last parameters in all supported calling conventions.

lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp

78 ↗

(On Diff #6753)

sure

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

5386 ↗

(On Diff #6753)

Added some docs. I'm not really sure it's worth it though. This feature was added in r86876 by Kenneth Uildricks (remember him?) and never documented, so far as I know.

7096 ↗

(On Diff #6753)

I'll try to expand this comment here.

7323 ↗

(On Diff #6753)

ditto

lib/Target/X86/X86FastISel.cpp

2490 ↗

(On Diff #6753)

sure

lib/Target/X86/X86FrameLowering.cpp

1495 ↗

(On Diff #6753)

I think this only happened in an intermediate state when I had bugs, because CalleeAmt was greater than Amount. I'm going to commit this separately as an assertion that Amount is positive. addImm takes a signed int64_t, so the signed type seems correct here.

lib/Target/X86/X86ISelLowering.cpp

2933 ↗

(On Diff #6753)

Sure.

[rnk]

• add more comments and docs
• revert frame lowering changes
• rebased

[echristo]

include/llvm/Support/CallSite.h

271 ↗

(On Diff #6803)

This could/should probably be verified by the IR verifier if it isn't already.

lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp

80 ↗

(On Diff #6803)

This is a general change in behavior for non-inalloca code and could probably use a test case.

lib/IR/Mangler.cpp

68 ↗

(On Diff #6803)

Period on the end of the sentence (yes, I know you didn't write it).

lib/Target/X86/X86FastISel.cpp

2490 ↗

(On Diff #6803)

This also seems like it should be in a separate check-in similar to the one above that checks basically for the same thing.

[rnk]

include/llvm/Support/CallSite.h

271 ↗

(On Diff #6803)

Yep, it is.

lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp

80 ↗

(On Diff #6803)

Sure, but it will require inalloca, because that's the only way to get a non-static alloca here.

lib/IR/Mangler.cpp

68 ↗

(On Diff #6803)

sure

lib/Target/X86/X86FastISel.cpp

2490 ↗

(On Diff #6803)

sure

[rnk]

Closed by commit rL200596 (authored by @rnk).

llvm/trunk/docs/LangRef.rst

.. Warning:: This feature is unstable and not fully implemented.
     be a pointer to stack memory produced by an ``alloca`` instruction.
     The alloca, or argument allocation, must also be tagged with the
     inalloca keyword.  Only the past argument may have the ``inalloca``
     attribute, and that argument is guaranteed to be passed in memory.
 
     An argument allocation may be used by a call at most once because
     the call may deallocate it.  The ``inalloca`` attribute cannot be
     used in conjunction with other attributes that affect argument
-    storage, like ``inreg``, ``nest``, ``sret``, or ``byval``.
+    storage, like ``inreg``, ``nest``, ``sret``, or ``byval``.  The
+    ``inalloca`` attribute also disables LLVM's implicit lowering of
+    large aggregate return values, which means that frontend authors
+    must lower them with ``sret`` pointers.
 
     When the call site is reached, the argument allocation must have
     been the most recent stack allocation that is still live, or the
     results are undefined.  It is possible to allocate additional stack
     space after an argument allocation and before its call site, but it
     must be cleared off with :ref:`llvm.stackrestore
     <int_stackrestore>`.
 

llvm/trunk/include/llvm/Support/CallSite.h

#undef CALLSITE_DELEGATE_SETTER
   }
 
   /// @brief Determine whether this argument is passed by value or in an alloca.
   bool isByValOrInAllocaArgument(unsigned ArgNo) const {
     return paramHasAttr(ArgNo + 1, Attribute::ByVal) ||
            paramHasAttr(ArgNo + 1, Attribute::InAlloca);
   }
 
-  /// @brief Determine if there are any inalloca arguments.
+  /// @brief Determine if there are is an inalloca argument.  Only the last
+  /// argument can have the inalloca attribute.
   bool hasInAllocaArgument() const {
-    return getAttributes().hasAttrSomewhere(Attribute::InAlloca);
+    return paramHasAttr(arg_size(), Attribute::InAlloca);
   }
 
   bool doesNotAccessMemory(unsigned ArgNo) const {
     return paramHasAttr(ArgNo + 1, Attribute::ReadNone);
   }
 
   bool onlyReadsMemory(unsigned ArgNo) const {
     return paramHasAttr(ArgNo + 1, Attribute::ReadOnly) ||

llvm/trunk/include/llvm/Target/TargetCallingConv.h

private:
     static const uint64_t Nest           = 1ULL<<5;  ///< Nested fn static chain
     static const uint64_t NestOffs       = 5;
     static const uint64_t Returned       = 1ULL<<6;  ///< Always returned
     static const uint64_t ReturnedOffs   = 6;
     static const uint64_t ByValAlign     = 0xFULL<<7; ///< Struct alignment
     static const uint64_t ByValAlignOffs = 7;
     static const uint64_t Split          = 1ULL<<11;
     static const uint64_t SplitOffs      = 11;
+    static const uint64_t InAlloca       = 1ULL<<12; ///< Passed with inalloca
+    static const uint64_t InAllocaOffs   = 12;
     static const uint64_t OrigAlign      = 0x1FULL<<27;
     static const uint64_t OrigAlignOffs  = 27;
     static const uint64_t ByValSize      = 0xffffffffULL<<32; ///< Struct size
     static const uint64_t ByValSizeOffs  = 32;
 
     static const uint64_t One            = 1ULL; ///< 1 of this type, for shifts
 
     uint64_t Flags;
public:
     void setInReg()    { Flags |= One << InRegOffs; }
 
     bool isSRet()      const { return Flags & SRet; }
     void setSRet()     { Flags |= One << SRetOffs; }
 
     bool isByVal()     const { return Flags & ByVal; }
     void setByVal()    { Flags |= One << ByValOffs; }
 
+    bool isInAlloca()  const { return Flags & InAlloca; }
+    void setInAlloca() { Flags |= One << InAllocaOffs; }
+
     bool isNest()      const { return Flags & Nest; }
     void setNest()     { Flags |= One << NestOffs; }
 
     bool isReturned()  const { return Flags & Returned; }
     void setReturned() { Flags |= One << ReturnedOffs; }
 
     unsigned getByValAlign() const {
       return (unsigned)

llvm/trunk/include/llvm/Target/TargetLowering.h

EVT getValueType(Type *Ty, bool AllowUnknown = false) const {
     return EVT::getEVT(Ty, AllowUnknown);
   }
 
   /// Return the MVT corresponding to this LLVM type. See getValueType.
   MVT getSimpleValueType(Type *Ty, bool AllowUnknown = false) const {
     return getValueType(Ty, AllowUnknown).getSimpleVT();
   }
 
-  /// Return the desired alignment for ByVal aggregate function arguments in the
-  /// caller parameter area.  This is the actual alignment, not its logarithm.
+  /// Return the desired alignment for ByVal or InAlloca aggregate function
+  /// arguments in the caller parameter area.  This is the actual alignment, not
+  /// its logarithm.
   virtual unsigned getByValTypeAlignment(Type *Ty) const;
 
   /// Return the type of registers that this ValueType will eventually require.
   MVT getRegisterType(MVT VT) const {
     assert((unsigned)VT.SimpleTy < array_lengthof(RegisterTypeForVT));
     return RegisterTypeForVT[VT.SimpleTy];
   }
 
struct ArgListEntry {
     SDValue Node;
     Type* Ty;
     bool isSExt     : 1;
     bool isZExt     : 1;
     bool isInReg    : 1;
     bool isSRet     : 1;
     bool isNest     : 1;
     bool isByVal    : 1;
+    bool isInAlloca : 1;
     bool isReturned : 1;
     uint16_t Alignment;
 
     ArgListEntry() : isSExt(false), isZExt(false), isInReg(false),
-      isSRet(false), isNest(false), isByVal(false), isReturned(false),
-      Alignment(0) { }
+      isSRet(false), isNest(false), isByVal(false), isInAlloca(false),
+      isReturned(false), Alignment(0) { }
 
     void setAttributes(ImmutableCallSite *CS, unsigned AttrIdx);
   };
   typedef std::vector<ArgListEntry> ArgListTy;
 
   /// This structure contains all information that is necessary for lowering
   /// calls. It is passed to TLI::LowerCallTo when the SelectionDAG builder
   /// needs to lower a call, and targets will see this struct in their LowerCall

llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

bool CanLowerReturn = TLI->CanLowerReturn(CS.getCallingConv(),
                                             DAG.getMachineFunction(),
                                             FTy->isVarArg(), Outs,
                                             FTy->getContext());
 
   SDValue DemoteStackSlot;
   int DemoteStackIdx = -100;
 
   if (!CanLowerReturn) {
+    assert(!CS.hasInAllocaArgument() &&
+           "sret demotion is incompatible with inalloca");
     uint64_t TySize = TLI->getDataLayout()->getTypeAllocSize(
                       FTy->getReturnType());
     unsigned Align  = TLI->getDataLayout()->getPrefTypeAlignment(
                       FTy->getReturnType());
     MachineFunction &MF = DAG.getMachineFunction();
     DemoteStackIdx = MF.getFrameInfo()->CreateStackObject(TySize, Align, false);
     Type *StackSlotPtrType = PointerType::getUnqual(FTy->getReturnType());
 
for (unsigned Value = 0, NumValues = ValueVTs.size();
       if (Args[i].isZExt)
         Flags.setZExt();
       if (Args[i].isSExt)
         Flags.setSExt();
       if (Args[i].isInReg)
         Flags.setInReg();
       if (Args[i].isSRet)
         Flags.setSRet();
-      if (Args[i].isByVal) {
+      if (Args[i].isByVal)
         Flags.setByVal();
+      if (Args[i].isInAlloca) {
+        Flags.setInAlloca();
+        // Set the byval flag for CCAssignFn callbacks that don't know about
+        // inalloca.  This way we can know how many bytes we should've allocated
+        // and how many bytes a callee cleanup function will pop.  If we port
+        // inalloca to more targets, we'll have to add custom inalloca handling
+        // in the various CC lowering callbacks.
+        Flags.setByVal();
+      }
+      if (Args[i].isByVal || Args[i].isInAlloca) {
         PointerType *Ty = cast<PointerType>(Args[i].Ty);
         Type *ElementTy = Ty->getElementType();
         Flags.setByValSize(getDataLayout()->getTypeAllocSize(ElementTy));
         // For ByVal, alignment should come from FE.  BE will guess if this
         // info is not there but there are cases it cannot get right.
         unsigned FrameAlign;
         if (Args[i].Alignment)
           FrameAlign = Args[i].Alignment;
for (unsigned Value = 0, NumValues = ValueVTs.size();
       if (F.getAttributes().hasAttribute(Idx, Attribute::ZExt))
         Flags.setZExt();
       if (F.getAttributes().hasAttribute(Idx, Attribute::SExt))
         Flags.setSExt();
       if (F.getAttributes().hasAttribute(Idx, Attribute::InReg))
         Flags.setInReg();
       if (F.getAttributes().hasAttribute(Idx, Attribute::StructRet))
         Flags.setSRet();
-      if (F.getAttributes().hasAttribute(Idx, Attribute::ByVal)) {
+      if (F.getAttributes().hasAttribute(Idx, Attribute::ByVal))
         Flags.setByVal();
+      if (F.getAttributes().hasAttribute(Idx, Attribute::InAlloca)) {
+        Flags.setInAlloca();
+        // Set the byval flag for CCAssignFn callbacks that don't know about
+        // inalloca.  This way we can know how many bytes we should've allocated
+        // and how many bytes a callee cleanup function will pop.  If we port
+        // inalloca to more targets, we'll have to add custom inalloca handling
+        // in the various CC lowering callbacks.
+        Flags.setByVal();
+      }
+      if (Flags.isByVal() || Flags.isInAlloca()) {
         PointerType *Ty = cast<PointerType>(I->getType());
         Type *ElementTy = Ty->getElementType();
         Flags.setByValSize(TD->getTypeAllocSize(ElementTy));
         // For ByVal, alignment should be passed from FE.  BE will guess if
         // this info is not there but there are cases it cannot get right.
         unsigned FrameAlign;
         if (F.getParamAlignment(Idx))
           FrameAlign = F.getParamAlignment(Idx);

llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp

 void TargetLowering::ArgListEntry::setAttributes(ImmutableCallSite *CS,
                                                  unsigned AttrIdx) {
   isSExt     = CS->paramHasAttr(AttrIdx, Attribute::SExt);
   isZExt     = CS->paramHasAttr(AttrIdx, Attribute::ZExt);
   isInReg    = CS->paramHasAttr(AttrIdx, Attribute::InReg);
   isSRet     = CS->paramHasAttr(AttrIdx, Attribute::StructRet);
   isNest     = CS->paramHasAttr(AttrIdx, Attribute::Nest);
   isByVal    = CS->paramHasAttr(AttrIdx, Attribute::ByVal);
+  isInAlloca = CS->paramHasAttr(AttrIdx, Attribute::InAlloca);
   isReturned = CS->paramHasAttr(AttrIdx, Attribute::Returned);
   Alignment  = CS->getParamAlignment(AttrIdx);
 }
 
 /// Generate a libcall taking the given operands as arguments and returning a
 /// result of type RetVT.
 std::pair<SDValue, SDValue>
 TargetLowering::makeLibCall(SelectionDAG &DAG,

llvm/trunk/lib/IR/Mangler.cpp

 /// take.
 static void AddFastCallStdCallSuffix(raw_ostream &OS, const Function *F,
                                      const DataLayout &TD) {
   // Calculate arguments size total.
   unsigned ArgWords = 0;
   for (Function::const_arg_iterator AI = F->arg_begin(), AE = F->arg_end();
        AI != AE; ++AI) {
     Type *Ty = AI->getType();
-    // 'Dereference' type in case of byval parameter attribute
-    if (AI->hasByValAttr())
+    // 'Dereference' type in case of byval or inalloca parameter attribute.
+    if (AI->hasByValOrInAllocaAttr())
       Ty = cast<PointerType>(Ty)->getElementType();
     // Size should be aligned to DWORD boundary
     ArgWords += ((TD.getTypeAllocSize(Ty) + 3)/4)*4;
   }
 
   OS << '@' << ArgWords;
 }
 

llvm/trunk/lib/Target/X86/X86FastISel.cpp

bool X86FastISel::DoSelectCall(const Instruction *I, const char *MemIntName) {
   FunctionType *FTy = cast<FunctionType>(PT->getElementType());
   bool isVarArg = FTy->isVarArg();
 
   // Don't know how to handle Win64 varargs yet.  Nothing special needed for
   // x86-32.  Special handling for x86-64 is implemented.
   if (isVarArg && isWin64)
     return false;
 
+  // Don't know about inalloca yet.
+  if (CS.hasInAllocaArgument())
+    return false;
+
   // Fast-isel doesn't know about callee-pop yet.
   if (X86::isCalleePop(CC, Subtarget->is64Bit(), isVarArg,
                        TM.Options.GuaranteedTailCallOpt))
     return false;
 
   // Check whether the function can return without sret-demotion.
   SmallVector<ISD::OutputArg, 4> Outs;
   GetReturnInfo(I->getType(), CS.getAttributes(), Outs, TLI);

llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

if (isTailCall && !IsSibcall) {
     FPDiff = NumBytesCallerPushed - NumBytes;
 
     // Set the delta of movement of the returnaddr stackslot.
     // But only set if delta is greater than previous delta.
     if (FPDiff < X86Info->getTCReturnAddrDelta())
       X86Info->setTCReturnAddrDelta(FPDiff);
   }
 
+  unsigned NumBytesToPush = NumBytes;
+  unsigned NumBytesToPop = NumBytes;
+
+  // If we have an inalloca argument, all stack space has already been allocated
+  // for us and be right at the top of the stack.  We don't support multiple
+  // arguments passed in memory when using inalloca.
+  if (!Outs.empty() && Outs.back().Flags.isInAlloca()) {
+    NumBytesToPush = 0;
+    assert(ArgLocs.back().getLocMemOffset() == 0 &&
+           "an inalloca argument must be the only memory argument");
+  }
+
   if (!IsSibcall)
-    Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true),
-                                 dl);
+    Chain = DAG.getCALLSEQ_START(
+        Chain, DAG.getIntPtrConstant(NumBytesToPush, true), dl);
 
   SDValue RetAddrFrIdx;
   // Load return address for tail calls.
   if (isTailCall && FPDiff)
     Chain = EmitTailCallLoadRetAddr(DAG, RetAddrFrIdx, Chain, isTailCall,
                                     Is64Bit, FPDiff, dl);
 
   SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass;
   SmallVector<SDValue, 8> MemOpChains;
   SDValue StackPtr;
 
   // Walk the register/memloc assignments, inserting copies/loads.  In the case
   // of tail call optimization arguments are handle later.
   const X86RegisterInfo *RegInfo =
     static_cast<const X86RegisterInfo*>(getTargetMachine().getRegisterInfo());
   for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
+    // Skip inalloca arguments, they have already been written.
+    ISD::ArgFlagsTy Flags = Outs[i].Flags;
+    if (Flags.isInAlloca())
+      continue;
+
     CCValAssign &VA = ArgLocs[i];
     EVT RegVT = VA.getLocVT();
     SDValue Arg = OutVals[i];
-    ISD::ArgFlagsTy Flags = Outs[i].Flags;
     bool isByVal = Flags.isByVal();
 
     // Promote the value if needed.
     switch (VA.getLocInfo()) {
     default: llvm_unreachable("Unknown loc info!");
     case CCValAssign::Full: break;
     case CCValAssign::SExt:
       Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, RegVT, Arg);
Callee = DAG.getTargetExternalSymbol(S->getSymbol(), getPointerTy(),
                                          OpFlags);
   }
 
   // Returns a chain & a flag for retval copy to use.
   SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
   SmallVector<SDValue, 8> Ops;
 
   if (!IsSibcall && isTailCall) {
-    Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true),
+    Chain = DAG.getCALLSEQ_END(Chain,
+                               DAG.getIntPtrConstant(NumBytesToPop, true),
                                DAG.getIntPtrConstant(0, true), InFlag, dl);
     InFlag = Chain.getValue(1);
   }
 
   Ops.push_back(Chain);
   Ops.push_back(Callee);
 
   if (isTailCall)
     Ops.push_back(DAG.getConstant(FPDiff, MVT::i32));
else if (!Is64Bit && !IsTailCallConvention(CallConv) &&
     // For MSVC Win32 targets, the caller pops the hidden struct pointer.
     NumBytesForCalleeToPop = 4;
   else
     NumBytesForCalleeToPop = 0;  // Callee pops nothing.
 
   // Returns a flag for retval copy to use.
   if (!IsSibcall) {
     Chain = DAG.getCALLSEQ_END(Chain,
-                               DAG.getIntPtrConstant(NumBytes, true),
+                               DAG.getIntPtrConstant(NumBytesToPop, true),
                                DAG.getIntPtrConstant(NumBytesForCalleeToPop,
                                                      true),
                                InFlag, dl);
     InFlag = Chain.getValue(1);
   }
 
   // Handle result values, copying them out of physregs into vregs that we
   // return.

llvm/trunk/test/CodeGen/X86/inalloca-ctor.ll

+; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck %s
+
+%Foo = type { i32, i32 }
+
+%frame = type { %Foo, i32, %Foo }
+
+declare void @f(%frame* inalloca %a)
+
+declare void @Foo_ctor(%Foo* %this)
+
+define void @g() {
+entry:
+  %args = alloca %frame, inalloca
+  %c = getelementptr %frame* %args, i32 0, i32 2
+; CHECK: movl    $20, %eax
+; CHECK: calll   __chkstk
+; CHECK: movl %esp,
+  call void @Foo_ctor(%Foo* %c)
+; CHECK: leal 12(%{{.*}}),
+; CHECK: subl $4, %esp
+; CHECK: calll _Foo_ctor
+; CHECK: addl $4, %esp
+  %b = getelementptr %frame* %args, i32 0, i32 1
+  store i32 42, i32* %b
+; CHECK: movl $42,
+  %a = getelementptr %frame* %args, i32 0, i32 0
+  call void @Foo_ctor(%Foo* %a)
+; CHECK: subl $4, %esp
+; CHECK: calll _Foo_ctor
+; CHECK: addl $4, %esp
+  call void @f(%frame* inalloca %args)
+; CHECK: calll   _f
+  ret void
+}

llvm/trunk/test/CodeGen/X86/inalloca-invoke.ll

+; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck %s
+
+%Iter = type { i32, i32, i32 }
+
+%frame.reverse = type { %Iter, %Iter }
+
+declare void @llvm.stackrestore(i8*)
+declare i8* @llvm.stacksave()
+declare void @begin(%Iter* sret)
+declare void @plus(%Iter* sret, %Iter*, i32)
+declare void @reverse(%frame.reverse* inalloca align 4)
+
+define i32 @main() {
+  %temp.lvalue = alloca %Iter
+  br label %blah
+
+blah:
+  %inalloca.save = call i8* @llvm.stacksave()
+  %rev_args = alloca %frame.reverse, inalloca, align 4
+  %beg = getelementptr %frame.reverse* %rev_args, i32 0, i32 0
+  %end = getelementptr %frame.reverse* %rev_args, i32 0, i32 1
+
+; CHECK:  calll   __chkstk
+; CHECK:  movl    %[[beg:[^,]*]], %esp
+; CHECK:  leal    12(%[[beg]]), %[[end:[^ ]*]]
+
+  call void @begin(%Iter* sret %temp.lvalue)
+; CHECK:  calll _begin
+
+  invoke void @plus(%Iter* sret %end, %Iter* %temp.lvalue, i32 4)
+          to label %invoke.cont unwind label %lpad
+
+;  Uses end as sret param.
+; CHECK:  movl %[[end]], (%esp)
+; CHECK:  calll _plus
+
+invoke.cont:
+  call void @begin(%Iter* sret %beg)
+
+; CHECK:  movl %[[beg]],
+; CHECK:  calll _begin
+
+  invoke void @reverse(%frame.reverse* inalloca align 4 %rev_args)
+          to label %invoke.cont5 unwind label %lpad
+
+invoke.cont5:                                     ; preds = %invoke.cont
+  call void @llvm.stackrestore(i8* %inalloca.save)
+  ret i32 0
+
+lpad:                                             ; preds = %invoke.cont, %entry
+  %lp = landingpad { i8*, i32 } personality i8* null
+          cleanup
+  unreachable
+}

llvm/trunk/test/CodeGen/X86/inalloca-stdcall.ll

+; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck %s
+
+%Foo = type { i32, i32 }
+
+declare x86_stdcallcc void @f(%Foo* inalloca %a)
+declare x86_stdcallcc void @i(i32 %a)
+
+define void @g() {
+  %b = alloca %Foo, inalloca
+; CHECK: movl    $8, %eax
+; CHECK: calll   __chkstk
+; CHECK: movl   %[[REG:[^,]*]], %esp
+  %f1 = getelementptr %Foo* %b, i32 0, i32 0
+  %f2 = getelementptr %Foo* %b, i32 0, i32 1
+  store i32 13, i32* %f1
+  store i32 42, i32* %f2
+; CHECK: movl    $13, (%[[REG]])
+; CHECK: movl    $42, 4(%[[REG]])
+  call x86_stdcallcc void @f(%Foo* inalloca %b)
+; CHECK: calll   _f@8
+; CHECK-NOT: %esp
+; CHECK: subl $4, %esp
+; CHECK: calll   _i@4
+  call x86_stdcallcc void @i(i32 0)
+  ret void
+}

llvm/trunk/test/CodeGen/X86/inalloca.ll

+; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck %s
+
+%Foo = type { i32, i32 }
+
+declare void @f(%Foo* inalloca %b)
+
+define void @a() {
+; CHECK-LABEL: _a:
+entry:
+  %b = alloca %Foo, inalloca
+; CHECK: movl    $8, %eax
+; CHECK: calll   __chkstk
+; CHECK: movl   %[[REG:[^,]*]], %esp
+  %f1 = getelementptr %Foo* %b, i32 0, i32 0
+  %f2 = getelementptr %Foo* %b, i32 0, i32 1
+  store i32 13, i32* %f1
+  store i32 42, i32* %f2
+; CHECK: movl    $13, (%[[REG]])
+; CHECK: movl    $42, 4(%[[REG]])
+  call void @f(%Foo* inalloca %b)
+; CHECK: calll   _f
+  ret void
+}
+
+declare void @inreg_with_inalloca(i32 inreg %a, %Foo* inalloca %b)
+
+define void @b() {
+; CHECK-LABEL: _b:
+entry:
+  %b = alloca %Foo, inalloca
+; CHECK: movl    $8, %eax
+; CHECK: calll   __chkstk
+; CHECK: movl   %[[REG:[^,]*]], %esp
+  %f1 = getelementptr %Foo* %b, i32 0, i32 0
+  %f2 = getelementptr %Foo* %b, i32 0, i32 1
+  store i32 13, i32* %f1
+  store i32 42, i32* %f2
+; CHECK: movl    $13, (%[[REG]])
+; CHECK: movl    $42, 4(%[[REG]])
+  call void @inreg_with_inalloca(i32 inreg 1, %Foo* inalloca %b)
+; CHECK: movl    $1, %eax
+; CHECK: calll   _inreg_with_inalloca
+  ret void
+}
+
+declare x86_thiscallcc void @thiscall_with_inalloca(i8* %a, %Foo* inalloca %b)
+
+define void @c() {
+; CHECK-LABEL: _c:
+entry:
+  %b = alloca %Foo, inalloca
+; CHECK: movl    $8, %eax
+; CHECK: calll   __chkstk
+; CHECK: movl   %[[REG:[^,]*]], %esp
+  %f1 = getelementptr %Foo* %b, i32 0, i32 0
+  %f2 = getelementptr %Foo* %b, i32 0, i32 1
+  store i32 13, i32* %f1
+  store i32 42, i32* %f2
+; CHECK: movl    $13, (%[[REG]])
+; CHECK: movl    $42, 4(%[[REG]])
+  call x86_thiscallcc void @thiscall_with_inalloca(i8* null, %Foo* inalloca %b)
+; CHECK: xorl    %ecx, %ecx
+; CHECK: calll   _thiscall_with_inalloca
+  ret void
+}