[mips] Fix unsigned/signed type error

[sdardis]

Summary

MipsFastISel uses a a class to represent addresses with a signed member
to represent the offset. MipsFastISel::emitStore, emitLoad and computeAddress
all treated the offset as being positive. In cases where the offset was
actually negative and a frame pointer was used, this would cause the constant
synthesis routine to crash as it would generate an unexpected instruction
sequence when frame indexes are replaced.

[vkalintiris]

LGTM.

llvm/trunk/lib/Target/Mips/MipsFastISel.cpp

bool MipsFastISel::computeAddress(const Value *Obj, Address &Addr) {
   default:
     break;
   case Instruction::BitCast: {
     // Look through bitcasts.
     return computeAddress(U->getOperand(0), Addr);
   }
   case Instruction::GetElementPtr: {
     Address SavedAddr = Addr;
-    uint64_t TmpOffset = Addr.getOffset();
+    int64_t TmpOffset = Addr.getOffset();
     // Iterate through the GEP folding the constants into offsets where
     // we can.
     gep_type_iterator GTI = gep_type_begin(U);
     for (User::const_op_iterator i = U->op_begin() + 1, e = U->op_end(); i != e;
          ++i, ++GTI) {
       const Value *Op = *i;
       if (StructType *STy = dyn_cast<StructType>(*GTI)) {
         const StructLayout *SL = DL.getStructLayout(STy);
bool MipsFastISel::emitLoad(MVT VT, unsigned &ResultReg, Address &Addr,
   if (Addr.isRegBase()) {
     simplifyAddress(Addr);
     emitInstLoad(Opc, ResultReg, Addr.getReg(), Addr.getOffset());
     return true;
   }
   if (Addr.isFIBase()) {
     unsigned FI = Addr.getFI();
     unsigned Align = 4;
-    unsigned Offset = Addr.getOffset();
+    int64_t Offset = Addr.getOffset();
     MachineFrameInfo &MFI = MF->getFrameInfo();
     MachineMemOperand *MMO = MF->getMachineMemOperand(
         MachinePointerInfo::getFixedStack(*MF, FI), MachineMemOperand::MOLoad,
         MFI.getObjectSize(FI), Align);
     BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg)
         .addFrameIndex(FI)
         .addImm(Offset)
         .addMemOperand(MMO);
bool MipsFastISel::emitStore(MVT VT, unsigned SrcReg, Address &Addr,
   if (Addr.isRegBase()) {
     simplifyAddress(Addr);
     emitInstStore(Opc, SrcReg, Addr.getReg(), Addr.getOffset());
     return true;
   }
   if (Addr.isFIBase()) {
     unsigned FI = Addr.getFI();
     unsigned Align = 4;
-    unsigned Offset = Addr.getOffset();
+    int64_t Offset = Addr.getOffset();
     MachineFrameInfo &MFI = MF->getFrameInfo();
     MachineMemOperand *MMO = MF->getMachineMemOperand(
         MachinePointerInfo::getFixedStack(*MF, FI), MachineMemOperand::MOStore,
         MFI.getObjectSize(FI), Align);
     BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc))
         .addReg(SrcReg)
         .addFrameIndex(FI)
         .addImm(Offset)

llvm/trunk/test/CodeGen/Mips/Fast-ISel/stackloadstore.ll

+; RUN: llc < %s -march=mipsel -mcpu=mips32 -fast-isel -disable-fp-elim -relocation-model=pic < %s
+
+; Test that negative array access don't crash constant synthesis when fast isel
+; generates negative offsets.
+
+define i16 @test() {
+  %a = alloca [4 x i16], align 4
+  %arrayidx = getelementptr inbounds [4 x i16], [4 x i16]* %a, i32 0, i32 -2
+  %b = load i16, i16* %arrayidx, align 2
+  ret i16 %b
+}
+
+define void @test2() {
+  %a = alloca [4 x i16], align 4
+  %arrayidx = getelementptr inbounds [4 x i16], [4 x i16]* %a, i32 0, i32 -2
+  store i16 2, i16* %arrayidx, align 2
+  ret void
+}