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Differential D23513

Fix assert in pipeliner due to an invalid Phi in the epilog
ClosedPublic

Authored by bcahoon on Aug 15 2016, 8:54 AM.

Details

Reviewers
kparzysz
Commits
rG65b6ebccad08: [Pipeliner] Fix an asssert due to invalid Phi in the epilog
rL278805: [Pipeliner] Fix an asssert due to invalid Phi in the epilog
Summary

The pipeliner was generating an invalid Phi name for an operand in the epilog block, which caused an assert in the live variable analysis pass. The fix is to the code that generates new Phis in the epilog block. In this case, there is an existing Phi that needs to be reused rather than creating a new Phi instruction.

Diff Detail

Repository
rL LLVM

Event Timeline

bcahoon updated this revision to Diff 68041.Aug 15 2016, 8:54 AM
bcahoon retitled this revision from to Fix assert in pipeliner due to an invalid Phi in the epilog.
bcahoon updated this object.
bcahoon added a reviewer: kparzysz.
bcahoon added a subscriber: llvm-commits.
kparzysz accepted this revision.Aug 15 2016, 10:48 AM
kparzysz edited edge metadata.
This revision is now accepted and ready to land.Aug 15 2016, 10:48 AM
Closed by commit rL278805: [Pipeliner] Fix an asssert due to invalid Phi in the epilog (authored by bcahoon). · Explain WhyAug 16 2016, 7:37 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
lib/
CodeGen/
3 lines
test/
CodeGen/
Hexagon/
44 lines

Diff 68175

llvm/trunk/lib/CodeGen/MachinePipeliner.cpp

Show First 20 Lines • Show All 2,642 Lines • ▼ Show 20 Lines for (unsigned np = 0; np < NumPhis; ++np) {
(!LoopDefIsPhi || PrevStage != LastStageNum)) (!LoopDefIsPhi || PrevStage != LastStageNum))
PhiOp2 = VRMap[PrevStage - np][Def]; PhiOp2 = VRMap[PrevStage - np][Def];
} }
// Check if we can reuse an existing Phi. This occurs when a Phi // Check if we can reuse an existing Phi. This occurs when a Phi
// references another Phi, and the other Phi is scheduled in an // references another Phi, and the other Phi is scheduled in an
// earlier stage. We can try to reuse an existing Phi up until the last // earlier stage. We can try to reuse an existing Phi up until the last
// stage of the current Phi. // stage of the current Phi.
if (LoopDefIsPhi && VRMap[CurStageNum].count(LoopVal) && if (LoopDefIsPhi && (int)PrologStage >= StageScheduled) {
LoopValStage >= (int)(CurStageNum - LastStageNum)) {
int LVNumStages = Schedule.getStagesForPhi(LoopVal); int LVNumStages = Schedule.getStagesForPhi(LoopVal);
int StageDiff = (StageScheduled - LoopValStage); int StageDiff = (StageScheduled - LoopValStage);
LVNumStages -= StageDiff; LVNumStages -= StageDiff;
if (LVNumStages > (int)np) { if (LVNumStages > (int)np) {
NewReg = PhiOp2; NewReg = PhiOp2;
unsigned ReuseStage = CurStageNum; unsigned ReuseStage = CurStageNum;
if (Schedule.isLoopCarried(this, *PhiInst)) if (Schedule.isLoopCarried(this, *PhiInst))
ReuseStage -= LVNumStages; ReuseStage -= LVNumStages;
▲ Show 20 Lines • Show All 1,309 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/Hexagon/swp-epilog-reuse-1.ll

; RUN: llc -march=hexagon -mcpu=hexagonv60 < %s
; REQUIRES: asserts
; Test that the pipeliner reuses an existing Phi when generating the epilog
; block. In this case, the original loops has a Phi whose operand is another
; Phi. When the loop is pipelined, the Phi that generates the operand value
; is used in two stages. This means the the Phi for the second stage can
; be reused. The bug causes an assert due to an invalid virtual register error
; in the live variable analysis.
define void @test(i8* %a, i8* %b) #0 {
entry:
br label %for.body6.us.prol
for.body6.us.prol:
%i.065.us.prol = phi i32 [ 0, %entry ], [ %inc.us.prol, %for.body6.us.prol ]
%im1.064.us.prol = phi i32 [ undef, %entry ], [ %i.065.us.prol, %for.body6.us.prol ]
%prol.iter = phi i32 [ undef, %entry ], [ %prol.iter.sub, %for.body6.us.prol ]
%arrayidx8.us.prol = getelementptr inbounds i8, i8* %b, i32 %im1.064.us.prol
%0 = load i8, i8* %arrayidx8.us.prol, align 1
%conv9.us.prol = sext i8 %0 to i32
%add.us.prol = add nsw i32 %conv9.us.prol, 0
%add12.us.prol = add nsw i32 %add.us.prol, 0
%mul.us.prol = mul nsw i32 %add12.us.prol, 3
%conv13.us.prol = trunc i32 %mul.us.prol to i8
%arrayidx14.us.prol = getelementptr inbounds i8, i8* %a, i32 %i.065.us.prol
store i8 %conv13.us.prol, i8* %arrayidx14.us.prol, align 1
%inc.us.prol = add nuw nsw i32 %i.065.us.prol, 1
%prol.iter.sub = add i32 %prol.iter, -1
%prol.iter.cmp = icmp eq i32 %prol.iter.sub, 0
br i1 %prol.iter.cmp, label %for.body6.us, label %for.body6.us.prol
for.body6.us:
%im2.063.us = phi i32 [ undef, %for.body6.us ], [ %im1.064.us.prol, %for.body6.us.prol ]
%arrayidx10.us = getelementptr inbounds i8, i8* %b, i32 %im2.063.us
%1 = load i8, i8* %arrayidx10.us, align 1
%conv11.us = sext i8 %1 to i32
%add12.us = add nsw i32 0, %conv11.us
%mul.us = mul nsw i32 %add12.us, 3
%conv13.us = trunc i32 %mul.us to i8
store i8 %conv13.us, i8* undef, align 1
br label %for.body6.us
}