TII: Add branch relaxation target hooks

[arsenm]

Merging with other patch

include/llvm/Target/TargetInstrInfo.h

public:
   /// By default, this is only true when the two instructions
   /// are deemed identical except for defs. If this function is called when the
   /// IR is still in SSA form, the caller can pass the MachineRegisterInfo for
   /// aggressive checks.
   virtual bool produceSameValue(const MachineInstr &MI0,
                                 const MachineInstr &MI1,
                                 const MachineRegisterInfo *MRI = nullptr) const;
 
+  /// \returns true if a branch from an instruction with opcode \p BranchOpc
+  ///  bytes is capable of jumping to a position \p BrOffset bytes away.
+  virtual bool isBranchOffsetInRange(unsigned BranchOpc,
+                                     int64_t BrOffset) const {
+    llvm_unreachable("target did not implement");
+  }
+
+  /// \returns The block that branch instruction \p MI jumps to.
+  virtual MachineBasicBlock *getBranchDestBlock(const MachineInstr &MI) const {
+    llvm_unreachable("target did not implement");
+  }
+
+  /// Change the destination block of branch \p BranchInstr to be \p NewDestBB.
+  virtual void setBranchDestBlock(MachineInstr &BranchInst,
+                                  MachineBasicBlock &NewDestBB) const {
+    llvm_unreachable("target did not implement");
+  }
+
+  /// Insert a conditional branch instruction in \p SrcBB at point \p InsPt to
+  /// \p NewDestBB using the inverted condition of conditinoal branch \p OldBr.
+  ///
+  /// \returns The number of bytes added to the block.
+  virtual unsigned insertInvertedConditionalBranch(
+    MachineBasicBlock &SrcBB,
+    MachineBasicBlock::iterator InsPt,
+    const DebugLoc &DL,
+    const MachineInstr &OldBr,
+    MachineBasicBlock &NewDestBB) const {
+    llvm_unreachable("target did not implement");
+  }
+
+  /// Insert an unconditional branch at the end of \p MBB to \p NewDestBB.  \p
+  /// BrOffset indicates the offset of \p NewDestBB relative to the offset of
+  /// the position to insert the new branch. If \BrOffset is 0, any
+  /// unconditional branch is assumed to be legal.
+  ///
+  /// \returns The number of bytes added to the block.
+  virtual unsigned insertUnconditionalBranch(MachineBasicBlock &MBB,
+                                             MachineBasicBlock &NewDestBB,
+                                             const DebugLoc &DL,
+                                             int64_t BrOffset = 0,
+                                             RegScavenger *RS = nullptr) const {
+    llvm_unreachable("target did not implement");
+  }
+
   /// Analyze the branching code at the end of MBB, returning
   /// true if it cannot be understood (e.g. it's a switch dispatch or isn't
   /// implemented for a target).  Upon success, this returns false and returns
   /// with the following information in various cases:
   ///
   /// 1. If this block ends with no branches (it just falls through to its succ)
   ///    just return false, leaving TBB/FBB null.
   /// 2. If this block ends with only an unconditional branch, it sets TBB to be

lib/Target/AArch64/AArch64InstrInfo.h

foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI,
                         MachineBasicBlock::iterator InsertPt, int FrameIndex,
                         LiveIntervals *LIS = nullptr) const override;
 
   /// \returns true if a branch from an instruction with opcode \p BranchOpc
   ///  bytes is capable of jumping to a position \p BrOffset bytes away.
   bool isBranchOffsetInRange(unsigned BranchOpc,
                              int64_t BrOffset) const override;
 
-  /// \returns The block that branch instruction \p MI jumps to.
-  MachineBasicBlock *getBranchDestBlock(const MachineInstr &MI) const;
+  MachineBasicBlock *getBranchDestBlock(const MachineInstr &MI) const override;
 
-  /// Change the destination block of branch \p BranchInstr to be \p NewDestBB.
   void setBranchDestBlock(MachineInstr &BranchInst,
-                          MachineBasicBlock &NewDestBB) const;
+                          MachineBasicBlock &NewDestBB) const override;
 
-  /// Insert a conditional branch instruction in \p SrcBB at point \p InsPt to
-  /// \p NewDestBB using the inverted condition of conditinoal branch \p OldBr.
-  ///
-  /// \returns The number of bytes added to the block.
-  unsigned insertInvertedConditionalBranch(MachineBasicBlock &SrcBB,
-                                           MachineBasicBlock::iterator InsPt,
-                                           const DebugLoc &DL,
-                                           const MachineInstr &OldBr,
-                                           MachineBasicBlock &NewDestBB) const;
+  unsigned insertInvertedConditionalBranch(
+    MachineBasicBlock &SrcBB,
+    const MachineInstr &OldBr ,
+    MachineBasicBlock &NewDestBB) const override;
 
-  /// Insert an unconditional branch at the end of \p MBB to \p NewDestBB.  \p
-  /// BrOffset indicates the offset of \p NewDestBB relative to the offset of
-  /// the position to insert the new branch. If \BrOffset is 0, any
-  /// unconditional branch is assumed to be legal.
-  ///
-  /// \returns The number of bytes added to the block.
   unsigned insertUnconditionalBranch(MachineBasicBlock &MBB,
                                      MachineBasicBlock &DestBB,
                                      const DebugLoc &DL,
-                                     int64_t BrOffset = 0) const;
+                                     int64_t BrOffset = 0,
+                                     RegScavenger *RS = nullptr) const override;
 
   bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
                      MachineBasicBlock *&FBB,
                      SmallVectorImpl<MachineOperand> &Cond,
                      bool AllowModify = false) const override;
   unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
   unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
                         MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,

lib/Target/AArch64/AArch64InstrInfo.cpp

unsigned AArch64InstrInfo::insertInvertedConditionalBranch(
   MIB.addMBB(&NewDestBB);
 
   return getInstSizeInBytes(*MIB);
 }
 
 unsigned AArch64InstrInfo::insertUnconditionalBranch(MachineBasicBlock &MBB,
                                                      MachineBasicBlock &DestBB,
                                                      const DebugLoc &DL,
-                                                     int64_t) const {
+                                                     int64_t,
+                                                     RegScavenger *RS) const {
   MachineInstr *MI = BuildMI(&MBB, DL, get(AArch64::B))
     .addMBB(&DestBB);
 
   return getInstSizeInBytes(*MI);
 }
 
 // Branch analysis.
 bool AArch64InstrInfo::analyzeBranch(MachineBasicBlock &MBB,