Reapply "InstCombine: Reduce trunc (shl x, K) width."

[arsenm]

Summary

This reapplies r272987 with a fix for infinitely looping
when the truncated value is another shift of a constant.

[arsenm]

ping

[majnemer]

Sorry for the delay, I forgot to hit submit...

lib/Transforms/InstCombine/InstCombineCasts.cpp

579

isn't non-native

Can we simplify that down to "native" ?

test/Transforms/InstCombine/cast.ll

990

This seems like a pessimization. Any ideas?

[arsenm]

Fix unnecessary test change, comment

test/Transforms/InstCombine/cast.ll

990

This is leftover junk, the test change isn't necessary

[majnemer]

lib/Transforms/InstCombine/InstCombineCasts.cpp

565–566

This comment seems duplicated.

579

Can we replace "isn't non-native" with "is native"?

580

Consider using m_APInt here, it handles vector splats.

584

I think it'd be nice to use getScalarSizeInBits so that the code is more vector ready.

test/Transforms/InstCombine/2011-05-28-swapmulsub.ll

36

What happens with this i16?

[arsenm]

Add vector tests, check i16 use

[majnemer]

lib/Transforms/InstCombine/InstCombineCasts.cpp

572

Can m_ConstantInt be m_Constant here?

580

Could you use m_APInt instead of m_ConstantInt?

[arsenm]

lib/Transforms/InstCombine/InstCombineCasts.cpp

580

This just adds more clutter without changing the other code before this since it's re-using Cst and the whole block is already skipped for !isa<IntegerType>

[arsenm]

lib/Transforms/InstCombine/InstCombineCasts.cpp

572

This would also require an additional variable since Cst is ConstantInt

[majnemer]

lib/Transforms/InstCombine/InstCombineCasts.cpp

572

I think we can afford an extra variable.

580

OK.

[arsenm]

r281379

lib/Transforms/InstCombine/InstCombineCasts.cpp

if (Src->hasOneUse() &&
     // bits).
     if (Cst->getValue().ult(ASize)) {
       Value *Shift = Builder->CreateAShr(A, Cst->getZExtValue());
       Shift->takeName(Src);
       return CastInst::CreateIntegerCast(Shift, CI.getType(), true);
     }
   }
 
   // Transform "trunc (and X, cst)" -> "and (trunc X), cst" so long as the dest
   // type isn't non-native.
   if (Src->hasOneUse() && isa<IntegerType>(SrcTy) &&
-      ShouldChangeType(SrcTy, DestTy) &&
-      match(Src, m_And(m_Value(A), m_ConstantInt(Cst)))) {
+      ShouldChangeType(SrcTy, DestTy)) {
+
+    // Transform "trunc (and X, cst)" -> "and (trunc X), cst" so long as the dest
+    // type isn't non-native.
+    if (match(Src, m_And(m_Value(A), m_ConstantInt(Cst)))) {
       Value *NewTrunc = Builder->CreateTrunc(A, DestTy, A->getName() + ".tr");
       return BinaryOperator::CreateAnd(NewTrunc,
                                        ConstantExpr::getTrunc(Cst, DestTy));
     }
 
+    // Transform "trunc (shl X, cst)" -> "shl (trunc X), cst" so long as the
+    // dest type isn't non-native and cst < dest size.
+    if (match(Src, m_Shl(m_Value(A), m_ConstantInt(Cst))) &&
+        !match(A, m_Shr(m_Value(), m_Constant()))) {
+      // Skip shifts of shift by constants. It undoes a combine in
+      // FoldShiftByConstant and is the extend in reg pattern.
+      const unsigned DestSize = DestTy->getPrimitiveSizeInBits();
+      if (Cst->getValue().ult(DestSize)) {
+        Value *NewTrunc = Builder->CreateTrunc(A, DestTy, A->getName() + ".tr");
+
+        return BinaryOperator::Create(
+          Instruction::Shl, NewTrunc,
+          ConstantInt::get(DestTy, Cst->getValue().trunc(DestSize)));
+      }
+    }
+  }
+
   if (Instruction *I = foldVecTruncToExtElt(CI, *this, DL))
     return I;
 
   return nullptr;
 }
 
 /// Transform (zext icmp) to bitwise / integer operations in order to eliminate
 /// the icmp.

test/Transforms/InstCombine/2011-05-28-swapmulsub.ll

entry:
   store i32 %on_off, i32* %on_off.addr, align 4
   store i32 %q, i32* %q.addr, align 4
   %tmp = load i32, i32* %q.addr, align 4
   %tmp1 = load i32, i32* %on_off.addr, align 4
   %sub = sub i32 %tmp, %tmp1
 ; CHECK-NOT: mul i32
   %mul = mul i32 %sub, -4
 ; CHECK: sub i32
-; CHECK-NEXT: shl
+; CHECK-NEXT: trunc i32
+; CHECK-NEXT: shl i16
   store i32 %mul, i32* %a, align 4
   %tmp2 = load i32, i32* %a, align 4
   %conv = trunc i32 %tmp2 to i16
   ret i16 %conv
 }
 
 define zeroext i16 @foo3(i32 %on_off) nounwind uwtable ssp {
 entry:

test/Transforms/InstCombine/cast.ll

 ; CHECK-NEXT:    [[O:%.*]] = trunc i128 %i to i64
 ; CHECK-NEXT:    [[PP1:%.*]] = getelementptr double, double* %p, i64 [[O]]
 ; CHECK-NEXT:    [[L:%.*]] = load double, double* [[PP1]], align 8
 ; CHECK-NEXT:    ret double [[L]]
 ;
   %lo = shl nsw i128 %i, 3
   %o = trunc i128 %lo to i64
   %q = bitcast double* %p to i8*
-  %pp = getelementptr inbounds i8, i8* %q, i64 %o
+  %pp = getelementptr i8, i8* %q, i64 %o
   %r = bitcast i8* %pp to double*
   %l = load double, double* %r
   ret double %l
 }
 
 define double @test74(double *%p, i64 %i) {
 ; CHECK-LABEL: @test74(
 ; CHECK-NEXT:    [[PP1:%.*]] = getelementptr inbounds double, double* %p, i64 %i

test/Transforms/InstCombine/icmp.ll

;
   %gep2 = getelementptr inbounds i8, i8* %foo, i64 %j
   %cast1 = addrspacecast i32 addrspace(1)* %gep1 to i8*
   %cmp = icmp ult i8* %cast1, %gep2
   ret i1 %cmp
 }
 
 define i1 @test60_addrspacecast_larger(i8 addrspace(1)* %foo, i32 %i, i16 %j) {
 ; CHECK-LABEL: @test60_addrspacecast_larger(
-; CHECK-NEXT:    [[GEP1_IDX:%.*]] = shl nuw i32 %i, 2
-; CHECK-NEXT:    [[TMP1:%.*]] = trunc i32 [[GEP1_IDX]] to i16
-; CHECK-NEXT:    [[TMP2:%.*]] = icmp slt i16 [[TMP1]], %j
+; CHECK-NEXT:    [[TMP1:%.*]] = trunc i32 %i to i16
+; CHECK-NEXT:    [[SHL:%.*]] = shl i16 [[TMP1]], 2
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp slt i16 [[SHL]], %j
 ; CHECK-NEXT:    ret i1 [[TMP2]]
 ;
   %bit = addrspacecast i8 addrspace(1)* %foo to i32 addrspace(2)*
   %gep1 = getelementptr inbounds i32, i32 addrspace(2)* %bit, i32 %i
   %gep2 = getelementptr inbounds i8, i8 addrspace(1)* %foo, i16 %j
   %cast1 = addrspacecast i32 addrspace(2)* %gep1 to i8 addrspace(1)*
   %cmp = icmp ult i8 addrspace(1)* %cast1, %gep2
   ret i1 %cmp

test/Transforms/InstCombine/trunc.ll

define i32 @trunc_bitcast3(<4 x i32> %v) {
   %ext = trunc i128 %bc to i32
   ret i32 %ext
 
 ; CHECK-LABEL: @trunc_bitcast3(
 ; CHECK-NEXT:  %ext = extractelement <4 x i32> %v, i32 0
 ; CHECK-NEXT:  ret i32 %ext
 }
 
-; CHECK-LABEL: @trunc_shl_infloop(
-; CHECK: %tmp = lshr i64 %arg, 1
-; CHECK: %tmp21 = shl i64 %tmp, 2
-; CHECK: %tmp2 = trunc i64 %tmp21 to i32
-; CHECK: icmp sgt i32 %tmp2, 0
-define void @trunc_shl_infloop(i64 %arg) {
-bb:
-  %tmp = lshr i64 %arg, 1
-  %tmp1 = trunc i64 %tmp to i32
-  %tmp2 = shl i32 %tmp1, 2
-  %tmp3 = icmp sgt i32 %tmp2, 0
-  br i1 %tmp3, label %bb2, label %bb1
-
-bb1:
-  %tmp5 = sub i32 0, %tmp1
-  %tmp6 = sub i32 %tmp5, 1
-  unreachable
-
-bb2:
-  unreachable
+; CHECK-LABEL: @trunc_shl_31_i32_i64(
+; CHECK: %val.tr = trunc i64 %val to i32
+; CHECK-NEXT: shl i32 %val.tr, 31
+define i32 @trunc_shl_31_i32_i64(i64 %val) {
+  %shl = shl i64 %val, 31
+  %trunc = trunc i64 %shl to i32
+  ret i32 %trunc
+}
+
+; CHECK-LABEL: @trunc_shl_nsw_31_i32_i64(
+; CHECK: %val.tr = trunc i64 %val to i32
+; CHECK-NEXT: shl i32 %val.tr, 31
+define i32 @trunc_shl_nsw_31_i32_i64(i64 %val) {
+  %shl = shl nsw i64 %val, 31
+  %trunc = trunc i64 %shl to i32
+  ret i32 %trunc
+}
+
+; CHECK-LABEL: @trunc_shl_nuw_31_i32_i64(
+; CHECK: %val.tr = trunc i64 %val to i32
+; CHECK-NEXT: shl i32 %val.tr, 31
+define i32 @trunc_shl_nuw_31_i32_i64(i64 %val) {
+  %shl = shl nuw i64 %val, 31
+  %trunc = trunc i64 %shl to i32
+  ret i32 %trunc
+}
+
+; CHECK-LABEL: @trunc_shl_nsw_nuw_31_i32_i64(
+; CHECK: %val.tr = trunc i64 %val to i32
+; CHECK-NEXT: shl i32 %val.tr, 31
+define i32 @trunc_shl_nsw_nuw_31_i32_i64(i64 %val) {
+  %shl = shl nsw nuw i64 %val, 31
+  %trunc = trunc i64 %shl to i32
+  ret i32 %trunc
+}
+
+; CHECK-LABEL: @trunc_shl_15_i16_i64(
+; CHECK: %val.tr = trunc i64 %val to i16
+; CHECK-NEXT: shl i16 %val.tr, 15
+define i16 @trunc_shl_15_i16_i64(i64 %val) {
+  %shl = shl i64 %val, 15
+  %trunc = trunc i64 %shl to i16
+  ret i16 %trunc
+}
+
+; CHECK-LABEL: @trunc_shl_15_i16_i32(
+; CHECK: %val.tr = trunc i32 %val to i16
+; CHECK-NEXT: shl i16 %val.tr, 15
+define i16 @trunc_shl_15_i16_i32(i32 %val) {
+  %shl = shl i32 %val, 15
+  %trunc = trunc i32 %shl to i16
+  ret i16 %trunc
+}
+
+; CHECK-LABEL: @trunc_shl_7_i8_i64(
+; CHECK: %val.tr = trunc i64 %val to i8
+; CHECK-NEXT: shl i8 %val.tr, 7
+define i8 @trunc_shl_7_i8_i64(i64 %val) {
+  %shl = shl i64 %val, 7
+  %trunc = trunc i64 %shl to i8
+  ret i8 %trunc
+}
+
+; CHECK-LABEL: @trunc_shl_1_i2_i64(
+; CHECK: shl i64 %val, 1
+; CHECK-NEXT: trunc i64 %shl to i2
+define i2 @trunc_shl_1_i2_i64(i64 %val) {
+  %shl = shl i64 %val, 1
+  %trunc = trunc i64 %shl to i2
+  ret i2 %trunc
+}
+
+; CHECK-LABEL: @trunc_shl_1_i32_i64(
+; CHECK: %val.tr = trunc i64 %val to i32
+; CHECK-NEXT: shl i32 %val.tr, 1
+define i32 @trunc_shl_1_i32_i64(i64 %val) {
+  %shl = shl i64 %val, 1
+  %trunc = trunc i64 %shl to i32
+  ret i32 %trunc
+}
+
+; CHECK-LABEL: @trunc_shl_16_i32_i64(
+; CHECK: %val.tr = trunc i64 %val to i32
+; CHECK-NEXT: shl i32 %val.tr, 16
+define i32 @trunc_shl_16_i32_i64(i64 %val) {
+  %shl = shl i64 %val, 16
+  %trunc = trunc i64 %shl to i32
+  ret i32 %trunc
+}
+
+; CHECK-LABEL: @trunc_shl_33_i32_i64(
+; CHECK: ret i32 0
+define i32 @trunc_shl_33_i32_i64(i64 %val) {
+  %shl = shl i64 %val, 33
+  %trunc = trunc i64 %shl to i32
+  ret i32 %trunc
+}
+
+; CHECK-LABEL: @trunc_shl_32_i32_i64(
+; CHECK: ret i32 0
+define i32 @trunc_shl_32_i32_i64(i64 %val) {
+  %shl = shl i64 %val, 32
+  %trunc = trunc i64 %shl to i32
+  ret i32 %trunc
+}
+
+; TODO: Should be able to handle vectors
+; CHECK-LABEL: @trunc_shl_16_v2i32_v2i64(
+; CHECK: shl <2 x i64>
+define <2 x i32> @trunc_shl_16_v2i32_v2i64(<2 x i64> %val) {
+  %shl = shl <2 x i64> %val, <i64 16, i64 16>
+  %trunc = trunc <2 x i64> %shl to <2 x i32>
+  ret <2 x i32> %trunc
+}
+
+; CHECK-LABEL: @trunc_shl_nosplat_v2i32_v2i64(
+; CHECK: shl <2 x i64>
+define <2 x i32> @trunc_shl_nosplat_v2i32_v2i64(<2 x i64> %val) {
+  %shl = shl <2 x i64> %val, <i64 15, i64 16>
+  %trunc = trunc <2 x i64> %shl to <2 x i32>
+  ret <2 x i32> %trunc
+}
+
+; CHECK-LABEL: @trunc_shl_31_i32_i64_multi_use(
+; CHECK: shl i64 %val, 31
+; CHECK-NOT: shl i32
+; CHECK: trunc i64 %shl to i32
+; CHECK-NOT: shl i32
+define void @trunc_shl_31_i32_i64_multi_use(i64 %val, i32 addrspace(1)* %ptr0, i64 addrspace(1)* %ptr1) {
+  %shl = shl i64 %val, 31
+  %trunc = trunc i64 %shl to i32
+  store volatile i32 %trunc, i32 addrspace(1)* %ptr0
+  store volatile i64 %shl, i64 addrspace(1)* %ptr1
+  ret void
+}
+
+; CHECK-LABEL: @trunc_shl_lshr_infloop(
+; CHECK-NEXT: %tmp0 = lshr i64 %arg, 1
+; CHECK-NEXT: %tmp1 = shl i64 %tmp0, 2
+; CHECK-NEXT: %tmp2 = trunc i64 %tmp1 to i32
+; CHECK-NEXT: ret i32 %tmp2
+define i32 @trunc_shl_lshr_infloop(i64 %arg) {
+  %tmp0 = lshr i64 %arg, 1
+  %tmp1 = shl i64 %tmp0, 2
+  %tmp2 = trunc i64 %tmp1 to i32
+  ret i32 %tmp2
+}
+
+; CHECK-LABEL: @trunc_shl_ashr_infloop(
+; CHECK-NEXT: %tmp0 = ashr i64 %arg, 3
+; CHECK-NEXT: %tmp1 = shl nsw i64 %tmp0, 2
+; CHECK-NEXT: %tmp2 = trunc i64 %tmp1 to i32
+; CHECK-NEXT: ret i32 %tmp2
+define i32 @trunc_shl_ashr_infloop(i64 %arg) {
+  %tmp0 = ashr i64 %arg, 3
+  %tmp1 = shl i64 %tmp0, 2
+  %tmp2 = trunc i64 %tmp1 to i32
+  ret i32 %tmp2
+}
+
+; CHECK-LABEL: @trunc_shl_shl_infloop(
+; CHECK-NEXT: %arg.tr = trunc i64 %arg to i32
+; CHECK-NEXT: %tmp2 = shl i32 %arg.tr, 3
+; CHECK-NEXT: ret i32 %tmp2
+define i32 @trunc_shl_shl_infloop(i64 %arg) {
+  %tmp0 = shl i64 %arg, 1
+  %tmp1 = shl i64 %tmp0, 2
+  %tmp2 = trunc i64 %tmp1 to i32
+  ret i32 %tmp2
+}
+
+; CHECK-LABEL: @trunc_shl_lshr_var(
+; CHECK-NEXT: %tmp0 = lshr i64 %arg, %val
+; CHECK-NEXT: %tmp0.tr = trunc i64 %tmp0 to i32
+; CHECK-NEXT: %tmp2 = shl i32 %tmp0.tr, 2
+; CHECK-NEXT: ret i32 %tmp2
+define i32 @trunc_shl_lshr_var(i64 %arg, i64 %val) {
+  %tmp0 = lshr i64 %arg, %val
+  %tmp1 = shl i64 %tmp0, 2
+  %tmp2 = trunc i64 %tmp1 to i32
+  ret i32 %tmp2
+}
+
+; CHECK-LABEL: @trunc_shl_ashr_var(
+; CHECK-NEXT: %tmp0 = ashr i64 %arg, %val
+; CHECK-NEXT: %tmp0.tr = trunc i64 %tmp0 to i32
+; CHECK-NEXT: %tmp2 = shl i32 %tmp0.tr, 2
+; CHECK-NEXT: ret i32 %tmp2
+define i32 @trunc_shl_ashr_var(i64 %arg, i64 %val) {
+  %tmp0 = ashr i64 %arg, %val
+  %tmp1 = shl i64 %tmp0, 2
+  %tmp2 = trunc i64 %tmp1 to i32
+  ret i32 %tmp2
+}
+
+; CHECK-LABEL: @trunc_shl_shl_var(
+; CHECK-NEXT: %tmp0 = shl i64 %arg, %val
+; CHECK-NEXT: %tmp0.tr = trunc i64 %tmp0 to i32
+; CHECK-NEXT: %tmp2 = shl i32 %tmp0.tr, 2
+; CHECK-NEXT: ret i32 %tmp2
+define i32 @trunc_shl_shl_var(i64 %arg, i64 %val) {
+  %tmp0 = shl i64 %arg, %val
+  %tmp1 = shl i64 %tmp0, 2
+  %tmp2 = trunc i64 %tmp1 to i32
+  ret i32 %tmp2
 }