This is an archive of the discontinued LLVM Phabricator instance.

AVX512: support AVX512BW Intrinsic in 32bit mode.
ClosedPublic

Authored by igorb on Nov 30 2015, 5:14 AM.

Diff Detail

Repository
rL LLVM

Event Timeline

igorb updated this revision to Diff 41393.Nov 30 2015, 5:14 AM
igorb retitled this revision from to AVX512: support AVX512BW Intrinsic in 32bit mode..
igorb updated this object.
igorb added a reviewer: delena.
igorb set the repository for this revision to rL LLVM.
igorb added a subscriber: llvm-commits.
delena added inline comments.Nov 30 2015, 5:53 AM
lib/Target/X86/X86ISelLowering.cpp
16009

You can put assert:
if (Mask.getSimpleValueType() == MVT::i64 && Subtarget->is32Bit()) {
assert(MaskVT == MVT::v64i1 &&
assert(Subtarget->hasBWI() & ..

but it is not necessary

16010

extend / split

16012

Lo, Hi

16033

remove empty line

igorb updated this revision to Diff 41402.Nov 30 2015, 6:46 AM
igorb marked 4 inline comments as done.

Thanks for the review!

delena added inline comments.Dec 3 2015, 3:32 AM
lib/Target/X86/X86ISelLowering.cpp
16004

Can newMaskVT be i64?

igorb updated this revision to Diff 42005.Dec 5 2015, 11:49 PM
igorb marked an inline comment as done.

Thanks for the review!
Update patch according to you comments.

lib/Target/X86/X86ISelLowering.cpp
16004

we don't have such intrinsic meanwhile, but theoretically it is possible.

delena accepted this revision.Dec 5 2015, 11:54 PM
delena edited edge metadata.

LGTM

This revision is now accepted and ready to land.Dec 5 2015, 11:54 PM
This revision was automatically updated to reflect the committed changes.