AVX-512: Fixed a bug in "select" operation for i1 type

[delena]

Summary

A test failed on AVX-512, 32-bit target with
LLVM ERROR: Cannot select: t33: i1 = select_cc t25, Constant:i32<0>, t45, t42, seteq:ch

[igorb]

LGTM

[delena]

Thank you!

• Elena

../lib/Target/X86/X86ISelLowering.cpp

if (!Subtarget->useSoftFloat() && Subtarget->hasAVX512()) {
     setLoadExtAction(ISD::SEXTLOAD, MVT::v8i64,  MVT::v8i8,  Legal);
     setLoadExtAction(ISD::ZEXTLOAD, MVT::v8i64,  MVT::v8i16,  Legal);
     setLoadExtAction(ISD::SEXTLOAD, MVT::v8i64,  MVT::v8i16,  Legal);
     setLoadExtAction(ISD::ZEXTLOAD, MVT::v8i64,  MVT::v8i32,  Legal);
     setLoadExtAction(ISD::SEXTLOAD, MVT::v8i64,  MVT::v8i32,  Legal);
 
     setOperationAction(ISD::BR_CC,              MVT::i1,    Expand);
     setOperationAction(ISD::SETCC,              MVT::i1,    Custom);
+    setOperationAction(ISD::SELECT_CC,          MVT::i1,    Expand);
     setOperationAction(ISD::XOR,                MVT::i1,    Legal);
     setOperationAction(ISD::OR,                 MVT::i1,    Legal);
     setOperationAction(ISD::AND,                MVT::i1,    Legal);
     setOperationAction(ISD::SUB,                MVT::i1,    Custom);
     setOperationAction(ISD::ADD,                MVT::i1,    Custom);
     setOperationAction(ISD::MUL,                MVT::i1,    Custom);
     setOperationAction(ISD::LOAD,               MVT::v16f32, Legal);
     setOperationAction(ISD::LOAD,               MVT::v8f64, Legal);

../test/CodeGen/X86/avx512-cmp.ll

 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding | FileCheck %s
+; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=knl | FileCheck %s --check-prefix AVX512-32
 
 ; CHECK-LABEL: test1
 ; CHECK: vucomisd {{.*}}encoding: [0x62
 define double @test1(double %a, double %b) nounwind {
   %tobool = fcmp une double %a, %b
   br i1 %tobool, label %l1, label %l2
 
 l1:

  %b = and i64 %a, 1
  %cmp10.i = icmp eq i64 %b, 0
  br i1 %cmp10.i, label %A, label %B
 A:
  ret i32 6
 B:
  ret i32 7
 }
+
+; AVX512-32-LABEL: test10
+; AVX512-32: movl    4(%esp), %ecx
+; AVX512-32: cmpl    $9, (%ecx)
+; AVX512-32: seta    %al
+; AVX512-32: cmpl    $0, 4(%ecx)
+; AVX512-32: setg    %cl
+; AVX512-32: je
+; AVX512-32: movb    %cl, %al
+; AVX512-32: testb   $1, %al
+
+define void @test10(i64* %i.addr)  {
+
+  %x = load i64, i64* %i.addr, align 8
+  %cmp = icmp slt i64 %x, 10
+  br i1 %cmp, label %true, label %false
+
+true:
+  ret void
+
+false:
+  ret void
+}
 No newline at end of file