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[ARM] More care with Thumb1 writeback in ARMLoadStoreOptimizer
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Authored by scott-0 on Sep 29 2015, 3:32 AM.

Details

Summary

I noticed this problem when staring at some debug output. I added an assert which catches it with existing tests and a test case.

Diff Detail

Event Timeline

scott-0 updated this revision to Diff 35954.Sep 29 2015, 3:32 AM
scott-0 retitled this revision from to [ARM] More care with Thumb1 writeback in ARMLoadStoreOptimizer.
scott-0 updated this object.
scott-0 added a subscriber: MatzeB.Sep 29 2015, 3:48 AM

The patch looks fine but really should have a testcase, maybe creating a .mir test is feasible here?

scott-0 updated this revision to Diff 36100.Sep 30 2015, 6:51 AM

Yes, '-stop-after' makes it straight-forward to create a test case. Added. Thanks for the pointer.

scott-0 updated this object.Sep 30 2015, 6:52 AM
MatzeB accepted this revision.Sep 30 2015, 4:35 PM
MatzeB added a reviewer: MatzeB.

LGTM

test/CodeGen/ARM/thumb1-ldst-opt.ll
1 ↗(On Diff #36100)

I slightly prefer

target triple = "thumbv6m-none-none"

instead of passing -mtriple to llc (mainly because it safes typing for people manually invoking llc on a testcase).

This revision is now accepted and ready to land.Sep 30 2015, 4:35 PM
This revision was automatically updated to reflect the committed changes.

Committed including changing from -mtriple ... to target triple = ...

Thanks for the review.