New StackMap format

[kyulee1]

Summary

The current stackmap format exposed limitations. This new is based on the discussed proposal (http://lists.llvm.org/pipermail/llvm-dev/2015-July/087826.html).
In particular, there were missing correlation between functions and stackmap records, which required clients to keep track of the correlations. The new format fixes this issue.
The new format has additional information like function size and call size for the client's needs.
The format is now flat. Every contents are at a fixed offsets from the header, which makes parsing easier.
FrameRegister content has not been implemented yet, which will be reconciled after further clarification.
Note the plan is to keep two versions of stackmap in the current release allowing clients to update their use and then replace the existing version by the new one in the next release.

[hfinkel]

Please add -stackmap-version=2 test cases to all backends that support stackmaps. It would be nice to know that, at least, it does not assert somewhere.

docs/StackMaps.rst

468

Are we now guaranteeing that these are sorted by increasing offset?

lib/CodeGen/AsmPrinter/AsmPrinter.cpp

983

Don't need { } here.

lib/CodeGen/StackMaps.cpp

101

Don't need { } here.

[reames]

I've included some larger comments but have not bothered to do a full review. This change will need a lot of work before being ready to land. I strongly suggest separating out the refactorings from this patch to make it easier to review.

include/llvm/CodeGen/StackMaps.h

130

There is no reason to duplicate the entire class just to version the serialization format. Please fix this.

lib/CodeGen/AsmPrinter/AsmPrinter.cpp

968

I'm a bit confused, why are these now conditional on whether there's a stackmap?

(p.s. terminology wise we've been using StackMap. Please keep doing so. Changing it everywhere might be fine, changing it piecemeal is not.)

lib/CodeGen/StackMaps.cpp

371

This hook and forward patterns is unacceptably complex. Most of the code is the same for each version and can be shared.

lib/Target/AArch64/AArch64AsmPrinter.cpp

51

This appears to be a refactoring. Please separate into it's own change.

lib/Target/X86/X86MCInstLower.cpp

877

What's this needed for? We already have a label immediately after the call inst.

Also, ordering of the new lines w.r.t. old is confusing.

tools/llvm-readobj/llvm-readobj.cpp

220

The version is part of the file format. This is unnecessary.

docs/StackMaps.rst

 immediately after compiling a module and encode the information in its
 own format. Since the runtime controls the allocation of sections, it
 can reuse the same stack map space for multiple modules.
 
 Stackmap support is currently only implemented for 64-bit
 platforms. However, a 32-bit implementation should be able to use the
 same format with an insignificant amount of wasted space.
 
+Stack Map Format V2
+===================
+
+The current stackmap format exposed limitations. This new is based on
+the discussed proposal to overcome them.
+In particular, there were missing correlation between functions and
+stackmap records, which required clients to keep track of the correlations.
+The new format fixes this issue. The new format has additional information
+like function size and call size for the certian client's needs.
+The format is now flat. Every contents are at a fixed offsets from the header,
+which makes parsing easier.
+FrameRegister content has not been implemented yet, which will be reconciled
+after further clarification.
+Note the plan is to keep two versions of stackmap in the current release
+allowing clients to update their use and then replace the existing version
+by the new one in the next release.
+
+.. code-block:: none
+
+  Header {
+    uint8  : Stack Map Version (current version is 2)
+    uint8  : Reserved (expected to be 0)
+    uint16 : Reserved (expected to be 0)
+    uint32 : NumFunctions (NumFrameRecords)
+    uint32 : Constants Offset
+    uint32 : Frame Records Offset
+    uint32 : StackMap Records Offset
+    uint32 : Frame Registers Offset
+    uint32 : Locations Offset
+    uint32 : LiveOuts Offset
+  }
+  // Align to 8 bytes
+  Constants[] {
+    uint64 : LargeConstant
+  }
+  // Align to 8 bytes
+  FrameRecord[NumFrameRecords] {
+    uint64 : Function Address
+    uint32 : Function Size
+    uint32 : Stack Size
+    uint16 : Flags {
+      bool : HasFrame
+      bool : HasVariableSizeAlloc
+      bool : HasStackRealignment
+      bool : HasLiveOutInfo
+      bool : Reserved [12]
+    }
+    uint16 : Frame Base Register Dwarf RegNum
+    uint16 : StackMap Record Index
+    uint16 : Num StackMap Records
+    uint16 : Frame Register Index
+    uint16 : Num Frame Registers
+  }
+  // Align to 8 bytes
+  StackMapRecord[] {
+    uint64 : PatchPoint ID
+    uint32 : Instruction Offset
+    uint8  : Call size (bytes)
+    uint8  : Flags {
+      bool : HasLiveOutInfo
+      bool : Reserved [7]
+    }
+    uint16 : Location Index
+    uint16 : Num Locations
+    uint16 : LiveOut Index
+    uint16 : Num LiveOuts
+  }
+  // Align to 4 bytes
+  FrameRegister[] {
+    uint16 : Dwarf RegNum
+    int16  : Offset
+    uint8  : Size in Bytes
+    uint8  : Flags {
+      bool : IsSpilled
+      bool : Reserved [7]
+    }
+  }
+  // Align to 4 bytes
+  Location[] {
+    uint8  : Register | Direct | Indirect | Constant | ConstantIndex
+    uint8  : Size in Bytes
+    uint16 : Dwarf RegNum
+    int32  : Offset or SmallConstant
+  }
+  // Align to 2 bytes
+  LiveOuts[] {
+    uint16 : Dwarf RegNum
+    uint8  : Reserved
+    uint8  : Size in Bytes
+  }
+
 .. _stackmap-section:
 
 Stack Map Section
 ^^^^^^^^^^^^^^^^^
 
 A JIT compiler can easily access this section by providing its own
 memory manager via the LLVM C API
 ``LLVMCreateSimpleMCJITMemoryManager()``. When creating the memory

include/llvm/CodeGen/AsmPrinter.h

 
 #ifndef LLVM_CODEGEN_ASMPRINTER_H
 #define LLVM_CODEGEN_ASMPRINTER_H
 
 #include "llvm/ADT/MapVector.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/DwarfStringPoolEntry.h"
+#include "llvm/CodeGen/StackMaps.h"
 #include "llvm/IR/InlineAsm.h"
 #include "llvm/Support/DataTypes.h"
 #include "llvm/Support/ErrorHandling.h"
 
 namespace llvm {
 class AsmPrinterHandler;
 class BlockAddress;
 class ByteStreamer;
public:
   /// default, this is equal to CurrentFnSym.
   MCSymbol *CurrentFnSymForSize;
 
   /// Map global GOT equivalent MCSymbols to GlobalVariables and keep track of
   /// its number of uses by other globals.
   typedef std::pair<const GlobalVariable *, unsigned> GOTEquivUsePair;
   MapVector<const MCSymbol *, GOTEquivUsePair> GlobalGOTEquivs;
 
+  /// The stack maps
+  StackMaps SM;
+
 private:
   MCSymbol *CurrentFnBegin;
   MCSymbol *CurrentFnEnd;
   MCSymbol *CurExceptionSym;
 
   // The garbage collection metadata printer table.
   void *GCMetadataPrinters; // Really a DenseMap.
 

include/llvm/CodeGen/StackMaps.h

public:
   const MachineOperand &getCallTarget() const {
     return MI->getOperand(CallTargetPos);
   }
 
 private:
   const MachineInstr *MI;
 };
 
+/// StackMaps Version 2
+class StackMapsV2 {
+  friend class StackMaps;
+
+public:
+  struct Location {
+    enum LocationType {
+      Unprocessed,
+      Register,
+      Direct,
+      Indirect,
+      Constant,
+      ConstantIndex
+    };
+    LocationType Type;
+    unsigned Size;
+    unsigned Reg;
+    int64_t Offset;
+    Location() : Type(Unprocessed), Size(0), Reg(0), Offset(0) {}
+    Location(LocationType Type, unsigned Size, unsigned Reg, int64_t Offset)
+        : Type(Type), Size(Size), Reg(Reg), Offset(Offset) {}
+  };
+
+  struct LiveOutReg {
+    uint16_t Reg;
+    uint16_t DwarfRegNum;
+    uint16_t Size;
+
+    LiveOutReg() : Reg(0), DwarfRegNum(0), Size(0) {}
+    LiveOutReg(uint16_t Reg, uint16_t DwarfRegNum, uint16_t Size)
+        : Reg(Reg), DwarfRegNum(DwarfRegNum), Size(Size) {}
+  };
+
+  // OpTypes are used to encode information about the following logical
+  // operand (which may consist of several MachineOperands) for the
+  // OpParser.
+  typedef enum { DirectMemRefOp, IndirectMemRefOp, ConstantOp } OpType;
+
+  StackMapsV2(AsmPrinter &AP) : AP(AP) {}
+
+  void reset();
+
+  /// \brief Generate a stackmap record for a stackmap instruction.
+  ///
+  /// MI must be a raw STACKMAP, not a PATCHPOINT.
+  void recordStackMap(const MachineInstr &MI);
+
+  /// \brief Generate a stackmap record for a patchpoint instruction.
+  void recordPatchPoint(const MachineInstr &MI);
+
+  /// \brief Generate a stackmap record for a statepoint instruction.
+  void recordStatepoint(const MachineInstr &MI, MCSymbol *CallLabel = nullptr);
+
+  /// If there is any stack map data, create a stack map section and serialize
+  /// the map info into it. This clears the stack map data structures
+  /// afterwards.
+  void serializeToStackMapSection();
+
+  void createSubSectionLabelAndOffset(MCSymbol **SubSection, const MCExpr **);
+
+private:
+  static const char *WSMP;
+
+  typedef SmallVector<Location, 8> LocationVec;
+  typedef SmallVector<LiveOutReg, 8> LiveOutVec;
+  typedef MapVector<uint64_t, uint64_t> ConstantPool;
+
+  AsmPrinter &AP;
+  ConstantPool ConstPool;
+
+  MachineInstr::const_mop_iterator
+  parseOperand(MachineInstr::const_mop_iterator MOI,
+               MachineInstr::const_mop_iterator MOE, LocationVec &Locs,
+               LiveOutVec &LiveOuts) const;
+
+  /// \brief Create a live-out register record for the given register @p Reg.
+  LiveOutReg createLiveOutReg(unsigned Reg,
+                              const TargetRegisterInfo *TRI) const;
+
+  /// \brief Parse the register live-out mask and return a vector of live-out
+  /// registers that need to be recorded in the stackmap.
+  LiveOutVec parseRegisterLiveOutMask(const uint32_t *Mask) const;
+
+  /// This should be called by the MC lowering code _immediately_ before
+  /// lowering the MI to an MCInst. It records where the operands for the
+  /// instruction are stored, and outputs a label to record the offset of
+  /// the call from the start of the text section. In special cases (e.g. AnyReg
+  /// calling convention) the return register is also recorded if requested.
+  void recordStackMapOpers(const MachineInstr &MI, uint64_t ID,
+                           MachineInstr::const_mop_iterator MOI,
+                           MachineInstr::const_mop_iterator MOE,
+                           bool recordResult = false,
+                           MCSymbol *CallLabel = nullptr);
+
+  /// \brief Emit the constant pool.
+  void emitConstantPoolEntries(MCStreamer &OS);
+
+  //
+  // The followings are version2 Specific data structures
+  //
+  struct FrameRecord {
+    const MCSymbol *FunctionStart;
+    const MCExpr *FunctionSize; // used to compute Function Size
+    uint32_t StackSize;
+    union {
+      struct {
+        uint16_t HasFramePointerRegister : 1;
+        uint16_t HasVairableSizeAlloca : 1;
+        uint16_t HasStackRealignment : 1;
+        uint16_t HasLiveOutInfo : 1;
+      } FlagBits;
+      uint16_t FlagValue;
+    };
+
+    uint16_t FrameBaseRegister;
+    uint16_t StackMapRecordIndex;
+    uint16_t NumStackMapRecord;
+    FrameRecord()
+        : FunctionStart(nullptr), FunctionSize(nullptr), StackSize(0),
+          FlagValue(0), FrameBaseRegister(0), StackMapRecordIndex(-1),
+          NumStackMapRecord(0) {}
+  };
+
+  struct StackMapRecord {
+    uint64_t ID;
+    const MCExpr *Offset;
+    const MCExpr *Size;
+
+    union {
+      struct {
+        unsigned char HasLiveOutInfo : 1;
+      } FlagBits;
+      unsigned char FlagValue;
+    };
+
+    uint16_t LocationIndex;
+    uint16_t NumLocation;
+    uint16_t LiveOutIndex;
+    uint16_t NumLiveOut;
+
+    StackMapRecord()
+        : ID(0), Offset(nullptr), Size(nullptr), FlagValue(0), LocationIndex(0),
+          NumLocation(0), LiveOutIndex(0), NumLiveOut(0) {}
+
+    StackMapRecord(uint64_t ID, MCExpr *Offset, MCExpr *Size, uint16_t Flag,
+                   uint16_t LocationIndex, uint16_t NumLocation,
+                   uint16_t LiveOutIndex, uint16_t NumLiveOut)
+        : ID(ID), Offset(Offset), Size(Size), FlagValue(Flag),
+          LocationIndex(LocationIndex), NumLocation(NumLocation),
+          LiveOutIndex(LiveOutIndex), NumLiveOut(NumLiveOut) {}
+  };
+
+  typedef std::vector<LiveOutReg> LiveOutPool;
+  typedef std::vector<Location> LocationPool;
+  typedef std::vector<StackMapRecord> StackMapRecordPool;
+  typedef MapVector<MCSymbol *, FrameRecord> FrameRecordMap;
+
+  LiveOutPool LivePool;
+  LocationPool LocPool;
+  StackMapRecordPool StackPool;
+  FrameRecordMap FrameMap;
+
+  MCSymbol *ConstantSubSection;
+  const MCExpr *ConstantSubSectionOffset;
+  MCSymbol *FrameRecordSubSection;
+  const MCExpr *FrameRecordSubSectionOffset;
+  MCSymbol *StackMapSubSection;
+  const MCExpr *StackMapSubSectionOffset;
+  MCSymbol *LocationSubSection;
+  const MCExpr *LocationSubSectionOffset;
+  MCSymbol *LiveOutSubSection;
+  const MCExpr *LiveOutSubSectionOffset;
+
+  MCSymbol *SectionStart;
+
+public:
+  /// \brief Check if it needs to update FrameRecordMap
+  bool hasFrameMap();
+
+  /// \brief Update FrameRecordMap
+  void recordFrameMap(const MCExpr *Size);
+
+  /// \brief Emit the stackmap header.
+  void emitStackmapHeaderSubSection(MCStreamer &OS);
+
+  /// \brief Emit the constant pool.
+  void emitConstantPoolEntriesSubSection(MCStreamer &OS);
+
+  /// \brief Emit the function frame record for each function.
+  void emitFunctionFrameRecordsSubSection(MCStreamer &OS);
+
+  /// \brief Emit the callsite info for each stackmap/patchpoint intrinsic call.
+  void emitStackMapSubSection(MCStreamer &OS);
+
+  /// \brief Emit location
+  void emitLocationSubSection(MCStreamer &OS);
+
+  /// \brief Emit live out
+  void emitLiveOutSubSection(MCStreamer &OS);
+};
+
+// StackMap V1 (default) and V2 are supported for one release cycle,
+/// and deprecate v1 in the next release.
 class StackMaps {
 public:
   struct Location {
     enum LocationType {
       Unprocessed,
       Register,
       Direct,
       Indirect,
       Constant,
       ConstantIndex
     };
     LocationType Type;
     unsigned Size;
     unsigned Reg;
     int64_t Offset;
     Location() : Type(Unprocessed), Size(0), Reg(0), Offset(0) {}
     Location(LocationType Type, unsigned Size, unsigned Reg, int64_t Offset)
         : Type(Type), Size(Size), Reg(Reg), Offset(Offset) {}
   };
 
   struct LiveOutReg {
-    unsigned short Reg;
-    unsigned short DwarfRegNum;
-    unsigned short Size;
+    uint16_t Reg;
+    uint16_t DwarfRegNum;
+    uint16_t Size;
 
     LiveOutReg() : Reg(0), DwarfRegNum(0), Size(0) {}
-    LiveOutReg(unsigned short Reg, unsigned short DwarfRegNum,
-               unsigned short Size)
+    LiveOutReg(uint16_t Reg, uint16_t DwarfRegNum, uint16_t Size)
         : Reg(Reg), DwarfRegNum(DwarfRegNum), Size(Size) {}
   };
 
   // OpTypes are used to encode information about the following logical
   // operand (which may consist of several MachineOperands) for the
   // OpParser.
   typedef enum { DirectMemRefOp, IndirectMemRefOp, ConstantOp } OpType;
 
   StackMaps(AsmPrinter &AP);
 
-  void reset() {
-    CSInfos.clear();
-    ConstPool.clear();
-    FnStackSize.clear();
-  }
+  void reset();
+
+  /// \brief Check if it needs to update FrameRecordMap (version 2 only)
+  bool hasFrameMap();
+
+  /// \brief Update FrameRecordMap (version 2 only)
+  void recordFrameMap(const MCExpr *Size);
 
   /// \brief Generate a stackmap record for a stackmap instruction.
   ///
   /// MI must be a raw STACKMAP, not a PATCHPOINT.
   void recordStackMap(const MachineInstr &MI);
 
   /// \brief Generate a stackmap record for a patchpoint instruction.
   void recordPatchPoint(const MachineInstr &MI);
 
   /// \brief Generate a stackmap record for a statepoint instruction.
-  void recordStatepoint(const MachineInstr &MI);
+  void recordStatepoint(const MachineInstr &MI, MCSymbol *CallLabel = nullptr);
 
   /// If there is any stack map data, create a stack map section and serialize
   /// the map info into it. This clears the stack map data structures
   /// afterwards.
   void serializeToStackMapSection();
 
 private:
+  /// Hold StackMapsV2 object to handle version2 operations.
+  StackMapsV2 SM2;
+
   static const char *WSMP;
+
   typedef SmallVector<Location, 8> LocationVec;
   typedef SmallVector<LiveOutReg, 8> LiveOutVec;
   typedef MapVector<uint64_t, uint64_t> ConstantPool;
   typedef MapVector<const MCSymbol *, uint64_t> FnStackSizeMap;
 
   struct CallsiteInfo {
     const MCExpr *CSOffsetExpr;
     uint64_t ID;
private:
   void emitCallsiteEntries(MCStreamer &OS);
 
   void print(raw_ostream &OS);
   void debug() { print(dbgs()); }
 };
 }
 
 #endif
+

include/llvm/Object/StackMapParser.h

std::size_t getConstantOffset(unsigned ConstantIndex) const {
     return ConstantsListOffset + ConstantIndex * ConstantSize;
   }
 
   ArrayRef<uint8_t> StackMapSection;
   unsigned ConstantsListOffset;
   std::vector<unsigned> StackMapRecordOffsets;
 };
 
+template <support::endianness Endianness> class StackMapV2Parser {
+public:
+  template <typename AccessorT> class AccessorIterator {
+  public:
+    AccessorIterator(AccessorT A) : A(A) {}
+    AccessorIterator &operator++() {
+      A = A.next();
+      return *this;
+    }
+    AccessorIterator operator++(int) {
+      auto tmp = *this;
+      ++*this;
+      return tmp;
+    }
+
+    bool operator==(const AccessorIterator &Other) { return A.P == Other.A.P; }
+
+    bool operator!=(const AccessorIterator &Other) { return !(*this == Other); }
+
+    AccessorT &operator*() { return A; }
+    AccessorT *operator->() { return &A; }
+
+  private:
+    AccessorT A;
+  };
+
+  /// Accessor for constants.
+  class ConstantAccessor {
+    friend class StackMapV2Parser;
+
+  public:
+    /// Return the value of this constant.
+    uint64_t getValue() const { return read<uint64_t>(P); }
+
+  private:
+    ConstantAccessor(const uint8_t *P) : P(P) {}
+
+    ConstantAccessor next() const {
+      return ConstantAccessor(P + StackMapV2Parser::ConstantAccessorSize);
+    }
+
+    const uint8_t *P;
+  };
+
+  // Forward-declare RecordAccessor so we can friend it below.
+  class StackMapRecordAccessor;
+
+  enum class LocationKind : uint8_t {
+    Register = 1,
+    Direct = 2,
+    Indirect = 3,
+    Constant = 4,
+    ConstantIndex = 5
+  };
+
+  /// Accessor for location records.
+  class LocationAccessor {
+    friend class StackMapV2Parser;
+    friend class StackMapRecordAccessor;
+
+  public:
+    /// Get the Kind for this location.
+    LocationKind getKind() const { return LocationKind(P[KindOffset]); }
+
+    /// Get the Dwarf register number for this location.
+    uint16_t getDwarfRegNum() const {
+      return read<uint16_t>(P + DwarfRegNumOffset);
+    }
+
+    /// Get the small-constant for this location. (Kind must be Constant).
+    uint32_t getSmallConstant() const {
+      assert(getKind() == LocationKind::Constant && "Not a small constant.");
+      return read<uint32_t>(P + SmallConstantOffset);
+    }
+
+    /// Get the constant-index for this location. (Kind must be ConstantIndex).
+    uint32_t getConstantIndex() const {
+      assert(getKind() == LocationKind::ConstantIndex &&
+             "Not a constant-index.");
+      return read<uint32_t>(P + SmallConstantOffset);
+    }
+
+    /// Get the offset for this location. (Kind must be Direct or Indirect).
+    int32_t getOffset() const {
+      assert((getKind() == LocationKind::Direct ||
+              getKind() == LocationKind::Indirect) &&
+             "Not direct or indirect.");
+      return read<int32_t>(P + SmallConstantOffset);
+    }
+
+  private:
+    LocationAccessor(const uint8_t *P) : P(P) {}
+
+    LocationAccessor next() const {
+      return LocationAccessor(P + StackMapV2Parser::LocationAccessorSize);
+    }
+
+    static const int KindOffset = 0;
+    static const int DwarfRegNumOffset = KindOffset + sizeof(uint16_t);
+    static const int SmallConstantOffset = DwarfRegNumOffset + sizeof(uint16_t);
+
+    const uint8_t *P;
+  };
+
+  /// Accessor for stackmap live-out fields.
+  class LiveOutAccessor {
+    friend class StackMapV2Parser;
+    friend class StackMapRecordAccessor;
+
+  public:
+    /// Get the Dwarf register number for this live-out.
+    uint16_t getDwarfRegNum() const {
+      return read<uint16_t>(P + DwarfRegNumOffset);
+    }
+
+    /// Get the size in bytes of live [sub]register.
+    unsigned getSizeInBytes() const { return read<uint8_t>(P + SizeOffset); }
+
+  private:
+    LiveOutAccessor(const uint8_t *P) : P(P) {}
+
+    LiveOutAccessor next() const {
+      return LiveOutAccessor(P + StackMapV2Parser::LiveOutAccessorSize);
+    }
+
+    static const int DwarfRegNumOffset = 0;
+    static const int SizeOffset =
+        DwarfRegNumOffset + sizeof(uint16_t) + sizeof(uint8_t);
+
+    const uint8_t *P;
+  };
+
+  /// Accessor for stackmap records.
+  class StackMapRecordAccessor {
+    friend class StackMapV2Parser;
+
+  public:
+    typedef AccessorIterator<LocationAccessor> location_iterator;
+    typedef AccessorIterator<LiveOutAccessor> liveout_iterator;
+
+    /// Get the patchpoint/stackmap ID for this record.
+    uint64_t getID() const { return read<uint64_t>(P + IDOffset); }
+
+    /// Get the instruction offset (from the start of the containing function).
+    uint32_t getInstructionOffset() const {
+      return read<uint32_t>(P + InstructionOffsetOffset);
+    }
+
+    /// Get the call size.
+    uint8_t getCallSize() const { return read<uint8_t>(P + CallSizeOffset); }
+
+    /// Get the flags.
+    uint8_t getFlags() const { return read<uint8_t>(P + FlagsOffset); }
+
+    /// Get the location index.
+    uint16_t getLocationIndex() const {
+      return read<uint16_t>(P + LocationIndexOffset);
+    }
+
+    /// Get the number of location.
+    uint16_t getNumLocations() const {
+      return read<uint16_t>(P + NumLocationOffset);
+    }
+
+    /// Begin iterator for locations.
+    location_iterator location_begin() const {
+      return location_iterator(SMParser->getLocation(getLocationIndex()));
+    }
+
+    /// End iterator for locations.
+    location_iterator location_end() const {
+      return location_iterator(
+          SMParser->getLocation(getLocationIndex() + getNumLocations()));
+    }
+
+    /// Iterator range for locations.
+    iterator_range<location_iterator> locations() const {
+      return make_range(location_begin(), location_end());
+    }
+
+    /// Get the live-out index.
+    uint16_t getLiveOutIndex() const {
+      return read<uint16_t>(P + LiveOutIndexOffset);
+    }
+
+    /// Get the number of live-out.
+    uint16_t getNumLiveOuts() const {
+      return read<uint16_t>(P + NumLiveOutOffset);
+    }
+
+    /// Begin iterator for live-outs.
+    liveout_iterator liveouts_begin() const {
+      return liveout_iterator(SMParser->getLiveOut(getLiveOutIndex()));
+    }
+
+    /// End iterator for live-outs.
+    liveout_iterator liveouts_end() const {
+      return liveout_iterator(
+          SMParser->getLiveOut(getLiveOutIndex() + getNumLiveOuts()));
+    }
+
+    /// Iterator range for live-outs.
+    iterator_range<liveout_iterator> liveouts() const {
+      return make_range(liveouts_begin(), liveouts_end());
+    }
+
+  private:
+    StackMapRecordAccessor(const uint8_t *P, StackMapV2Parser const *SMParser)
+        : P(P), SMParser(SMParser) {}
+
+    StackMapRecordAccessor next() const {
+      return StackMapRecordAccessor(
+          P + StackMapV2Parser::StackMapRecordAccessorSize, SMParser);
+    }
+
+    static const unsigned IDOffset = 0;
+    static const unsigned InstructionOffsetOffset = IDOffset + sizeof(uint64_t);
+    static const unsigned CallSizeOffset =
+        InstructionOffsetOffset + sizeof(uint32_t);
+    static const unsigned FlagsOffset = CallSizeOffset + sizeof(uint8_t);
+    static const unsigned LocationIndexOffset = FlagsOffset + sizeof(uint8_t);
+    static const unsigned NumLocationOffset =
+        LocationIndexOffset + sizeof(uint16_t);
+    static const unsigned LiveOutIndexOffset =
+        NumLocationOffset + sizeof(uint16_t);
+    static const unsigned NumLiveOutOffset =
+        LiveOutIndexOffset + sizeof(uint16_t);
+
+    const uint8_t *P;
+    StackMapV2Parser const *SMParser;
+  };
+
+  /// Accessor for Frame Record
+  class FrameRecordAccessor {
+    friend class StackMapV2Parser;
+
+  public:
+    typedef AccessorIterator<StackMapRecordAccessor> stackmaprecord_iterator;
+
+    /// Get function address
+    uint64_t getFunctionAddress() const {
+      return read<uint64_t>(P + FunctionAddressOffset);
+    }
+
+    /// Get the function size.
+    uint32_t getFunctionSize() const {
+      return read<uint32_t>(P + FunctionSizeOffset);
+    }
+
+    /// Get the stack size.
+    uint32_t getStackSize() const {
+      return read<uint32_t>(P + StackSizeOffset);
+    }
+
+    /// Get the flags.
+    uint16_t getFlags() const { return read<uint16_t>(P + FlagsOffset); }
+
+    /// Get the frame base register.
+    uint16_t getFrameBaseRegister() const {
+      return read<uint16_t>(P + FrameBaseRegisterOffset);
+    }
+
+    /// Get the stack map record index
+    uint16_t getStackMapRecordIndex() const {
+      return read<uint16_t>(P + StackMapRecordIndexOffset);
+    }
+
+    // Get the number of stack map record.
+    uint16_t getNumStackMapRecords() const {
+      return read<uint16_t>(P + NumStackMapRecordsOffset);
+    }
+
+    /// Begin iterator for stack map records
+    stackmaprecord_iterator stackmaprecords_begin() const {
+      return stackmaprecord_iterator(
+          SMParser->getStackMapRecord(getStackMapRecordIndex()));
+    }
+
+    /// End iterator for stack map records
+    stackmaprecord_iterator stackmaprecords_end() const {
+      return stackmaprecord_iterator(SMParser->getStackMapRecord(
+          getStackMapRecordIndex() + getNumStackMapRecords()));
+    }
+
+    /// Iterator range for stack map records
+    iterator_range<stackmaprecord_iterator> stackmaprecords() const {
+      return make_range(stackmaprecords_begin(), stackmaprecords_end());
+    }
+
+  private:
+    FrameRecordAccessor(const uint8_t *P, StackMapV2Parser const *SMParser)
+        : P(P), SMParser(SMParser) {}
+
+    FrameRecordAccessor next() const {
+      return FrameRecordAccessor(P + StackMapV2Parser::FrameRecordAccessorSize,
+                                 SMParser);
+    }
+
+    static const unsigned FunctionAddressOffset = 0;
+    static const unsigned FunctionSizeOffset =
+        FunctionAddressOffset + sizeof(uint64_t);
+    static const unsigned StackSizeOffset =
+        FunctionSizeOffset + sizeof(uint32_t);
+    static const unsigned FlagsOffset = StackSizeOffset + sizeof(uint32_t);
+    static const unsigned FrameBaseRegisterOffset =
+        FlagsOffset + sizeof(uint16_t);
+    static const unsigned StackMapRecordIndexOffset =
+        FrameBaseRegisterOffset + sizeof(uint16_t);
+    static const unsigned NumStackMapRecordsOffset =
+        StackMapRecordIndexOffset + sizeof(uint16_t);
+
+    const uint8_t *P;
+    StackMapV2Parser const *SMParser;
+  };
+
+  /// Construct a parser for a version-1 stackmap. StackMap data will be read
+  /// from the given array.
+  StackMapV2Parser(ArrayRef<uint8_t> StackMapSection)
+      : StackMapSection(StackMapSection) {
+
+    assert(StackMapSection[0] == 2 &&
+           "StackMapParser can only parse version 2 stackmaps");
+  }
+
+  typedef AccessorIterator<FrameRecordAccessor> function_iterator;
+
+  /// Get the version number of this stackmap. (Always returns 2).
+  unsigned getVersion() const { return 2; }
+
+  /// Get the number of functions in the stack map.
+  uint32_t getNumFunctions() const {
+    return read<uint32_t>(&StackMapSection[NumFunctionsOffset]);
+  }
+
+  /// Get offset to Constants
+  uint32_t getConstantOffset() const {
+    return read<uint32_t>(&StackMapSection[ConstantsOffset]);
+  }
+
+  /// Get a Constant offset
+  std::size_t getConstantOffset(unsigned ConstantIndex) const {
+    return getConstantOffset() + ConstantIndex * ConstantAccessorSize;
+  }
+
+  /// Return an FunctionAccessor for the given function index.
+  ConstantAccessor getConstant(unsigned ConstantIndex) const {
+    return ConstantAccessor(StackMapSection.data() +
+                            getConstantOffset(ConstantIndex));
+  }
+
+  /// Get offset to Frame records (functions)
+  uint32_t getFrameRecordOffset() const {
+    return read<uint32_t>(&StackMapSection[FrameRecordOffset]);
+  }
+
+  /// Get a function offset
+  std::size_t getFrameRecordOffset(unsigned FunctionIndex) const {
+    return getFrameRecordOffset() + FunctionIndex * FrameRecordAccessorSize;
+  }
+
+  /// Return an FunctionAccessor for the given function index.
+  FrameRecordAccessor getFrameRecord(unsigned FunctionIndex) const {
+    return FrameRecordAccessor(
+        StackMapSection.data() + getFrameRecordOffset(FunctionIndex), this);
+  }
+
+  /// Get offset to Stack Map Records
+  uint32_t getStackMapRecordOffset() const {
+    return read<uint32_t>(&StackMapSection[StackMapRecordOffset]);
+  }
+
+  /// Get a stack map record offset for the given index
+  std::size_t getStackMapRecordOffset(unsigned StackMapRecordIndex) const {
+    return getStackMapRecordOffset() +
+           StackMapRecordIndex * StackMapRecordAccessorSize;
+  }
+
+  /// Return an StackMapRecordAccessor for the given index.
+  StackMapRecordAccessor getStackMapRecord(unsigned StackMapRecordIndex) const {
+    return StackMapRecordAccessor(
+        StackMapSection.data() + getStackMapRecordOffset(StackMapRecordIndex),
+        this);
+  }
+
+  /// Get offset to location
+  uint32_t getLocationOffset() const {
+    return read<uint32_t>(&StackMapSection[LocationOffset]);
+  }
+
+  /// Get a location offset for the given index
+  std::size_t getLocationOffset(unsigned LocationIndex) const {
+    return getLocationOffset() + LocationIndex * LocationAccessorSize;
+  }
+
+  /// Return an StackMapRecordAccessor for the given index.
+  LocationAccessor getLocation(unsigned LocationIndex) const {
+    return LocationAccessor(StackMapSection.data() +
+                            getLocationOffset(LocationIndex));
+  }
+
+  /// Get offset to live out
+  uint32_t getLiveOutOffset() const {
+    return read<uint32_t>(&StackMapSection[LiveOutOffset]);
+  }
+
+  /// Get a location offset for the given index
+  std::size_t getLiveOutOffset(unsigned LiveOutIndex) const {
+    return getLiveOutOffset() + LiveOutIndex * LiveOutAccessorSize;
+  }
+
+  /// Return an StackMapRecordAccessor for the given index.
+  LiveOutAccessor getLiveOut(unsigned LiveOutIndex) const {
+    return LiveOutAccessor(StackMapSection.data() +
+                           getLiveOutOffset(LiveOutIndex));
+  }
+
+  /// Begin iterator for function/frame record.
+  function_iterator functions_begin() const {
+    return function_iterator(getFrameRecord(0));
+  }
+
+  /// End iterator for function/frame record.
+  function_iterator functions_end() const {
+    return function_iterator(getFrameRecord(getNumFunctions()));
+  }
+
+  /// Iterator range for functions.
+  iterator_range<function_iterator> functions() const {
+    return make_range(functions_begin(), functions_end());
+  }
+
+private:
+  template <typename T> static T read(const uint8_t *P) {
+    return support::endian::read<T, Endianness, 1>(P);
+  }
+
+  static const unsigned HeaderOffset = 0;
+  static const unsigned NumFunctionsOffset = HeaderOffset + sizeof(uint32_t);
+
+  static const unsigned ConstantsOffset = HeaderOffset + sizeof(uint32_t) * 2;
+  static const unsigned FrameRecordOffset = HeaderOffset + sizeof(uint32_t) * 3;
+  static const unsigned StackMapRecordOffset =
+      HeaderOffset + sizeof(uint32_t) * 4;
+  static const unsigned LocationOffset = HeaderOffset + sizeof(uint32_t) * 5;
+  static const unsigned LiveOutOffset = HeaderOffset + sizeof(uint32_t) * 6;
+
+  static const unsigned ConstantAccessorSize = sizeof(uint64_t);
+  static const unsigned FrameRecordAccessorSize = 3 * sizeof(uint64_t);
+  static const unsigned StackMapRecordAccessorSize = 3 * sizeof(uint64_t);
+  static const unsigned LocationAccessorSize = 2 * sizeof(uint32_t);
+  static const unsigned LiveOutAccessorSize = 2 * sizeof(uint16_t);
+
+  ArrayRef<uint8_t> StackMapSection;
+};
 }
 
 #endif

lib/CodeGen/AsmPrinter/AsmPrinter.cpp

static unsigned getGVAlignmentLog2(const GlobalValue *GV, const DataLayout &DL,
   if (GVAlign > NumBits || GV->hasSection())
     NumBits = GVAlign;
   return NumBits;
 }
 
 AsmPrinter::AsmPrinter(TargetMachine &tm, std::unique_ptr<MCStreamer> Streamer)
     : MachineFunctionPass(ID), TM(tm), MAI(tm.getMCAsmInfo()),
       OutContext(Streamer->getContext()), OutStreamer(std::move(Streamer)),
-      LastMI(nullptr), LastFn(0), Counter(~0U) {
+      LastMI(nullptr), LastFn(0), Counter(~0U), SM(*this) {
   DD = nullptr;
   MMI = nullptr;
   LI = nullptr;
   MF = nullptr;
   CurExceptionSym = CurrentFnSym = CurrentFnSymForSize = nullptr;
   CurrentFnBegin = nullptr;
   CurrentFnEnd = nullptr;
   GCMetadataPrinters = nullptr;
for (const auto &BB : *F) {
     OutStreamer->AddComment("Address of block that was removed by CodeGen");
     OutStreamer->EmitLabel(Sym);
   }
 
   // Emit target-specific gunk after the function body.
   EmitFunctionBodyEnd();
 
   if (!MMI->getLandingPads().empty() || MMI->hasDebugInfo() ||
-      MAI->hasDotTypeDotSizeDirective()) {
+      MAI->hasDotTypeDotSizeDirective() || SM.hasFrameMap()) {
     // Create a symbol for the end of function.
     CurrentFnEnd = createTempSymbol("func_end");
     OutStreamer->EmitLabel(CurrentFnEnd);
   }
 
   // If the target wants a .size directive for the size of the function, emit
   // it.
-  if (MAI->hasDotTypeDotSizeDirective()) {
+  if (MAI->hasDotTypeDotSizeDirective() || SM.hasFrameMap()) {
     // We can get the size as difference between the function label and the
     // temp label.
     const MCExpr *SizeExp = MCBinaryExpr::createSub(
         MCSymbolRefExpr::create(CurrentFnEnd, OutContext),
         MCSymbolRefExpr::create(CurrentFnSymForSize, OutContext), OutContext);
+
+    if (SM.hasFrameMap()) {
+      SM.recordFrameMap(SizeExp);
+    }
+
+    if (MAI->hasDotTypeDotSizeDirective()) {
       if (auto Sym = dyn_cast<MCSymbolELF>(CurrentFnSym))
         OutStreamer->emitELFSize(Sym, SizeExp);
     }
+  }
 
   for (const HandlerInfo &HI : Handlers) {
     NamedRegionTimer T(HI.TimerName, HI.TimerGroupName, TimePassesIsEnabled);
     HI.Handler->markFunctionEnd();
   }
 
   // Print out jump tables referenced by the function.
   EmitJumpTableInfo();

lib/CodeGen/StackMaps.cpp

 #include "llvm/MC/MCObjectFileInfo.h"
 #include "llvm/MC/MCSectionMachO.h"
 #include "llvm/MC/MCStreamer.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetOpcodes.h"
 #include "llvm/Target/TargetRegisterInfo.h"
 #include "llvm/Target/TargetSubtargetInfo.h"
+#include "llvm/Target/TargetFrameLowering.h"
 #include <iterator>
 
 using namespace llvm;
 
 #define DEBUG_TYPE "stackmaps"
 
 static cl::opt<int> StackMapVersion(
     "stackmap-version", cl::init(1),
     cl::desc("Specify the stackmap encoding version (default = 1)"));
 
 const char *StackMaps::WSMP = "Stack Maps: ";
+const char *StackMapsV2::WSMP = "Stack MapsV2: ";
 
 PatchPointOpers::PatchPointOpers(const MachineInstr *MI)
     : MI(MI), HasDef(MI->getOperand(0).isReg() && MI->getOperand(0).isDef() &&
                      !MI->getOperand(0).isImplicit()),
       IsAnyReg(MI->getOperand(getMetaIdx(CCPos)).getImm() ==
                CallingConv::AnyReg) {
 #ifndef NDEBUG
   unsigned CheckStartIdx = 0, e = MI->getNumOperands();
while (ScratchIdx < e &&
            MI->getOperand(ScratchIdx).isImplicit() &&
            MI->getOperand(ScratchIdx).isEarlyClobber()))
     ++ScratchIdx;
 
   assert(ScratchIdx != e && "No scratch register available");
   return ScratchIdx;
 }
 
-StackMaps::StackMaps(AsmPrinter &AP) : AP(AP) {
-  if (StackMapVersion != 1)
+StackMaps::StackMaps(AsmPrinter &AP) : AP(AP), SM2(AP) {
+  if (StackMapVersion != 1 && StackMapVersion != 2)
     llvm_unreachable("Unsupported stackmap version!");
 }
 
 /// Go up the super-register chain until we hit a valid dwarf register number.
 static unsigned getDwarfRegNum(unsigned Reg, const TargetRegisterInfo *TRI) {
   int RegNum = TRI->getDwarfRegNum(Reg, false);
   for (MCSuperRegIterator SR(Reg, TRI); SR.isValid() && RegNum < 0; ++SR)
     RegNum = TRI->getDwarfRegNum(*SR, false);
 
   assert(RegNum >= 0 && "Invalid Dwarf register number.");
   return (unsigned)RegNum;
 }
 
+void StackMaps::reset() {
+  if (StackMapVersion == 2) {
+    SM2.reset();
+    return;
+  }
+
+  CSInfos.clear();
+  ConstPool.clear();
+  FnStackSize.clear();
+}
+
+bool StackMaps::hasFrameMap() {
+  if (StackMapVersion == 2) {
+    return SM2.hasFrameMap();
+  }
+
+  return false;
+}
+
+void StackMaps::recordFrameMap(const MCExpr *Size) {
+  // FrameMap is version 2 feature.
+  assert(StackMapVersion == 2);
+  SM2.recordFrameMap(Size);
+}
+
 MachineInstr::const_mop_iterator
 StackMaps::parseOperand(MachineInstr::const_mop_iterator MOI,
                         MachineInstr::const_mop_iterator MOE, LocationVec &Locs,
                         LiveOutVec &LiveOuts) const {
   const TargetRegisterInfo *TRI = AP.MF->getSubtarget().getRegisterInfo();
   if (MOI->isImm()) {
     switch (MOI->getImm()) {
     default:
StackMaps::parseRegisterLiveOutMask(const uint32_t *Mask) const {
 
   return LiveOuts;
 }
 
 void StackMaps::recordStackMapOpers(const MachineInstr &MI, uint64_t ID,
                                     MachineInstr::const_mop_iterator MOI,
                                     MachineInstr::const_mop_iterator MOE,
                                     bool recordResult) {
-
   MCContext &OutContext = AP.OutStreamer->getContext();
   MCSymbol *MILabel = OutContext.createTempSymbol();
   AP.OutStreamer->EmitLabel(MILabel);
 
   LocationVec Locations;
   LiveOutVec LiveOuts;
 
   if (recordResult) {
void StackMaps::recordStackMapOpers(const MachineInstr &MI, uint64_t ID,
   const TargetRegisterInfo *RegInfo = AP.MF->getSubtarget().getRegisterInfo();
   bool HasDynamicFrameSize =
       MFI->hasVarSizedObjects() || RegInfo->needsStackRealignment(*(AP.MF));
   FnStackSize[AP.CurrentFnSym] =
       HasDynamicFrameSize ? UINT64_MAX : MFI->getStackSize();
 }
 
 void StackMaps::recordStackMap(const MachineInstr &MI) {
+  if (StackMapVersion == 2) {
+    SM2.recordStackMap(MI);
+    return;
+  }
+
   assert(MI.getOpcode() == TargetOpcode::STACKMAP && "expected stackmap");
 
   int64_t ID = MI.getOperand(0).getImm();
   recordStackMapOpers(MI, ID, std::next(MI.operands_begin(), 2),
                       MI.operands_end());
 }
 
 void StackMaps::recordPatchPoint(const MachineInstr &MI) {
+  if (StackMapVersion == 2) {
+    SM2.recordPatchPoint(MI);
+    return;
+  }
+
   assert(MI.getOpcode() == TargetOpcode::PATCHPOINT && "expected patchpoint");
 
   PatchPointOpers opers(&MI);
   int64_t ID = opers.getMetaOper(PatchPointOpers::IDPos).getImm();
 
   auto MOI = std::next(MI.operands_begin(), opers.getStackMapStartIdx());
   recordStackMapOpers(MI, ID, MOI, MI.operands_end(),
                       opers.isAnyReg() && opers.hasDef());
 
 #ifndef NDEBUG
   // verify anyregcc
   auto &Locations = CSInfos.back().Locations;
   if (opers.isAnyReg()) {
     unsigned NArgs = opers.getMetaOper(PatchPointOpers::NArgPos).getImm();
     for (unsigned i = 0, e = (opers.hasDef() ? NArgs + 1 : NArgs); i != e; ++i)
       assert(Locations[i].Type == Location::Register &&
              "anyreg arg must be in reg.");
   }
 #endif
 }
-void StackMaps::recordStatepoint(const MachineInstr &MI) {
-  assert(MI.getOpcode() == TargetOpcode::STATEPOINT && "expected statepoint");
+void StackMaps::recordStatepoint(const MachineInstr &MI, MCSymbol *CallLabel) {
+  if (StackMapVersion == 2) {
+    SM2.recordStatepoint(MI, CallLabel);
+    return;
+  }
 
+  assert(MI.getOpcode() == TargetOpcode::STATEPOINT && "expected statepoint");
   StatepointOpers opers(&MI);
   // Record all the deopt and gc operands (they're contiguous and run from the
   // initial index to the end of the operand list)
   const unsigned StartIdx = opers.getVarIdx();
   recordStackMapOpers(MI, opers.getID(), MI.operands_begin() + StartIdx,
                       MI.operands_end(), false);
 }
 
for (const auto &CSI : CSInfos) {
     }
     // Emit alignment to 8 byte.
     OS.EmitValueToAlignment(8);
   }
 }
 
 /// Serialize the stackmap data.
 void StackMaps::serializeToStackMapSection() {
+  if (StackMapVersion == 2) {
+    SM2.serializeToStackMapSection();
+    return;
+  }
+
   (void)WSMP;
   // Bail out if there's no stack map data.
   assert((!CSInfos.empty() || (CSInfos.empty() && ConstPool.empty())) &&
          "Expected empty constant pool too!");
   assert((!CSInfos.empty() || (CSInfos.empty() && FnStackSize.empty())) &&
          "Expected empty function record too!");
   if (CSInfos.empty())
     return;
void StackMaps::serializeToStackMapSection() {
   emitConstantPoolEntries(OS);
   emitCallsiteEntries(OS);
   OS.AddBlankLine();
 
   // Clean up.
   CSInfos.clear();
   ConstPool.clear();
 }
+
+void StackMapsV2::reset() {
+  ConstPool.clear();
+  LivePool.clear();
+  LocPool.clear();
+  StackPool.clear();
+  FrameMap.clear();
+}
+
+MachineInstr::const_mop_iterator
+StackMapsV2::parseOperand(MachineInstr::const_mop_iterator MOI,
+                          MachineInstr::const_mop_iterator MOE,
+                          LocationVec &Locs, LiveOutVec &LiveOuts) const {
+  const TargetRegisterInfo *TRI = AP.MF->getSubtarget().getRegisterInfo();
+  if (MOI->isImm()) {
+    switch (MOI->getImm()) {
+    default:
+      llvm_unreachable("Unrecognized operand type.");
+    case StackMapsV2::DirectMemRefOp: {
+      auto &DL = AP.MF->getDataLayout();
+
+      unsigned Size = DL.getPointerSizeInBits();
+      assert((Size % 8) == 0 && "Need pointer size in bytes.");
+      Size /= 8;
+      unsigned Reg = (++MOI)->getReg();
+      int64_t Imm = (++MOI)->getImm();
+      Locs.emplace_back(StackMapsV2::Location::Direct, Size,
+                        getDwarfRegNum(Reg, TRI), Imm);
+      break;
+    }
+    case StackMapsV2::IndirectMemRefOp: {
+      int64_t Size = (++MOI)->getImm();
+      assert(Size > 0 && "Need a valid size for indirect memory locations.");
+      unsigned Reg = (++MOI)->getReg();
+      int64_t Imm = (++MOI)->getImm();
+      Locs.emplace_back(StackMapsV2::Location::Indirect, Size,
+                        getDwarfRegNum(Reg, TRI), Imm);
+      break;
+    }
+    case StackMapsV2::ConstantOp: {
+      ++MOI;
+      assert(MOI->isImm() && "Expected constant operand.");
+      int64_t Imm = MOI->getImm();
+      Locs.emplace_back(Location::Constant, sizeof(int64_t), 0, Imm);
+      break;
+    }
+    }
+    return ++MOI;
+  }
+
+  // The physical register number will ultimately be encoded as a DWARF regno.
+  // The stack map also records the size of a spill slot that can hold the
+  // register content. (The runtime can track the actual size of the data type
+  // if it needs to.)
+  if (MOI->isReg()) {
+    // Skip implicit registers (this includes our scratch registers)
+    if (MOI->isImplicit())
+      return ++MOI;
+
+    assert(TargetRegisterInfo::isPhysicalRegister(MOI->getReg()) &&
+           "Virtreg operands should have been rewritten before now.");
+    const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(MOI->getReg());
+    assert(!MOI->getSubReg() && "Physical subreg still around.");
+
+    unsigned Offset = 0;
+    unsigned DwarfRegNum = getDwarfRegNum(MOI->getReg(), TRI);
+    unsigned LLVMRegNum = TRI->getLLVMRegNum(DwarfRegNum, false);
+    unsigned SubRegIdx = TRI->getSubRegIndex(LLVMRegNum, MOI->getReg());
+    if (SubRegIdx)
+      Offset = TRI->getSubRegIdxOffset(SubRegIdx);
+
+    Locs.emplace_back(Location::Register, RC->getSize(), DwarfRegNum, Offset);
+    return ++MOI;
+  }
+
+  if (MOI->isRegLiveOut())
+    LiveOuts = parseRegisterLiveOutMask(MOI->getRegLiveOut());
+
+  return ++MOI;
+}
+
+/// Create a live-out register record for the given register Reg.
+StackMapsV2::LiveOutReg
+StackMapsV2::createLiveOutReg(unsigned Reg,
+                              const TargetRegisterInfo *TRI) const {
+  unsigned DwarfRegNum = getDwarfRegNum(Reg, TRI);
+  unsigned Size = TRI->getMinimalPhysRegClass(Reg)->getSize();
+  return LiveOutReg(Reg, DwarfRegNum, Size);
+}
+
+/// Parse the register live-out mask and return a vector of live-out registers
+/// that need to be recorded in the stackmap.
+StackMapsV2::LiveOutVec
+StackMapsV2::parseRegisterLiveOutMask(const uint32_t *Mask) const {
+  assert(Mask && "No register mask specified");
+  const TargetRegisterInfo *TRI = AP.MF->getSubtarget().getRegisterInfo();
+  LiveOutVec LiveOuts;
+
+  // Create a LiveOutReg for each bit that is set in the register mask.
+  for (unsigned Reg = 0, NumRegs = TRI->getNumRegs(); Reg != NumRegs; ++Reg)
+    if ((Mask[Reg / 32] >> Reg % 32) & 1)
+      LiveOuts.push_back(createLiveOutReg(Reg, TRI));
+
+  // We don't need to keep track of a register if its super-register is already
+  // in the list. Merge entries that refer to the same dwarf register and use
+  // the maximum size that needs to be spilled.
+
+  std::sort(LiveOuts.begin(), LiveOuts.end(),
+            [](const LiveOutReg &LHS, const LiveOutReg &RHS) {
+              // Only sort by the dwarf register number.
+              return LHS.DwarfRegNum < RHS.DwarfRegNum;
+            });
+
+  for (auto I = LiveOuts.begin(), E = LiveOuts.end(); I != E; ++I) {
+    for (auto II = std::next(I); II != E; ++II) {
+      if (I->DwarfRegNum != II->DwarfRegNum) {
+        // Skip all the now invalid entries.
+        I = --II;
+        break;
+      }
+      I->Size = std::max(I->Size, II->Size);
+      if (TRI->isSuperRegister(I->Reg, II->Reg))
+        I->Reg = II->Reg;
+      II->Reg = 0; // mark for deletion.
+    }
+  }
+
+  LiveOuts.erase(
+      std::remove_if(LiveOuts.begin(), LiveOuts.end(),
+                     [](const LiveOutReg &LO) { return LO.Reg == 0; }),
+      LiveOuts.end());
+
+  return LiveOuts;
+}
+
+void StackMapsV2::recordStackMap(const MachineInstr &MI) {
+
+  assert(MI.getOpcode() == TargetOpcode::STACKMAP && "expected stackmap");
+
+  int64_t ID = MI.getOperand(0).getImm();
+  recordStackMapOpers(MI, ID, std::next(MI.operands_begin(), 2),
+                      MI.operands_end());
+}
+
+void StackMapsV2::recordPatchPoint(const MachineInstr &MI) {
+
+  assert(MI.getOpcode() == TargetOpcode::PATCHPOINT && "expected patchpoint");
+
+  PatchPointOpers opers(&MI);
+  int64_t ID = opers.getMetaOper(PatchPointOpers::IDPos).getImm();
+
+  auto MOI = std::next(MI.operands_begin(), opers.getStackMapStartIdx());
+  recordStackMapOpers(MI, ID, MOI, MI.operands_end(),
+                      opers.isAnyReg() && opers.hasDef());
+
+#ifndef NDEBUG
+  // verify anyregcc
+  StackMapRecord &SMR = StackPool.back();
+  uint16_t I = SMR.LocationIndex;
+  uint16_t S = SMR.NumLocation;
+  std::vector<Location>::const_iterator First = LocPool.begin() + I;
+  std::vector<Location>::const_iterator Last = LocPool.begin() + I + S;
+  std::vector<Location> Locations(First, Last);
+
+  if (opers.isAnyReg()) {
+    unsigned NArgs = opers.getMetaOper(PatchPointOpers::NArgPos).getImm();
+    for (unsigned i = 0, e = (opers.hasDef() ? NArgs + 1 : NArgs); i != e; ++i)
+      assert(Locations[i].Type == Location::Register &&
+             "anyreg arg must be in reg.");
+  }
+#endif
+}
+
+void StackMapsV2::recordStatepoint(const MachineInstr &MI,
+                                   MCSymbol *CallLabel) {
+  assert(MI.getOpcode() == TargetOpcode::STATEPOINT && "expected statepoint");
+  StatepointOpers opers(&MI);
+  // Record all the deopt and gc operands (they're contiguous and run from the
+  // initial index to the end of the operand list)
+  const unsigned StartIdx = opers.getVarIdx();
+  recordStackMapOpers(MI, opers.getID(), MI.operands_begin() + StartIdx,
+                      MI.operands_end(), false, CallLabel);
+}
+
+/// Emit the constant pool.
+///
+/// int64  : Constants[NumConstants]
+void StackMapsV2::emitConstantPoolEntries(MCStreamer &OS) {
+  // Emit alignment to 8 byte.
+  OS.EmitValueToAlignment(8);
+  OS.EmitLabel(ConstantSubSection);
+
+  // Constant pool entries.
+  DEBUG(dbgs() << WSMP << "constants:\n");
+  for (const auto &ConstEntry : ConstPool) {
+    DEBUG(dbgs() << WSMP << ConstEntry.second << '\n');
+    OS.EmitIntValue(ConstEntry.second, 8);
+  }
+}
+
+/// Record Frame Map for the function.
+void StackMapsV2::recordFrameMap(const MCExpr *Size) {
+  assert(hasFrameMap());
+  FrameRecord &FrameRecordInfo = FrameMap[AP.CurrentFnSymForSize];
+
+  const MachineFunction *MF = AP.MF;
+  const MachineFrameInfo *MFI = MF->getFrameInfo();
+  const TargetSubtargetInfo &STI = MF->getSubtarget();
+  const TargetRegisterInfo *TRI = STI.getRegisterInfo();
+  bool HasDynamicFrameSize =
+      MFI->hasVarSizedObjects() || TRI->needsStackRealignment(*(MF));
+
+  FrameRecordInfo.FunctionStart = AP.CurrentFnSymForSize;
+  FrameRecordInfo.FunctionSize = Size;
+  FrameRecordInfo.StackSize =
+      HasDynamicFrameSize ? UINT64_MAX : MFI->getStackSize();
+
+  // Update index/size for StackmapRecord
+  FrameRecordInfo.FrameBaseRegister =
+      getDwarfRegNum(TRI->getFrameRegister(*MF), TRI);
+  assert(FrameRecordInfo.StackMapRecordIndex != -1);
+  FrameRecordInfo.NumStackMapRecord =
+      StackPool.size() - FrameRecordInfo.StackMapRecordIndex;
+  bool hasLiveOut = false;
+  for (int i = FrameRecordInfo.StackMapRecordIndex; i < StackPool.size(); i++) {
+    hasLiveOut |= StackPool[i].FlagBits.HasLiveOutInfo;
+  }
+
+  // Update Flags
+  FrameRecordInfo.FlagBits.HasFramePointerRegister =
+      STI.getFrameLowering()->hasFP(*MF);
+  FrameRecordInfo.FlagBits.HasStackRealignment =
+      TRI->needsStackRealignment(*(MF));
+  FrameRecordInfo.FlagBits.HasVairableSizeAlloca = MFI->hasVarSizedObjects();
+  FrameRecordInfo.FlagBits.HasLiveOutInfo = hasLiveOut;
+}
+
+void StackMapsV2::recordStackMapOpers(const MachineInstr &MI, uint64_t ID,
+                                      MachineInstr::const_mop_iterator MOI,
+                                      MachineInstr::const_mop_iterator MOE,
+                                      bool recordResult, MCSymbol *CallLabel) {
+
+  // Initialize FrameMap when the first entrance.
+  if (!hasFrameMap()) {
+    FrameRecord &FrameRecordInfo = FrameMap[AP.CurrentFnSymForSize];
+    FrameRecordInfo.StackMapRecordIndex = StackPool.size();
+  }
+
+  MCContext &OutContext = AP.OutStreamer->getContext();
+  MCSymbol *MILabel = OutContext.createTempSymbol();
+  AP.OutStreamer->EmitLabel(MILabel);
+
+  LocationVec Locations;
+  LiveOutVec LiveOuts;
+
+  if (recordResult) {
+    assert(PatchPointOpers(&MI).hasDef() && "Stackmap has no return value.");
+    parseOperand(MI.operands_begin(), std::next(MI.operands_begin()), Locations,
+                 LiveOuts);
+  }
+
+  // Parse operands.
+  while (MOI != MOE) {
+    MOI = parseOperand(MOI, MOE, Locations, LiveOuts);
+  }
+
+  // Move large constants into the constant pool.
+  for (auto &Loc : Locations) {
+    // Constants are encoded as sign-extended integers.
+    // -1 is directly encoded as .long 0xFFFFFFFF with no constant pool.
+    if (Loc.Type == Location::Constant && !isInt<32>(Loc.Offset)) {
+      Loc.Type = Location::ConstantIndex;
+      // ConstPool is intentionally a MapVector of 'uint64_t's (as
+      // opposed to 'int64_t's).  We should never be in a situation
+      // where we have to insert either the tombstone or the empty
+      // keys into a map, and for a DenseMap<uint64_t, T> these are
+      // (uint64_t)0 and (uint64_t)-1.  They can be and are
+      // represented using 32 bit integers.
+      assert((uint64_t)Loc.Offset != DenseMapInfo<uint64_t>::getEmptyKey() &&
+             (uint64_t)Loc.Offset !=
+                 DenseMapInfo<uint64_t>::getTombstoneKey() &&
+             "empty and tombstone keys should fit in 32 bits!");
+      auto Result = ConstPool.insert(std::make_pair(Loc.Offset, Loc.Offset));
+      Loc.Offset = Result.first - ConstPool.begin();
+    }
+  }
+
+  // Create an expression to calculate the offset of the callsite from function
+  // entry.
+  const MCExpr *CSOffsetExpr = MCBinaryExpr::createSub(
+      MCSymbolRefExpr::create(MILabel, OutContext),
+      MCSymbolRefExpr::create(AP.CurrentFnSymForSize, OutContext), OutContext);
+
+  // In case there is a original call instruction involved (for statepoint),
+  // its size is also recorded.
+  const MCExpr *CSSizeExpr = nullptr;
+  if (CallLabel != nullptr) {
+    CSSizeExpr = MCBinaryExpr::createSub(
+        MCSymbolRefExpr::create(MILabel, OutContext),
+        MCSymbolRefExpr::create(CallLabel, OutContext), OutContext);
+  } else {
+    CSSizeExpr = MCConstantExpr::create(0, OutContext);
+  }
+
+  // Append Locations to LocPool
+  uint16_t LocIndex = LocPool.size();
+  for (auto &Loc : Locations) {
+    LocPool.push_back(Loc);
+  }
+
+  // Append LiveOuts to LivePool
+  uint16_t LiveOutIndex = LivePool.size();
+  for (auto &LiveOut : LiveOuts) {
+    LivePool.push_back(LiveOut);
+  }
+
+  StackMapRecord SMR;
+  SMR.ID = ID;
+  SMR.Offset = CSOffsetExpr;
+  SMR.Size = CSSizeExpr;
+  SMR.FlagBits.HasLiveOutInfo = LiveOuts.size() != 0;
+  SMR.LocationIndex = LocIndex;
+  SMR.NumLocation = Locations.size();
+  SMR.LiveOutIndex = LiveOutIndex;
+  SMR.NumLiveOut = LiveOuts.size();
+  StackPool.emplace_back(SMR);
+}
+
+void StackMapsV2::createSubSectionLabelAndOffset(
+    MCSymbol **SubSection, const MCExpr **SubSectionOffset) {
+  MCContext &OutContext = AP.OutStreamer->getContext();
+  *SubSection = OutContext.createTempSymbol();
+  *SubSectionOffset = MCBinaryExpr::createSub(
+      MCSymbolRefExpr::create(*SubSection, OutContext),
+      MCSymbolRefExpr::create(SectionStart, OutContext), OutContext);
+}
+
+void StackMapsV2::serializeToStackMapSection() {
+  if (FrameMap.size() == 0) {
+    return;
+  }
+  MCContext &OutContext = AP.OutStreamer->getContext();
+  MCStreamer &OS = *AP.OutStreamer;
+
+  // Create stack map section and its symbol.
+  MCSection *StackMapSection =
+      OutContext.getObjectFileInfo()->getStackMapSection();
+  OS.SwitchSection(StackMapSection);
+  SectionStart = OutContext.getOrCreateSymbol(Twine("__LLVM_StackMaps"));
+  // Emit a dummy symbol to force section inclusion.
+  OS.EmitLabel(SectionStart);
+
+  // Create subsection label and offset.
+  createSubSectionLabelAndOffset(&ConstantSubSection,
+                                 &ConstantSubSectionOffset);
+  createSubSectionLabelAndOffset(&FrameRecordSubSection,
+                                 &FrameRecordSubSectionOffset);
+  createSubSectionLabelAndOffset(&StackMapSubSection,
+                                 &StackMapSubSectionOffset);
+  createSubSectionLabelAndOffset(&LocationSubSection,
+                                 &LocationSubSectionOffset);
+  createSubSectionLabelAndOffset(&LiveOutSubSection, &LiveOutSubSectionOffset);
+
+  // Serialize data.
+  DEBUG(dbgs() << "********** Stack Map Output **********\n");
+
+  emitStackmapHeaderSubSection(OS);
+  emitConstantPoolEntriesSubSection(OS);
+  emitFunctionFrameRecordsSubSection(OS);
+  emitStackMapSubSection(OS);
+  emitLocationSubSection(OS);
+  emitLiveOutSubSection(OS);
+
+  OS.AddBlankLine();
+
+  // Clean up.
+  reset();
+}
+
+bool StackMapsV2::hasFrameMap() {
+  return FrameMap.find(AP.CurrentFnSymForSize) != FrameMap.end();
+}
+
+/// Emit the header
+///
+/// uint8: Stack Map Version(2)
+/// uint8[3] : Reserved(0)
+/// uint32 : NumFrameRecords (Functions)
+/// uint32 : Constants Offset(bytes)
+/// uint32 : StackMap Records Offset(bytes)
+/// uint32 : Frame Records Offset(bytes) (TODO)
+/// uint32 : Locations Offset(bytes)
+/// uint32 : LiveOuts Offset(bytes)
+void StackMapsV2::emitStackmapHeaderSubSection(MCStreamer &OS) {
+  // Header.
+  DEBUG(dbgs() << WSMP << "StackMapVersion = " << StackMapVersion << '\n');
+  OS.EmitIntValue(StackMapVersion, 1); // Version.
+  OS.EmitIntValue(0, 1);               // Reserved.
+  OS.EmitIntValue(0, 2);               // Reserved.
+
+  DEBUG(dbgs() << WSMP << "# Of Functions(FrameRecords) = " << FrameMap.size()
+               << " ConstantSubSectionOffset = " << ConstantSubSectionOffset
+               << " FrameRecordSubSectionOffset = "
+               << FrameRecordSubSectionOffset
+               << " StackMapSubSectionOffset = " << StackMapSubSectionOffset
+               << " LocationSubSectionOffset = " << LocationSubSectionOffset
+               << " LiveOutSubSectionOffset = " << LiveOutSubSectionOffset
+               << '\n');
+
+  OS.EmitIntValue(FrameMap.size(), 4);
+  OS.EmitValue(ConstantSubSectionOffset, 4);
+  OS.EmitValue(FrameRecordSubSectionOffset, 4);
+  OS.EmitValue(StackMapSubSectionOffset, 4);
+  OS.EmitValue(LocationSubSectionOffset, 4);
+  OS.EmitValue(LiveOutSubSectionOffset, 4);
+}
+
+/// Emit the constant pool.
+/// align to 8 bytes
+/// int64  : Constants[NumConstants]
+void StackMapsV2::emitConstantPoolEntriesSubSection(MCStreamer &OS) {
+  OS.EmitValueToAlignment(8);
+  OS.EmitLabel(ConstantSubSection);
+
+  // Constant pool entries.
+  DEBUG(dbgs() << WSMP << "constants:\n");
+  for (const auto &ConstEntry : ConstPool) {
+    DEBUG(dbgs() << WSMP << ConstEntry.second << '\n');
+    OS.EmitIntValue(ConstEntry.second, 8);
+  }
+}
+
+/// Emit the function frame record for each function.
+/// align to 8 bytes
+/// FrameRecord[]{
+///  uint64: Function Address
+///  uint32 : Function Size
+///  uint32 : Stack Size
+///  uint16 : Flags {
+///   bool : HasFrame
+///   bool : HasVariableSizeAlloca
+///   bool : HasStackRealignment
+///   bool : HasLiveOutInfo
+///   bool : Reserved[12]
+///  }
+///  uint16: Frame Base Register Dwarf RegNum
+///  uint16 : StackMap Record Index
+///  uint16 : Num StackMap Records
+///  uint16 : Frame Register Index (TODO)
+///  uint16 : Num Frame Registers  (TODO)
+/// }
+void StackMapsV2::emitFunctionFrameRecordsSubSection(MCStreamer &OS) {
+  OS.EmitValueToAlignment(8);
+  OS.EmitLabel(FrameRecordSubSection);
+
+  DEBUG(dbgs() << WSMP << "# of FrameRecords: " << FrameMap.size() << '\n');
+  uint32_t index = 0;
+  for (auto const &FM : FrameMap) {
+    const FrameRecord &FR = FM.second;
+
+    DEBUG(dbgs() << WSMP << "Function [" << index << "] :"
+                 << " FunctionStart: " << FR.FunctionStart << " FunctionSize: "
+                 << FR.FunctionSize << " StackSize: " << FR.StackSize
+                 << " FlagValue: " << (uint32_t)FR.FlagValue
+                 << " FrameBaseRegister: " << FR.FrameBaseRegister
+                 << " StackMapRecordIndex: " << FR.StackMapRecordIndex
+                 << " NumStackMapRecord:" << FR.NumStackMapRecord << '\n');
+
+    OS.EmitSymbolValue(FR.FunctionStart, 8);
+    OS.EmitValue(FR.FunctionSize, 4);
+    OS.EmitIntValue(FR.StackSize, 4);
+    OS.EmitIntValue(FR.FlagValue, 2);
+    OS.EmitIntValue(FR.FrameBaseRegister, 2);
+    OS.EmitIntValue(FR.StackMapRecordIndex, 2);
+    OS.EmitIntValue(FR.NumStackMapRecord, 2);
+
+    OS.EmitValueToAlignment(8);
+    index++;
+  }
+}
+
+/// Emit stack map records
+/// align to 8 bytes
+/// StackMapRecord[]{
+///  uint64: ID
+///  uint32 : Instruction Offset
+///  uint8 : Call size(bytes)
+///  uint8 : Flags{
+///   bool : HasLiveOutInfo
+///   bool : Reserved[7]
+///  }
+///  uint16 : Location Index
+///  uint16: Num Locations
+///  uint16 : LiveOut Index
+///  uint16 : Num LiveOuts
+///}
+void StackMapsV2::emitStackMapSubSection(MCStreamer &OS) {
+  OS.EmitValueToAlignment(8);
+  OS.EmitLabel(StackMapSubSection);
+
+  DEBUG(dbgs() << WSMP << "# of StackPool: " << StackPool.size() << '\n');
+  uint32_t index = 0;
+  for (auto const &SP : StackPool) {
+    DEBUG(dbgs() << WSMP << "StackMap [" << index << "] :"
+                 << " ID: " << SP.ID << " Offset: " << SP.Offset << " Size: "
+                 << SP.Size << " FlagValue: " << (uint32_t)SP.FlagValue
+                 << " LocationIndex: " << SP.LocationIndex << " NumLocation: "
+                 << SP.NumLocation << " LiveOutIndex: " << SP.LiveOutIndex
+                 << " NumLiveOut:" << SP.NumLiveOut << '\n');
+
+    OS.EmitIntValue(SP.ID, 8);
+    OS.EmitValue(SP.Offset, 4);
+    OS.EmitValue(SP.Size, 1);
+    OS.EmitIntValue(SP.FlagValue, 1);
+    OS.EmitIntValue(SP.LocationIndex, 2);
+    OS.EmitIntValue(SP.NumLocation, 2);
+    OS.EmitIntValue(SP.LiveOutIndex, 2);
+    OS.EmitIntValue(SP.NumLiveOut, 2);
+
+    OS.EmitValueToAlignment(8);
+    index++;
+  }
+}
+
+/// Emit locations
+/// align to 4 bytes
+/// Location[]{
+///  uint8: Register | Direct | Indirect | Constant | ConstantIndex
+///  uint8 : Size i Bytes
+///  uint16 : Dwarf RegNum
+///  int32 : Offset or SmallConstant
+/// }
+void StackMapsV2::emitLocationSubSection(MCStreamer &OS) {
+  OS.EmitValueToAlignment(4);
+  OS.EmitLabel(LocationSubSection);
+
+  DEBUG(dbgs() << WSMP << "# of LocPool: " << LocPool.size() << '\n');
+  uint32_t index = 0;
+  for (auto const &Loc : LocPool) {
+    DEBUG(dbgs() << WSMP << "Loc [" << index << "] :"
+                 << " Type: " << Loc.Type << " Size: " << Loc.Size
+                 << " Reg: " << Loc.Reg << " Offset: " << Loc.Offset << '\n');
+
+    OS.EmitIntValue(Loc.Type, 1);
+    OS.EmitIntValue(Loc.Size, 1);
+    OS.EmitIntValue(Loc.Reg, 2);
+    OS.EmitIntValue(Loc.Offset, 4);
+
+    OS.EmitValueToAlignment(4);
+    index++;
+  }
+}
+
+/// Emit live out
+/// align to 2 bytes
+/// LiveOuts[]{
+///  uint16: Dwarf RegNum
+///  uint8 : Reserved
+///  uint8 : Size in Bytes
+/// }
+void StackMapsV2::emitLiveOutSubSection(MCStreamer &OS) {
+  OS.EmitValueToAlignment(2);
+  OS.EmitLabel(LiveOutSubSection);
+
+  DEBUG(dbgs() << WSMP << "# of LivePool: " << LivePool.size() << '\n');
+  uint32_t index = 0;
+  for (auto const &LO : LivePool) {
+    DEBUG(dbgs() << WSMP << "LiveOut [" << index << "] :"
+                 << " Reg: " << LO.Reg << " DwarfRegNum: " << LO.DwarfRegNum
+                 << " Size: " << LO.Size << '\n');
+
+    OS.EmitIntValue(LO.DwarfRegNum, 2);
+    OS.EmitIntValue(0, 1);
+    OS.EmitIntValue(LO.Size, 1);
+
+    OS.EmitValueToAlignment(2);
+    index++;
+  }
+}

lib/Target/AArch64/AArch64AsmPrinter.cpp

 using namespace llvm;
 
 #define DEBUG_TYPE "asm-printer"
 
 namespace {
 
 class AArch64AsmPrinter : public AsmPrinter {
   AArch64MCInstLower MCInstLowering;
-  StackMaps SM;
 
 public:
   AArch64AsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer)
       : AsmPrinter(TM, std::move(Streamer)), MCInstLowering(OutContext, *this),
-        SM(*this), AArch64FI(nullptr) {}
+        AArch64FI(nullptr) {}
 
   const char *getPassName() const override {
     return "AArch64 Assembly Printer";
   }
 
   /// \brief Wrapper for MCInstLowering.lowerOperand() for the
   /// tblgen'erated pseudo lowering.
   bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const {
     return MCInstLowering.lowerOperand(MO, MCOp);
   }
 
-  void LowerSTACKMAP(MCStreamer &OutStreamer, StackMaps &SM,
-                     const MachineInstr &MI);
-  void LowerPATCHPOINT(MCStreamer &OutStreamer, StackMaps &SM,
-                       const MachineInstr &MI);
+  void LowerSTACKMAP(MCStreamer &OutStreamer, const MachineInstr &MI);
+  void LowerPATCHPOINT(MCStreamer &OutStreamer, const MachineInstr &MI);
   /// \brief tblgen'erated driver function for lowering simple MI->MC
   /// pseudo instructions.
   bool emitPseudoExpansionLowering(MCStreamer &OutStreamer,
                                    const MachineInstr *MI);
 
   void EmitInstruction(const MachineInstr *MI) override;
 
   void getAnalysisUsage(AnalysisUsage &AU) const override {
void AArch64AsmPrinter::PrintDebugValueComment(const MachineInstr *MI,
   printOperand(MI, 0, OS);
   OS << '+';
   printOperand(MI, 1, OS);
   OS << ']';
   OS << "+";
   printOperand(MI, NOps - 2, OS);
 }
 
-void AArch64AsmPrinter::LowerSTACKMAP(MCStreamer &OutStreamer, StackMaps &SM,
+void AArch64AsmPrinter::LowerSTACKMAP(MCStreamer &OutStreamer,
                                       const MachineInstr &MI) {
   unsigned NumNOPBytes = MI.getOperand(1).getImm();
 
   SM.recordStackMap(MI);
   assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!");
 
   // Scan ahead to trim the shadow.
   const MachineBasicBlock &MBB = *MI.getParent();
void AArch64AsmPrinter::LowerSTACKMAP(MCStreamer &OutStreamer,
 
   // Emit nops.
   for (unsigned i = 0; i < NumNOPBytes; i += 4)
     EmitToStreamer(OutStreamer, MCInstBuilder(AArch64::HINT).addImm(0));
 }
 
 // Lower a patchpoint of the form:
 // [<def>], <id>, <numBytes>, <target>, <numArgs>
-void AArch64AsmPrinter::LowerPATCHPOINT(MCStreamer &OutStreamer, StackMaps &SM,
+void AArch64AsmPrinter::LowerPATCHPOINT(MCStreamer &OutStreamer,
                                         const MachineInstr &MI) {
   SM.recordPatchPoint(MI);
 
   PatchPointOpers Opers(&MI);
 
   int64_t CallTarget = Opers.getMetaOper(PatchPointOpers::TargetPos).getImm();
   unsigned EncodedBytes = 0;
   if (CallTarget) {
case AArch64::TLSDESC_CALLSEQ: {
     Blr.setOpcode(AArch64::BLR);
     Blr.addOperand(MCOperand::createReg(AArch64::X1));
     EmitToStreamer(*OutStreamer, Blr);
 
     return;
   }
 
   case TargetOpcode::STACKMAP:
-    return LowerSTACKMAP(*OutStreamer, SM, *MI);
+    return LowerSTACKMAP(*OutStreamer, *MI);
 
   case TargetOpcode::PATCHPOINT:
-    return LowerPATCHPOINT(*OutStreamer, SM, *MI);
+    return LowerPATCHPOINT(*OutStreamer, *MI);
   }
 
   // Finally, do the automated lowerings for everything else.
   MCInst TmpInst;
   MCInstLowering.Lower(MI, TmpInst);
   EmitToStreamer(*OutStreamer, TmpInst);
 }
 
 // Force static initialization.
 extern "C" void LLVMInitializeAArch64AsmPrinter() {
   RegisterAsmPrinter<AArch64AsmPrinter> X(TheAArch64leTarget);
   RegisterAsmPrinter<AArch64AsmPrinter> Y(TheAArch64beTarget);
   RegisterAsmPrinter<AArch64AsmPrinter> Z(TheARM64Target);
 }

lib/Target/PowerPC/PPCAsmPrinter.cpp

 
 #define DEBUG_TYPE "asmprinter"
 
 namespace {
   class PPCAsmPrinter : public AsmPrinter {
   protected:
     MapVector<MCSymbol*, MCSymbol*> TOC;
     const PPCSubtarget *Subtarget;
-    StackMaps SM;
   public:
     explicit PPCAsmPrinter(TargetMachine &TM,
                            std::unique_ptr<MCStreamer> Streamer)
-        : AsmPrinter(TM, std::move(Streamer)), SM(*this) {}
+        : AsmPrinter(TM, std::move(Streamer)) {}
 
     const char *getPassName() const override {
       return "PowerPC Assembly Printer";
     }
 
     MCSymbol *lookUpOrCreateTOCEntry(MCSymbol *Sym);
 
     void EmitInstruction(const MachineInstr *MI) override;
 
     void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O);
 
     bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
                          unsigned AsmVariant, const char *ExtraCode,
                          raw_ostream &O) override;
     bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
                                unsigned AsmVariant, const char *ExtraCode,
                                raw_ostream &O) override;
 
     void EmitEndOfAsmFile(Module &M) override;
 
-    void LowerSTACKMAP(MCStreamer &OutStreamer, StackMaps &SM,
-                       const MachineInstr &MI);
-    void LowerPATCHPOINT(MCStreamer &OutStreamer, StackMaps &SM,
-                         const MachineInstr &MI);
+    void LowerSTACKMAP(MCStreamer &OutStreamer, const MachineInstr &MI);
+    void LowerPATCHPOINT(MCStreamer &OutStreamer, const MachineInstr &MI);
     void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK);
     bool runOnMachineFunction(MachineFunction &MF) override {
       Subtarget = &MF.getSubtarget<PPCSubtarget>();
       return AsmPrinter::runOnMachineFunction(MF);
     }
   };
 
   /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux
if (!TOCEntry)
     TOCEntry = createTempSymbol("C");
   return TOCEntry;
 }
 
 void PPCAsmPrinter::EmitEndOfAsmFile(Module &M) {
   SM.serializeToStackMapSection();
 }
 
-void PPCAsmPrinter::LowerSTACKMAP(MCStreamer &OutStreamer, StackMaps &SM,
+void PPCAsmPrinter::LowerSTACKMAP(MCStreamer &OutStreamer,
                                   const MachineInstr &MI) {
   unsigned NumNOPBytes = MI.getOperand(1).getImm();
 
   SM.recordStackMap(MI);
   assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!");
 
   // Scan ahead to trim the shadow.
   const MachineBasicBlock &MBB = *MI.getParent();
void PPCAsmPrinter::LowerSTACKMAP(MCStreamer &OutStreamer,
 
   // Emit nops.
   for (unsigned i = 0; i < NumNOPBytes; i += 4)
     EmitToStreamer(OutStreamer, MCInstBuilder(PPC::NOP));
 }
 
 // Lower a patchpoint of the form:
 // [<def>], <id>, <numBytes>, <target>, <numArgs>
-void PPCAsmPrinter::LowerPATCHPOINT(MCStreamer &OutStreamer, StackMaps &SM,
+void PPCAsmPrinter::LowerPATCHPOINT(MCStreamer &OutStreamer,
                                     const MachineInstr &MI) {
   SM.recordPatchPoint(MI);
   PatchPointOpers Opers(&MI);
 
   unsigned EncodedBytes = 0;
   const MachineOperand &CalleeMO =
     Opers.getMetaOper(PatchPointOpers::TargetPos);
 
void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
   PICLevel::Level PL = M->getPICLevel();
   
   // Lower multi-instruction pseudo operations.
   switch (MI->getOpcode()) {
   default: break;
   case TargetOpcode::DBG_VALUE:
     llvm_unreachable("Should be handled target independently");
   case TargetOpcode::STACKMAP:
-    return LowerSTACKMAP(*OutStreamer, SM, *MI);
+    return LowerSTACKMAP(*OutStreamer, *MI);
   case TargetOpcode::PATCHPOINT:
-    return LowerPATCHPOINT(*OutStreamer, SM, *MI);
+    return LowerPATCHPOINT(*OutStreamer, *MI);
 
   case PPC::MoveGOTtoLR: {
     // Transform %LR = MoveGOTtoLR
     // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4
     // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding
     // _GLOBAL_OFFSET_TABLE_) has exactly one instruction:
     //      blrl
     // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local

lib/Target/X86/X86AsmPrinter.h

 }
 
 namespace llvm {
 class MCStreamer;
 class MCSymbol;
 
 class LLVM_LIBRARY_VISIBILITY X86AsmPrinter : public AsmPrinter {
   const X86Subtarget *Subtarget;
-  StackMaps SM;
   FaultMaps FM;
 
   // This utility class tracks the length of a stackmap instruction's 'shadow'.
   // It is used by the X86AsmPrinter to ensure that the stackmap shadow
   // invariants (i.e. no other stackmaps, patchpoints, or control flow within
   // the shadow) are met, while outputting a minimal number of NOPs for padding.
   //
   // To minimise the number of NOPs used, the shadow tracker counts the number
class LLVM_LIBRARY_VISIBILITY X86AsmPrinter : public AsmPrinter {
   void LowerSTATEPOINT(const MachineInstr &MI, X86MCInstLower &MCIL);
   void LowerFAULTING_LOAD_OP(const MachineInstr &MI, X86MCInstLower &MCIL);
 
   void LowerTlsAddr(X86MCInstLower &MCInstLowering, const MachineInstr &MI);
 
  public:
    explicit X86AsmPrinter(TargetMachine &TM,
                           std::unique_ptr<MCStreamer> Streamer)
-       : AsmPrinter(TM, std::move(Streamer)), SM(*this), FM(*this),
-         SMShadowTracker(TM) {}
+       : AsmPrinter(TM, std::move(Streamer)), FM(*this), SMShadowTracker(TM) {}
 
   const char *getPassName() const override {
     return "X86 Assembly / Object Emitter";
   }
 
   const X86Subtarget &getSubtarget() const { return *Subtarget; }
 
   void EmitStartOfAsmFile(Module &M) override;

lib/Target/X86/X86MCInstLower.cpp

static void EmitNops(MCStreamer &OS, unsigned NumBytes, bool Is64Bit, const MCSubtargetInfo &STI) {
   } // while (NumBytes)
 }
 
 void X86AsmPrinter::LowerSTATEPOINT(const MachineInstr &MI,
                                     X86MCInstLower &MCIL) {
   assert(Subtarget->is64Bit() && "Statepoint currently only supports X86-64");
 
   StatepointOpers SOpers(&MI);
+  MCSymbol *CallLabel = nullptr;
   if (unsigned PatchBytes = SOpers.getNumPatchBytes()) {
     EmitNops(*OutStreamer, PatchBytes, Subtarget->is64Bit(),
              getSubtargetInfo());
   } else {
     // Lower call target and choose correct opcode
     const MachineOperand &CallTarget = SOpers.getCallTarget();
     MCOperand CallTargetMCOp;
     unsigned CallOpcode;
default:
       llvm_unreachable("Unsupported operand type in statepoint call target");
       break;
     }
 
     // Emit call
     MCInst CallInst;
     CallInst.setOpcode(CallOpcode);
     CallInst.addOperand(CallTargetMCOp);
+
+    MCContext &OutContext = OutStreamer->getContext();
+    CallLabel = OutContext.createTempSymbol();
+    OutStreamer->EmitLabel(CallLabel);
     OutStreamer->EmitInstruction(CallInst, getSubtargetInfo());
   }
 
   // Record our statepoint node in the same section used by STACKMAP
   // and PATCHPOINT
-  SM.recordStatepoint(MI);
+  SM.recordStatepoint(MI, CallLabel);
 }
 
 void X86AsmPrinter::LowerFAULTING_LOAD_OP(const MachineInstr &MI,
                                        X86MCInstLower &MCIL) {
   // FAULTING_LOAD_OP <def>, <handler label>, <load opcode>, <load operands>
 
   unsigned LoadDefRegister = MI.getOperand(0).getReg();
   MCSymbol *HandlerLabel = MI.getOperand(1).getMCSymbol();

test/CodeGen/X86/stackmap-fast-isel.ll

 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7                             | FileCheck %s
 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -fast-isel -fast-isel-abort=1 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -stackmap-version=2 | FileCheck %s --check-prefix=V2CHECK
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -fast-isel -fast-isel-abort=1 -stackmap-version=2 | FileCheck %s --check-prefix=V2CHECK
 
 ; CHECK-LABEL:  .section  __LLVM_STACKMAPS,__llvm_stackmaps
 ; CHECK-NEXT:  __LLVM_StackMaps:
 ; Header
 ; CHECK-NEXT:   .byte 1
 ; CHECK-NEXT:   .byte 0
 ; CHECK-NEXT:   .short 0
 ; Num Functions
entry:
   tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 4294967295, i32 0)
   tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 4294967296, i32 0)
   tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 9223372036854775807, i32 0)
   tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 -1, i32 0)
   ret void
 }
 
 declare void @llvm.experimental.stackmap(i64, i32, ...)
+
+; V2CHECK-LABEL:  .section  __LLVM_STACKMAPS,__llvm_stackmaps
+; V2CHECK-NEXT:__LLVM_StackMaps:
+; V2CHECK-NEXT: .byte 2
+; V2CHECK-NEXT: .byte 0
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .long 4
+; V2CHECK-NEXT: .long L{{.*}}-__LLVM_StackMaps
+; V2CHECK-NEXT: .long L{{.*}}-__LLVM_StackMaps
+; V2CHECK-NEXT: .long L{{.*}}-__LLVM_StackMaps
+; V2CHECK-NEXT: .long L{{.*}}-__LLVM_StackMaps
+; V2CHECK-NEXT: .long L{{.*}}-__LLVM_StackMaps
+
+; Constant Array
+; V2CHECK-NEXT: .align  3
+; V2CHECK-NEXT:L{{.*}}:
+; V2CHECK-NEXT: .quad 2147483648
+; V2CHECK-NEXT: .quad 4294967295
+; V2CHECK-NEXT: .quad 4294967296
+
+; FrameMapRecord Array
+; V2CHECK-NEXT: .align  3
+; V2CHECK-NEXT:L{{.*}}:
+; V2CHECK-NEXT: .quad _constantargs
+; V2CHECK-NEXT: .long L{{.*}}-_constantargs
+; V2CHECK-NEXT: .long 8
+; V2CHECK-NEXT: .short  1
+; V2CHECK-NEXT: .short  6
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .short  1
+; V2CHECK-NEXT: .align  3
+; V2CHECK-NEXT: .quad _liveConstant
+; V2CHECK-NEXT: .long L{{.*}}-_liveConstant
+; V2CHECK-NEXT: .long 8
+; V2CHECK-NEXT: .short  1
+; V2CHECK-NEXT: .short  6
+; V2CHECK-NEXT: .short  1
+; V2CHECK-NEXT: .short  1
+; V2CHECK-NEXT: .align  3
+; V2CHECK-NEXT: .quad _directFrameIdx
+; V2CHECK-NEXT: .long L{{.*}}-_directFrameIdx
+; V2CHECK-NEXT: .long 40
+; V2CHECK-NEXT: .short  1
+; V2CHECK-NEXT: .short  6
+; V2CHECK-NEXT: .short  2
+; V2CHECK-NEXT: .short  1
+; V2CHECK-NEXT: .align  3
+; V2CHECK-NEXT: .quad _longid
+; V2CHECK-NEXT: .long Lfunc_end3-_longid
+; V2CHECK-NEXT: .long 8
+; V2CHECK-NEXT: .short  1
+; V2CHECK-NEXT: .short  6
+; V2CHECK-NEXT: .short  3
+; V2CHECK-NEXT: .short  4
+; V2CHECK-NEXT: .align  3
+
+; StackMapRecord Array
+; V2CHECK-NEXT: .align  3
+; V2CHECK-NEXT:L{{.*}}:
+; V2CHECK-NEXT: .quad 1
+; V2CHECK-NEXT: .long L{{.*}}-_constantargs
+; V2CHECK-NEXT: .byte 0
+; V2CHECK-NEXT: .byte 0
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .short  12
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .align  3
+; V2CHECK-NEXT: .quad 15
+; V2CHECK-NEXT: .long L{{.*}}-_liveConstant
+; V2CHECK-NEXT: .byte 0
+; V2CHECK-NEXT: .byte 0
+; V2CHECK-NEXT: .short  12
+; V2CHECK-NEXT: .short  1
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .align  3
+; V2CHECK-NEXT: .quad 16
+; V2CHECK-NEXT: .long L{{.*}}-_directFrameIdx
+; V2CHECK-NEXT: .byte 0
+; V2CHECK-NEXT: .byte 0
+; V2CHECK-NEXT: .short  13
+; V2CHECK-NEXT: .short  1
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .align  3
+; V2CHECK-NEXT: .quad 4294967295
+; V2CHECK-NEXT: .long L{{.*}}-_longid
+; V2CHECK-NEXT: .byte 0
+; V2CHECK-NEXT: .byte 0
+; V2CHECK-NEXT: .short  14
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .align  3
+; V2CHECK-NEXT: .quad 4294967296
+; V2CHECK-NEXT: .long L{{.*}}-_longid
+; V2CHECK-NEXT: .byte 0
+; V2CHECK-NEXT: .byte 0
+; V2CHECK-NEXT: .short  14
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .align  3
+; V2CHECK-NEXT: .quad 9223372036854775807
+; V2CHECK-NEXT: .long L{{.*}}-_longid
+; V2CHECK-NEXT: .byte 0
+; V2CHECK-NEXT: .byte 0
+; V2CHECK-NEXT: .short  14
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .align  3
+; V2CHECK-NEXT: .quad -1
+; V2CHECK-NEXT: .long L{{.*}}-_longid
+; V2CHECK-NEXT: .byte 0
+; V2CHECK-NEXT: .byte 0
+; V2CHECK-NEXT: .short  14
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .align  3
+
+; Location Array
+; V2CHECK-NEXT: .align  2
+; V2CHECK-NEXT:L{{.*}}:
+; V2CHECK-NEXT: .byte 4
+; V2CHECK-NEXT: .byte 8
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .long -1
+; V2CHECK-NEXT: .align  2
+; V2CHECK-NEXT: .byte 4
+; V2CHECK-NEXT: .byte 8
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .long -1
+; V2CHECK-NEXT: .align  2
+; V2CHECK-NEXT: .byte 4
+; V2CHECK-NEXT: .byte 8
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .long 65536
+; V2CHECK-NEXT: .align  2
+; V2CHECK-NEXT: .byte 4
+; V2CHECK-NEXT: .byte 8
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .long 2000000000
+; V2CHECK-NEXT: .align  2
+; V2CHECK-NEXT: .byte 4
+; V2CHECK-NEXT: .byte 8
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .long 2147483647
+; V2CHECK-NEXT: .align  2
+; V2CHECK-NEXT: .byte 4
+; V2CHECK-NEXT: .byte 8
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .long -1
+; V2CHECK-NEXT: .align  2
+; V2CHECK-NEXT: .byte 4
+; V2CHECK-NEXT: .byte 8
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .long -1
+; V2CHECK-NEXT: .align  2
+; V2CHECK-NEXT: .byte 4
+; V2CHECK-NEXT: .byte 8
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .long 0
+; V2CHECK-NEXT: .align  2
+; V2CHECK-NEXT: .byte 5
+; V2CHECK-NEXT: .byte 8
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .long 0
+; V2CHECK-NEXT: .align  2
+; V2CHECK-NEXT: .byte 5
+; V2CHECK-NEXT: .byte 8
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .long 1
+; V2CHECK-NEXT: .align  2
+; V2CHECK-NEXT: .byte 5
+; V2CHECK-NEXT: .byte 8
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .long 2
+; V2CHECK-NEXT: .align  2
+; V2CHECK-NEXT: .byte 4
+; V2CHECK-NEXT: .byte 8
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .long -1
+; V2CHECK-NEXT: .align  2
+; V2CHECK-NEXT: .byte 4
+; V2CHECK-NEXT: .byte 8
+; V2CHECK-NEXT: .short  0
+; V2CHECK-NEXT: .long 33
+; V2CHECK-NEXT: .align  2
+; V2CHECK-NEXT: .byte 2
+; V2CHECK-NEXT: .byte 8
+; V2CHECK-NEXT: .short  6
+; V2CHECK-NEXT: .long -24
+; V2CHECK-NEXT: .align  2

test/CodeGen/X86/stackmap-frame-setup.ll

 ; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -stop-after machine-sink %s | FileCheck %s --check-prefix=ISEL
 ; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s | FileCheck %s --check-prefix=FAST-ISEL
+; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -stop-after machine-sink -stackmap-version=2 %s | FileCheck %s --check-prefix=ISEL
+; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -fast-isel -fast-isel-abort=1 -stop-after machine-sink -stackmap-version=2 %s | FileCheck %s --check-prefix=FAST-ISEL
 
 define void @caller_meta_leaf() {
 entry:
   %metadata = alloca i64, i32 3, align 8
   store i64 11, i64* %metadata
   store i64 12, i64* %metadata
   store i64 13, i64* %metadata
 ; ISEL:      ADJCALLSTACKDOWN64 0, 0, implicit-def

test/CodeGen/X86/stackmap-large-constants.ll

 ; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -stackmap-version=2 | FileCheck %s --check-prefix=V2CHECK
 
 ; CHECK-LABEL:  .section  __LLVM_STACKMAPS,__llvm_stackmaps
 ; CHECK-NEXT: __LLVM_StackMaps:
 ; version
 ; CHECK-NEXT:   .byte 1
 ; reserved
 ; CHECK-NEXT:   .byte 0
 ; reserved

 ; NumLiveOuts
 ; CHECK-NEXT:   .short  0
 
 
 define void @bar() {
   tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 0, i32 0, i64 -9223372036854775808)
   ret void
 }
+
+; V2CHECK-LABEL:  .section  __LLVM_STACKMAPS,__llvm_stackmaps
+; V2CHECK-NEXT: __LLVM_StackMaps:
+; version
+; V2CHECK-NEXT: .byte 2
+; reserved
+; V2CHECK-NEXT: .byte 0
+; reserved
+; V2CHECK-NEXT: .short  0
+; # functions
+; V2CHECK-NEXT: .long 2
+; V2CHECK-NEXT: .long L{{.*}}-__LLVM_StackMaps
+; V2CHECK-NEXT: .long L{{.*}}-__LLVM_StackMaps
+; V2CHECK-NEXT: .long L{{.*}}-__LLVM_StackMaps
+; V2CHECK-NEXT: .long L{{.*}}-__LLVM_StackMaps
+; V2CHECK-NEXT: .long L{{.*}}-__LLVM_StackMaps
+
+; Constants Array:
+; V2CHECK-NEXT: .align  3
+; V2CHECK-NEXT:L{{.*}}:
+; V2CHECK-NEXT: .quad 9223372036854775807
+; V2CHECK-NEXT: .quad -9223372036854775808
+
+; FrameRecord Array
+; padding
+; V2CHECK-NEXT: .align  3
+; V2CHECK-NEXT:L{{.*}}:
+; function address
+; V2CHECK-NEXT: .quad _foo
+; function size
+; V2CHECK-NEXT: .long L{{.*}}-_foo
+; stack size
+; V2CHECK-NEXT: .long 8
+; flags
+; V2CHECK-NEXT: .short  1
+; frame base register
+; V2CHECK-NEXT: .short  6
+; stackmap record index
+; V2CHECK-NEXT: .short  0
+; stackmap record size
+; V2CHECK-NEXT: .short  1
+; padding
+; V2CHECK-NEXT: .align  3
+
+; function address
+; V2CHECK-NEXT: .quad _bar
+; function size
+; V2CHECK-NEXT: .long L{{.*}}-_bar
+; stack size
+; V2CHECK-NEXT: .long 8
+; flags
+; V2CHECK-NEXT: .short  1
+; frame base register
+; V2CHECK-NEXT: .short  6
+; stackmap record index
+; V2CHECK-NEXT: .short  1
+; stackmap record size
+; V2CHECK-NEXT: .short  1
+; padding
+; V2CHECK-NEXT: .align  3