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Differential D12550

AVX-512: store <4 x i1> and <2 x i1> data types in memory
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Authored by delena on Sep 2 2015, 12:59 AM.

Details

Reviewers
igorb
Commits
rG9f83c7346fe6: AVX-512: store <4 x i1> and <2 x i1> values in memory Enabled DAG pattern…
rL246625: AVX-512: store <4 x i1> and <2 x i1> values in memory
Summary

Store <4 x i1> and <2 x i1> values with KMOVB instruction under DQI predicate.

Diff Detail

Repository
rL LLVM

Event Timeline

delena updated this revision to Diff 33781.Sep 2 2015, 12:59 AM
delena retitled this revision from to AVX-512: store <4 x i1> and <2 x i1> data types in memory.
delena updated this object.
delena added a reviewer: igorb.
delena set the repository for this revision to rL LLVM.
delena added a subscriber: llvm-commits.
igorb edited edge metadata.Sep 2 2015, 2:18 AM

LGTM

Closed by commit rL246625: AVX-512: store <4 x i1> and <2 x i1> values in memory (authored by delena). · Explain WhySep 2 2015, 2:22 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
lib/
Target/
X86/
5 lines
test/
CodeGen/
X86/
14 lines

Diff 33786

llvm/trunk/lib/Target/X86/X86InstrAVX512.td

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} }
// Load/store kreg // Load/store kreg
let Predicates = [HasDQI] in { let Predicates = [HasDQI] in {
def : Pat<(store (i8 (bitconvert (v8i1 VK8:$src))), addr:$dst), def : Pat<(store (i8 (bitconvert (v8i1 VK8:$src))), addr:$dst),
(KMOVBmk addr:$dst, VK8:$src)>; (KMOVBmk addr:$dst, VK8:$src)>;
def : Pat<(v8i1 (bitconvert (i8 (load addr:$src)))), def : Pat<(v8i1 (bitconvert (i8 (load addr:$src)))),
(KMOVBkm addr:$src)>; (KMOVBkm addr:$src)>;
def : Pat<(store VK4:$src, addr:$dst),
(KMOVBmk addr:$dst, (COPY_TO_REGCLASS VK4:$src, VK8))>;
def : Pat<(store VK2:$src, addr:$dst),
(KMOVBmk addr:$dst, (COPY_TO_REGCLASS VK2:$src, VK8))>;
} }
let Predicates = [HasAVX512, NoDQI] in { let Predicates = [HasAVX512, NoDQI] in {
def : Pat<(store (i8 (bitconvert (v8i1 VK8:$src))), addr:$dst), def : Pat<(store (i8 (bitconvert (v8i1 VK8:$src))), addr:$dst),
(KMOVWmk addr:$dst, (COPY_TO_REGCLASS VK8:$src, VK16))>; (KMOVWmk addr:$dst, (COPY_TO_REGCLASS VK8:$src, VK16))>;
def : Pat<(v8i1 (bitconvert (i8 (load addr:$src)))), def : Pat<(v8i1 (bitconvert (i8 (load addr:$src)))),
(COPY_TO_REGCLASS (KMOVWkm addr:$src), VK8)>; (COPY_TO_REGCLASS (KMOVWkm addr:$src), VK8)>;
} }
let Predicates = [HasAVX512] in { let Predicates = [HasAVX512] in {
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llvm/trunk/test/CodeGen/X86/avx512-mask-op.ll

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; SKX-LABEL: test21 ; SKX-LABEL: test21
; SKX: vpmovb2m ; SKX: vpmovb2m
; SKX: vmovdqu16 {{.*}}%k1 ; SKX: vmovdqu16 {{.*}}%k1
define <32 x i16> @test21(<32 x i16> %x , <32 x i1> %mask) nounwind readnone { define <32 x i16> @test21(<32 x i16> %x , <32 x i1> %mask) nounwind readnone {
%ret = select <32 x i1> %mask, <32 x i16> %x, <32 x i16> zeroinitializer %ret = select <32 x i1> %mask, <32 x i16> %x, <32 x i16> zeroinitializer
ret <32 x i16> %ret ret <32 x i16> %ret
} }
; SKX-LABEL: test22
; SKX: kmovb
define void @test22(<4 x i1> %a, <4 x i1>* %addr) {
store <4 x i1> %a, <4 x i1>* %addr
ret void
}
; SKX-LABEL: test23
; SKX: kmovb
define void @test23(<2 x i1> %a, <2 x i1>* %addr) {
store <2 x i1> %a, <2 x i1>* %addr
ret void
}