[X86] Allow x86 call frame optimization to fold more loads into pushes

[mkuper]

Summary

This abstracts away the test for "when can we fold across a MachineInstruction" as a part of the MI interface, and uses the same test in the peephole optimizer and in callframe optimization.

[rnk]

lgtm

include/llvm/CodeGen/MachineInstr.h

public:
   /// by mayLoad / mayStore, etc.
   /// For all instructions, the property is encoded in MCInstrDesc::Flags
   /// (see MCInstrDesc::hasUnmodeledSideEffects(). The only exception is
   /// INLINEASM instruction, in which case the side effect property is encoded
   /// in one of its operands (see InlineAsm::Extra_HasSideEffect).
   ///
   bool hasUnmodeledSideEffects() const;
 
+  /// Returns true if it is illegal to fold a load across this instruction.
+  bool isLoadFoldBarrier() const;
+
   /// Return true if all the defs of this instruction are dead.
   bool allDefsAreDead() const;
 
   /// Copy implicit register operands from specified
   /// instruction to this instruction.
   void copyImplicitOps(MachineFunction &MF, const MachineInstr *MI);
 
   //

lib/CodeGen/MachineInstr.cpp

if (isInlineAsm()) {
     unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
     if (ExtraInfo & InlineAsm::Extra_HasSideEffects)
       return true;
   }
 
   return false;
 }
 
+bool MachineInstr::isLoadFoldBarrier() const {
+  return mayStore() || isCall() || hasUnmodeledSideEffects();
+}
+
 /// allDefsAreDead - Return true if all the defs of this instruction are dead.
 ///
 bool MachineInstr::allDefsAreDead() const {
   for (const MachineOperand &MO : operands()) {
     if (!MO.isReg() || MO.isUse())
       continue;
     if (!MO.isDead())
       return false;

lib/CodeGen/PeepholeOptimizer.cpp

for (MachineBasicBlock::iterator
       LocalMIs.insert(MI);
 
       // Skip debug values. They should not affect this peephole optimization.
       if (MI->isDebugValue())
           continue;
 
       // If there exists an instruction which belongs to the following
       // categories, we will discard the load candidates.
-      if (MI->mayStore() || MI->isCall() || MI->hasUnmodeledSideEffects())
+      if (MI->isLoadFoldBarrier())
         FoldAsLoadDefCandidates.clear();
 
       if (MI->isPosition() || MI->isPHI() || MI->isImplicitDef() ||
           MI->isKill() || MI->isInlineAsm() ||
           MI->hasUnmodeledSideEffects())
         continue;
 
       if ((isUncoalescableCopy(*MI) &&

lib/Target/X86/X86CallFrameOptimization.cpp

MachineInstr *X86CallFrameOptimization::canFoldIntoRegPush(
   MachineBasicBlock::iterator DefMI = MRI->getVRegDef(Reg);
 
   // Make sure the def is a MOV from memory.
   // If the def is an another block, give up.
   if (DefMI->getOpcode() != X86::MOV32rm ||
       DefMI->getParent() != FrameSetup->getParent())
     return nullptr;
 
-  // Now, make sure everything else up until the ADJCALLSTACK is a sequence
-  // of MOVs. To be less conservative would require duplicating a lot of the
-  // logic from PeepholeOptimizer.
-  // FIXME: A possibly better approach would be to teach the PeepholeOptimizer
-  // to be smarter about folding into pushes.
+  // Make sure we don't have any instructions between DefMI and the
+  // push that make folding the load illegal.
   for (auto I = DefMI; I != FrameSetup; ++I)
-    if (I->getOpcode() != X86::MOV32rm)
+    if (I->isLoadFoldBarrier())
       return nullptr;
 
   return DefMI;
 }

test/CodeGen/X86/movtopush.ll

 define void @test12b() optsize {
 entry:
   %s = alloca %struct.s, align 4  
   call void @good(i32 1, i32 2, i32 3, i32 4)  
   call void @struct(%struct.s* %s, i32 6, i32 7, i32 8)
   call void @good(i32 9, i32 10, i32 11, i32 12)
   ret void
 }
+
+; Make sure the add does not prevent folding loads into pushes.
+; val1 and val2 will not be folded into pushes since they have
+; an additional use, but val3 should be.
+; NORMAL-LABEL: test13:
+; NORMAL: movl ([[P1:%e..]]), [[V1:%e..]]
+; NORMAL-NEXT: movl ([[P2:%e..]]), [[V2:%e..]]
+; NORMAL-NEXT: , [[ADD:%e..]]
+; NORMAL-NEXT: pushl [[ADD]]
+; NORMAL-NEXT: pushl ([[P3:%e..]])
+; NORMAL-NEXT: pushl [[V2]]
+; NORMAL-NEXT: pushl [[V1]]
+; NORMAL-NEXT: calll _good
+; NORMAL: movl [[P3]], %eax
+define i32* @test13(i32* inreg %ptr1, i32* inreg %ptr2, i32* inreg %ptr3) optsize {
+entry:
+  %val1 = load i32, i32* %ptr1
+  %val2 = load i32, i32* %ptr2
+  %val3 = load i32, i32* %ptr3
+  %add = add i32 %val1, %val2
+  call void @good(i32 %val1, i32 %val2, i32 %val3, i32 %add)
+  ret i32* %ptr3
+}