WebAssembly: implement comparison.

[jfb]

Summary

Some of the FP comparisons (ueq, one, ult, ule, ugt, uge) are currently broken, I'll fix them in a follow-up.

[sunfish]

lib/Target/WebAssembly/WebAssemblyInstrFloat.td

27 ↗

(On Diff #31749)

The unordered comparisons (except "une") will be legalized. The optimization to do here is to fold the "don't care" comparisons to supported comparisons.

29 ↗

(On Diff #31749)

The NE operator is "une" rather than "one".

33 ↗

(On Diff #31749)

This patch lacks tests for the floating point comparisons.

[jfb]

• Add (broken) f32 test, trying to expand unsupported floating-point comparisons.

[jfb]

lib/Target/WebAssembly/WebAssemblyInstrFloat.td

31–37 ↗

(On Diff #31761)

I'm not sure I get what you mean about the "don't care" comparisons. You mean TRUE and FALSE?

33 ↗

(On Diff #31761)

I've been reading the DAG legalization code... I'm not sure I get it yet. I uploaded an intermediate update which is broken for now (and the CHECK are wrong, because I haven't settled on which expansions are needed)... I'm not sure I get the expansion order. Right now it says it can't select ueq, but it should have been expanded.

37 ↗

(On Diff #31761)

I'll add f64 when f32 works.

[jfb]

• Fix typo.

[jfb]

• Use the same 3-operand setcc+cond for FP comparisons as for int. It shouldn't change anything because of TargetSelectionDAG.td:910, but this is confusing...

[jfb]

• Add (broken) f32 test, trying to expand unsupported floating-point comparisons.
• Fix typo.
• Use the same 3-operand setcc+cond for FP comparisons as for int. It shouldn't change anything because of TargetSelectionDAG.td:910, but this is confusing...
• Remove currently broken FP comparisons (ueq, one, ult, ule, ugt, uge), so I can commit this and fix the broken ones separately.

[jfb]

I'll commit this patch since the functionality it adds is correct, and I'll address broken FP comparisons in a follow-up.

llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

WebAssemblyTargetLowering::WebAssemblyTargetLowering(
   addRegisterClass(MVT::i64, &WebAssembly::Int64RegClass);
   addRegisterClass(MVT::f32, &WebAssembly::Float32RegClass);
   addRegisterClass(MVT::f64, &WebAssembly::Float64RegClass);
   // Compute derived properties from the register classes.
   computeRegisterProperties(Subtarget->getRegisterInfo());
 
   // FIXME: many setOperationAction are missing...
 
-  // Don't expand the following types to constant pools.
-  setOperationAction(ISD::ConstantFP, MVT::f32, Legal);
-  setOperationAction(ISD::ConstantFP, MVT::f64, Legal);
+  for (auto T : {MVT::f32, MVT::f64}) {
+    // Don't expand the floating-point types to constant pools.
+    setOperationAction(ISD::ConstantFP, T, Legal);
+    // Expand floating-point comparisons.
+    for (auto CC : {ISD::SETO, ISD::SETUO, ISD::SETUEQ, ISD::SETONE,
+                    ISD::SETULT, ISD::SETULE, ISD::SETUGT, ISD::SETUGE})
+      setCondCodeAction(CC, T, Expand);
+  }
 }
 
 MVT WebAssemblyTargetLowering::getScalarShiftAmountTy(const DataLayout &DL,
                                                       EVT VT) const {
   return VT.getSimpleVT();
 }
 
 const char *

llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrFloat.td

 /*
  * TODO(jfb): add and test these:
  * defm CEIL : UnaryFP<fceil>;
  * defm FLOOR : UnaryFP<ffloor>;
  * defm TRUNC : UnaryFP<ftrunc>;
  * defm NEARESTINT : UnaryFP<fnearbyint>;
  */
 
-/*
- * TODO(jfb): Add the following for 32-bit and 64-bit.
- *
- * float32.eq: compare equal
- * float32.lt: less than
- * float32.le: less than or equal
- * float32.gt: greater than
- * float32.ge: greater than or equal
- */
+defm EQ : ComparisonFP<SETOEQ>;
+defm NE : ComparisonFP<SETUNE>;
+defm LT : ComparisonFP<SETOLT>;
+defm LE : ComparisonFP<SETOLE>;
+defm GT : ComparisonFP<SETOGT>;
+defm GE : ComparisonFP<SETOGE>;
 
 defm SQRT : UnaryFP<fsqrt>;
 
 /*
  * TODO(jfb): Add the following for 32-bit and 64-bit.
  *
  * float32.min: minimum (binary operator); if either operand is NaN, returns NaN
  * float32.max: maximum (binary operator); if either operand is NaN, returns NaN
  */

llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrFormats.td

def _F64 : I<(outs Float64:$dst), (ins Float64:$src),
                [(set Float64:$dst, (node Float64:$src))]>;
 }
 multiclass BinaryFP<SDNode node> {
   def _F32 : I<(outs Float32:$dst), (ins Float32:$lhs, Float32:$rhs),
                [(set Float32:$dst, (node Float32:$lhs, Float32:$rhs))]>;
   def _F64 : I<(outs Float64:$dst), (ins Float64:$lhs, Float64:$rhs),
                [(set Float64:$dst, (node Float64:$lhs, Float64:$rhs))]>;
 }
+multiclass ComparisonInt<CondCode cond> {
+  def _I32 : I<(outs Int32:$dst), (ins Int32:$lhs, Int32:$rhs),
+               [(set Int32:$dst, (setcc Int32:$lhs, Int32:$rhs, cond))]>;
+  def _I64 : I<(outs Int32:$dst), (ins Int64:$lhs, Int64:$rhs),
+               [(set Int32:$dst, (setcc Int64:$lhs, Int64:$rhs, cond))]>;
+}
+multiclass ComparisonFP<CondCode cond> {
+  def _F32 : I<(outs Int32:$dst), (ins Float32:$lhs, Float32:$rhs),
+               [(set Int32:$dst, (setcc Float32:$lhs, Float32:$rhs, cond))]>;
+  def _F64 : I<(outs Int32:$dst), (ins Float64:$lhs, Float64:$rhs),
+               [(set Int32:$dst, (setcc Float64:$lhs, Float64:$rhs, cond))]>;
+}

llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInteger.td

 defm UREM : BinaryInt<urem>;
 defm AND : BinaryInt<and>;
 defm IOR : BinaryInt<or>;
 defm XOR : BinaryInt<xor>;
 defm SHL : BinaryInt<shl>;
 defm SHR : BinaryInt<srl>;
 defm SAR : BinaryInt<sra>;
 
-/*
- * TODO(jfb): Add the following for 32-bit and 64-bit.
- *
- * int32.eq: signed-less compare equal
- * int32.slt: signed less than
- * int32.sle: signed less than or equal
- * int32.ult: unsigned less than
- * int32.ule: unsigned less than or equal
- * int32.sgt: signed greater than
- * int32.sge: signed greater than or equal
- * int32.ugt: unsigned greater than
- * int32.uge: unsigned greater than or equal
- */
+defm EQ : ComparisonInt<SETEQ>;
+defm NE : ComparisonInt<SETNE>;
+defm SLT : ComparisonInt<SETLT>;
+defm SLE : ComparisonInt<SETLE>;
+defm ULT : ComparisonInt<SETULT>;
+defm ULE : ComparisonInt<SETULE>;
+defm SGT : ComparisonInt<SETGT>;
+defm SGE : ComparisonInt<SETGE>;
+defm UGT : ComparisonInt<SETUGT>;
+defm UGE : ComparisonInt<SETUGE>;
 
 defm CLZ : UnaryInt<ctlz>;
 defm CTZ : UnaryInt<cttz>;
 defm POPCNT : UnaryInt<ctpop>;

llvm/trunk/test/CodeGen/WebAssembly/comparisons_f32.ll

+; RUN: llc < %s -asm-verbose=false | FileCheck %s
+
+; Test that basic 32-bit floating-point comparison operations assemble as
+; expected.
+
+target datalayout = "e-p:32:32-i64:64-v128:8:128-n32:64-S128"
+target triple = "wasm32-unknown-unknown"
+
+; FIXME: add ord and uno tests.
+
+; CHECK-LABEL: oeq_f32:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (eq @1 @0))
+; CHECK-NEXT: (setlocal @3 (immediate 1))
+; CHECK-NEXT: (setlocal @4 (and @2 @3))
+; CHECK-NEXT: (return @4)
+define i32 @oeq_f32(float %x, float %y) {
+  %a = fcmp oeq float %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: une_f32:
+; CHECK: (setlocal @2 (ne @1 @0))
+define i32 @une_f32(float %x, float %y) {
+  %a = fcmp une float %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: olt_f32:
+; CHECK: (setlocal @2 (lt @1 @0))
+define i32 @olt_f32(float %x, float %y) {
+  %a = fcmp olt float %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: ole_f32:
+; CHECK: (setlocal @2 (le @1 @0))
+define i32 @ole_f32(float %x, float %y) {
+  %a = fcmp ole float %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: ogt_f32:
+; CHECK: (setlocal @2 (gt @1 @0))
+define i32 @ogt_f32(float %x, float %y) {
+  %a = fcmp ogt float %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: oge_f32:
+; CHECK: (setlocal @2 (ge @1 @0))
+define i32 @oge_f32(float %x, float %y) {
+  %a = fcmp oge float %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; FIXME test other FP comparisons: ueq, one, ult, ule, ugt, uge. They currently
+; are broken and failt to match.

llvm/trunk/test/CodeGen/WebAssembly/comparisons_f64.ll

+; RUN: llc < %s -asm-verbose=false | FileCheck %s
+
+; Test that basic 64-bit floating-point comparison operations assemble as
+; expected.
+
+target datalayout = "e-p:32:32-i64:64-v128:8:128-n32:64-S128"
+target triple = "wasm32-unknown-unknown"
+
+; FIXME: add ord and uno tests.
+
+; CHECK-LABEL: oeq_f64:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (eq @1 @0))
+; CHECK-NEXT: (setlocal @3 (immediate 1))
+; CHECK-NEXT: (setlocal @4 (and @2 @3))
+; CHECK-NEXT: (return @4)
+define i32 @oeq_f64(double %x, double %y) {
+  %a = fcmp oeq double %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: une_f64:
+; CHECK: (setlocal @2 (ne @1 @0))
+define i32 @une_f64(double %x, double %y) {
+  %a = fcmp une double %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: olt_f64:
+; CHECK: (setlocal @2 (lt @1 @0))
+define i32 @olt_f64(double %x, double %y) {
+  %a = fcmp olt double %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: ole_f64:
+; CHECK: (setlocal @2 (le @1 @0))
+define i32 @ole_f64(double %x, double %y) {
+  %a = fcmp ole double %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: ogt_f64:
+; CHECK: (setlocal @2 (gt @1 @0))
+define i32 @ogt_f64(double %x, double %y) {
+  %a = fcmp ogt double %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: oge_f64:
+; CHECK: (setlocal @2 (ge @1 @0))
+define i32 @oge_f64(double %x, double %y) {
+  %a = fcmp oge double %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; FIXME test other FP comparisons: ueq, one, ult, ule, ugt, uge. They currently
+; are broken and failt to match.

llvm/trunk/test/CodeGen/WebAssembly/comparisons_i32.ll

+; RUN: llc < %s -asm-verbose=false | FileCheck %s
+
+; Test that basic 32-bit integer comparison operations assemble as expected.
+
+target datalayout = "e-p:32:32-i64:64-v128:8:128-n32:64-S128"
+target triple = "wasm32-unknown-unknown"
+
+; CHECK-LABEL: eq_i32:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (eq @1 @0))
+; CHECK-NEXT: (setlocal @3 (immediate 1))
+; CHECK-NEXT: (setlocal @4 (and @2 @3))
+; CHECK-NEXT: (return @4)
+define i32 @eq_i32(i32 %x, i32 %y) {
+  %a = icmp eq i32 %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: ne_i32:
+; CHECK: (setlocal @2 (ne @1 @0))
+define i32 @ne_i32(i32 %x, i32 %y) {
+  %a = icmp ne i32 %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: slt_i32:
+; CHECK: (setlocal @2 (slt @1 @0))
+define i32 @slt_i32(i32 %x, i32 %y) {
+  %a = icmp slt i32 %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: sle_i32:
+; CHECK: (setlocal @2 (sle @1 @0))
+define i32 @sle_i32(i32 %x, i32 %y) {
+  %a = icmp sle i32 %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: ult_i32:
+; CHECK: (setlocal @2 (ult @1 @0))
+define i32 @ult_i32(i32 %x, i32 %y) {
+  %a = icmp ult i32 %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: ule_i32:
+; CHECK: (setlocal @2 (ule @1 @0))
+define i32 @ule_i32(i32 %x, i32 %y) {
+  %a = icmp ule i32 %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: sgt_i32:
+; CHECK: (setlocal @2 (sgt @1 @0))
+define i32 @sgt_i32(i32 %x, i32 %y) {
+  %a = icmp sgt i32 %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: sge_i32:
+; CHECK: (setlocal @2 (sge @1 @0))
+define i32 @sge_i32(i32 %x, i32 %y) {
+  %a = icmp sge i32 %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: ugt_i32:
+; CHECK: (setlocal @2 (ugt @1 @0))
+define i32 @ugt_i32(i32 %x, i32 %y) {
+  %a = icmp ugt i32 %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: uge_i32:
+; CHECK: (setlocal @2 (uge @1 @0))
+define i32 @uge_i32(i32 %x, i32 %y) {
+  %a = icmp uge i32 %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}

llvm/trunk/test/CodeGen/WebAssembly/comparisons_i64.ll

+; RUN: llc < %s -asm-verbose=false | FileCheck %s
+
+; Test that basic 64-bit integer comparison operations assemble as expected.
+
+target datalayout = "e-p:32:32-i64:64-v128:8:128-n32:64-S128"
+target triple = "wasm32-unknown-unknown"
+
+; CHECK-LABEL: eq_i64:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (eq @1 @0))
+; CHECK-NEXT: (setlocal @3 (immediate 1))
+; CHECK-NEXT: (setlocal @4 (and @2 @3))
+; CHECK-NEXT: (return @4)
+define i32 @eq_i64(i64 %x, i64 %y) {
+  %a = icmp eq i64 %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: ne_i64:
+; CHECK: (setlocal @2 (ne @1 @0))
+define i32 @ne_i64(i64 %x, i64 %y) {
+  %a = icmp ne i64 %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: slt_i64:
+; CHECK: (setlocal @2 (slt @1 @0))
+define i32 @slt_i64(i64 %x, i64 %y) {
+  %a = icmp slt i64 %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: sle_i64:
+; CHECK: (setlocal @2 (sle @1 @0))
+define i32 @sle_i64(i64 %x, i64 %y) {
+  %a = icmp sle i64 %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: ult_i64:
+; CHECK: (setlocal @2 (ult @1 @0))
+define i32 @ult_i64(i64 %x, i64 %y) {
+  %a = icmp ult i64 %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: ule_i64:
+; CHECK: (setlocal @2 (ule @1 @0))
+define i32 @ule_i64(i64 %x, i64 %y) {
+  %a = icmp ule i64 %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: sgt_i64:
+; CHECK: (setlocal @2 (sgt @1 @0))
+define i32 @sgt_i64(i64 %x, i64 %y) {
+  %a = icmp sgt i64 %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: sge_i64:
+; CHECK: (setlocal @2 (sge @1 @0))
+define i32 @sge_i64(i64 %x, i64 %y) {
+  %a = icmp sge i64 %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: ugt_i64:
+; CHECK: (setlocal @2 (ugt @1 @0))
+define i32 @ugt_i64(i64 %x, i64 %y) {
+  %a = icmp ugt i64 %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+; CHECK-LABEL: uge_i64:
+; CHECK: (setlocal @2 (uge @1 @0))
+define i32 @uge_i64(i64 %x, i64 %y) {
+  %a = icmp uge i64 %x, %y
+  %b = zext i1 %a to i32
+  ret i32 %b
+}