This is an archive of the discontinued LLVM Phabricator instance.

AMDGPU: Make scc not allocatable
AbandonedPublic

Authored by arsenm on Aug 1 2015, 12:01 AM.

Reviewers

• tstellarAMD

Summary

This fixes an assertion in the SIInsertWait pass when i32 is removed from scc.

arsenm retitled this revision from to AMDGPU: Make scc not allocatable .

arsenm updated this object.

arsenm added a subscriber: llvm-commits.

Obsoleted by D11704

Path

Size

lib/

Target/

AMDGPU/

1 line

Context not available.

	// Special register classes for predicates and the M0 register	// Special register classes for predicates and the M0 register
	def SCCReg : RegisterClass<"AMDGPU", [i32, i1], 32, (add SCC)> {	def SCCReg : RegisterClass<"AMDGPU", [i32, i1], 32, (add SCC)> {
		let isAllocatable = 0;
	let CopyCost = -1; // Theoretically it is possible to read from SCC,	let CopyCost = -1; // Theoretically it is possible to read from SCC,
	// but it should never be necessary.	// but it should never be necessary.
	}	}
Context not available.