This is an archive of the discontinued LLVM Phabricator instance.

[compiler-rt] [builtin] Implement __atomic_fetch_nand_* builtins
Needs RevisionPublic

Authored by krytarowski on Jun 3 2020, 8:45 AM.

Details

Reviewers
theraven
Summary

Increase compatibility with GCC libatomic.

Diff Detail

Event Timeline

krytarowski created this revision.Jun 3 2020, 8:45 AM
Herald added a project: Restricted Project. · View Herald TranscriptJun 3 2020, 8:45 AM
Herald added subscribers: Restricted Project, jfb, dberris. · View Herald Transcript
jfb added a comment.Jun 3 2020, 1:43 PM

Please clarify what this is adding in the patch description.

compiler-rt/lib/builtins/atomic.c
334

Is there no lockfree version of this? If not, why? It should be there for relevant sizes.

krytarowski marked an inline comment as done.Jun 3 2020, 6:55 PM
In D81105#2072158, @jfb wrote:

Please clarify what this is adding in the patch description.

I'm adding builtins that exist in GCC libatomic. What should I document extra?

compiler-rt/lib/builtins/atomic.c
334

Not for NAND, at least not for my CPU & compiler I tested.

theraven requested changes to this revision.Jun 4 2020, 4:13 AM
theraven added inline comments.
compiler-rt/lib/builtins/atomic.c
334

I don't understand this comment. A CPU that has load-linked / store-conditional or atomic compare-and-exchange for values that are this size has a lock-free version. That will be used by the compiler with some flags, so this implementation will not be atomic with respect to versions that use them. That's a big problem.

This revision now requires changes to proceed.Jun 4 2020, 4:13 AM