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[AArch64] Add workaround for Cortex-A53 erratum (835769)
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Authored by bsmith on Oct 10 2014, 2:06 AM.

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Reviewers
rengolin
Summary

Some early revisions of the Cortex-A53 have an erratum (835769) whereby it is
possible for a 64-bit multiply-accumulate instruction in AArch64 state to
generate an incorrect result. The details are quite complex and hard to
determine statically, since branches in the code may exist in some
circumstances, but all cases end with a memory (load, store, or prefetch)
instruction followed immediately by the multiply-accumulate operation.

The safest work-around for this issue is to make the compiler avoid emitting
multiply-accumulate instructions immediately after memory instructions and the
simplest way to do this is to insert a NOP.

This patch implements clang options to enable this workaround in the backend.

The work-around code generation is not enabled by default.

Diff Detail

Event Timeline

bsmith updated this revision to Diff 14707.Oct 10 2014, 2:06 AM
bsmith retitled this revision from to [AArch64] Add workaround for Cortex-A53 erratum (835769).
bsmith updated this object.
bsmith edited the test plan for this revision. (Show Details)
bsmith set the repository for this revision to rL LLVM.
bsmith added a subscriber: Unknown Object (MLST).
rengolin accepted this revision.Oct 10 2014, 2:39 AM
rengolin added a reviewer: rengolin.
rengolin added a subscriber: rengolin.

Assuming the LLVM part is good, this looks good to me, too. Thanks!

include/clang/Driver/Options.td
1169

That is a horrible name for a flag, but I don't have a better one. :)

test/Driver/aarch64-fix-cortex-a53-835769-cg.c
18

It's amazing how this works out of the box... :)

This revision is now accepted and ready to land.Oct 10 2014, 2:39 AM

Should we enable it by default if -mcpu=cortex-a53 ?

bsmith closed this revision.Oct 13 2014, 3:26 AM

Committed as 219604, thanks!