This is an archive of the discontinued LLVM Phabricator instance.

Differential D3674

[mips] Added missing daddu test to the valid instruction tests.
ClosedPublic

Authored by dsanders on May 8 2014, 6:53 AM.

Details

Reviewers
vmedic
Commits
rGf0751731277b: [mips] Added missing daddu test to the valid instruction tests.
rL208398: [mips] Added missing daddu test to the valid instruction tests.
Summary

Depends on D3673

Diff Detail

Event Timeline

dsanders updated this revision to Diff 9215.May 8 2014, 6:53 AM
dsanders retitled this revision from to [mips] Added missing daddu test to the valid instruction tests..
dsanders updated this object.
dsanders edited the test plan for this revision. (Show Details)
dsanders added a reviewer: vmedic.
dsanders added a parent revision: D3673: [mips] Added missing dsra -> dsrav and sra -> srav aliases..
vmedic accepted this revision.May 9 2014, 1:57 AM
vmedic edited edge metadata.

LGTM

This revision is now accepted and ready to land.May 9 2014, 1:57 AM
dsanders closed this revision.May 9 2014, 2:39 AM

Revision Contents

PathSize
test/
MC/
Mips/
mips3/
1 line
mips4/
1 line
mips5/
1 line
mips64/
1 line
mips64r2/
1 line

Diff 9215

test/MC/Mips/mips3/valid.s

Show All 28 Lines# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips3 | FileCheck %s
cvt.s.d $f26,$f8 cvt.s.d $f26,$f8
cvt.s.l $f15,$f30 cvt.s.l $f15,$f30
cvt.s.w $f22,$f15 cvt.s.w $f22,$f15
cvt.w.d $f20,$f14 cvt.w.d $f20,$f14
cvt.w.s $f20,$f24 cvt.w.s $f20,$f24
dadd $s3,$at,$ra dadd $s3,$at,$ra
daddi $sp,$s4,-27705 daddi $sp,$s4,-27705
daddiu $k0,$s6,-4586 daddiu $k0,$s6,-4586
daddu $s3,$at,$ra
ddiv $zero,$k0,$s3 ddiv $zero,$k0,$s3
ddivu $zero,$s0,$s1 ddivu $zero,$s0,$s1
div $zero,$25,$11 div $zero,$25,$11
div.d $f29,$f20,$f27 div.d $f29,$f20,$f27
div.s $f4,$f5,$f15 div.s $f4,$f5,$f15
divu $zero,$25,$15 divu $zero,$25,$15
dmfc1 $12,$f13 dmfc1 $12,$f13
dmtc1 $s0,$f14 dmtc1 $s0,$f14
▲ Show 20 Lines • Show All 131 Lines • Show Last 20 Lines

test/MC/Mips/mips4/valid.s

Show All 28 Lines# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips4 | FileCheck %s
cvt.s.d $f26,$f8 cvt.s.d $f26,$f8
cvt.s.l $f15,$f30 cvt.s.l $f15,$f30
cvt.s.w $f22,$f15 cvt.s.w $f22,$f15
cvt.w.d $f20,$f14 cvt.w.d $f20,$f14
cvt.w.s $f20,$f24 cvt.w.s $f20,$f24
dadd $s3,$at,$ra dadd $s3,$at,$ra
daddi $sp,$s4,-27705 daddi $sp,$s4,-27705
daddiu $k0,$s6,-4586 daddiu $k0,$s6,-4586
daddu $s3,$at,$ra
ddiv $zero,$k0,$s3 ddiv $zero,$k0,$s3
ddivu $zero,$s0,$s1 ddivu $zero,$s0,$s1
div $zero,$25,$11 div $zero,$25,$11
div.d $f29,$f20,$f27 div.d $f29,$f20,$f27
div.s $f4,$f5,$f15 div.s $f4,$f5,$f15
divu $zero,$25,$15 divu $zero,$25,$15
dmfc1 $12,$f13 dmfc1 $12,$f13
dmtc1 $s0,$f14 dmtc1 $s0,$f14
▲ Show 20 Lines • Show All 149 Lines • Show Last 20 Lines

test/MC/Mips/mips5/valid.s

Show All 28 Lines# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips5 | FileCheck %s
cvt.s.d $f26,$f8 cvt.s.d $f26,$f8
cvt.s.l $f15,$f30 cvt.s.l $f15,$f30
cvt.s.w $f22,$f15 cvt.s.w $f22,$f15
cvt.w.d $f20,$f14 cvt.w.d $f20,$f14
cvt.w.s $f20,$f24 cvt.w.s $f20,$f24
dadd $s3,$at,$ra dadd $s3,$at,$ra
daddi $sp,$s4,-27705 daddi $sp,$s4,-27705
daddiu $k0,$s6,-4586 daddiu $k0,$s6,-4586
daddu $s3,$at,$ra
ddiv $zero,$k0,$s3 ddiv $zero,$k0,$s3
ddivu $zero,$s0,$s1 ddivu $zero,$s0,$s1
div $zero,$25,$11 div $zero,$25,$11
div.d $f29,$f20,$f27 div.d $f29,$f20,$f27
div.s $f4,$f5,$f15 div.s $f4,$f5,$f15
divu $zero,$25,$15 divu $zero,$25,$15
dmfc1 $12,$f13 dmfc1 $12,$f13
dmtc1 $s0,$f14 dmtc1 $s0,$f14
▲ Show 20 Lines • Show All 151 Lines • Show Last 20 Lines

test/MC/Mips/mips64/valid.s

Show All 30 Lines# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64 | FileCheck %s
cvt.s.d $f26,$f8 cvt.s.d $f26,$f8
cvt.s.l $f15,$f30 cvt.s.l $f15,$f30
cvt.s.w $f22,$f15 cvt.s.w $f22,$f15
cvt.w.d $f20,$f14 cvt.w.d $f20,$f14
cvt.w.s $f20,$f24 cvt.w.s $f20,$f24
dadd $s3,$at,$ra dadd $s3,$at,$ra
daddi $sp,$s4,-27705 daddi $sp,$s4,-27705
daddiu $k0,$s6,-4586 daddiu $k0,$s6,-4586
daddu $s3,$at,$ra
dclo $s2,$a2 dclo $s2,$a2
dclz $s0,$25 dclz $s0,$25
deret deret
ddiv $zero,$k0,$s3 ddiv $zero,$k0,$s3
ddivu $zero,$s0,$s1 ddivu $zero,$s0,$s1
div $zero,$25,$11 div $zero,$25,$11
div.d $f29,$f20,$f27 div.d $f29,$f20,$f27
div.s $f4,$f5,$f15 div.s $f4,$f5,$f15
▲ Show 20 Lines • Show All 163 Lines • Show Last 20 Lines

test/MC/Mips/mips64r2/valid.s

Show All 30 Lines# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r2 | FileCheck %s
cvt.s.d $f26,$f8 cvt.s.d $f26,$f8
cvt.s.l $f15,$f30 cvt.s.l $f15,$f30
cvt.s.w $f22,$f15 cvt.s.w $f22,$f15
cvt.w.d $f20,$f14 cvt.w.d $f20,$f14
cvt.w.s $f20,$f24 cvt.w.s $f20,$f24
dadd $s3,$at,$ra dadd $s3,$at,$ra
daddi $sp,$s4,-27705 daddi $sp,$s4,-27705
daddiu $k0,$s6,-4586 daddiu $k0,$s6,-4586
daddu $s3,$at,$ra
dclo $s2,$a2 dclo $s2,$a2
dclz $s0,$25 dclz $s0,$25
deret deret
di $s8 di $s8
ddiv $zero,$k0,$s3 ddiv $zero,$k0,$s3
ddivu $zero,$s0,$s1 ddivu $zero,$s0,$s1
div $zero,$25,$11 div $zero,$25,$11
div.d $f29,$f20,$f27 div.d $f29,$f20,$f27
▲ Show 20 Lines • Show All 186 Lines • Show Last 20 Lines