Codegen: Don't tail-duplicate blocks with un-analyzable fallthrough.

[iteratee]

Summary

If AnalyzeBranch can't analyze a block and it is possible to
fallthrough, then duplicating the block doesn't make sense, as only one
block can be the layout predecessor for the un-analyzable fallthrough.

Submitted wit a test case, but NOTE: the test case doesn't currently
fail. However, the test case fails with D20505 and would have saved me
some time debugging.

[echristo]

Couple of random drive by testcase changes, and a comment request, otherwise looks OK to me.

-eric

lib/CodeGen/TailDuplicator.cpp

595

Might want to comment that this matches the other test as well.

test/CodeGen/PowerPC/tail-dup-analyzable-fallthrough.ll

60

Can probably limit the flags here.

62–69

Probably don't need the TBAA information?

[iteratee]

Tidied up test case.

[iteratee]

lib/CodeGen/TailDuplicator.cpp

595

Do you mean that it matches the test in MachineBlockPlacement.cpp?

[echristo]

lib/CodeGen/TailDuplicator.cpp

595

Yep!

[iteratee]

I just realized that this isn't a bug in the current code, as fallthrough doesn't get duplicated currently, but only a bug with D20505. I'm going to roll this fix in there along with the test case.

[iteratee]

Fixed test case. Existing test case relied on tail-merging. This one doesn't.

[iteratee]

Expanded comment.

[iteratee]

Am I still OK to commit this?

[mehdi_amini]

If it has been committed, can you post the revision number here when closing please?

[iteratee]

Committed in r278287

[iteratee]

Scratch that. Committed in r278288

lib/CodeGen/TailDuplicator.cpp

for (auto &I : *SB) {
       unsigned Idx = getPHISrcRegOpIdx(&I, &TailBB);
       assert(Idx != 0);
       MachineOperand &PU = I.getOperand(Idx);
       if (PU.getSubReg() != 0)
         return false;
     }
   }
 
+  // If the block to be duplicated ends in an unanalyzable fallthrough, don't
+  // duplicate it.
+  // A similar check is necessary in MachineBlockPlacement to make sure pairs of
+  // blocks with unanalyzable fallthrough get layed out contiguously.
+  MachineBasicBlock *PredTBB = nullptr, *PredFBB = nullptr;
+  SmallVector<MachineOperand, 4> PredCond;
+  if (TII->analyzeBranch(TailBB, PredTBB, PredFBB, PredCond, true)
+      && TailBB.canFallThrough())
+    return false;
+
   if (HasIndirectbr && PreRegAlloc)
     return true;
 
   if (IsSimple)
     return true;
 
   if (!PreRegAlloc)
     return true;

test/CodeGen/PowerPC/tail-dup-analyzable-fallthrough.ll

+; RUN: llc -O2 < %s | FileCheck %s
+target datalayout = "e-m:e-i64:64-n32:64"
+target triple = "powerpc64le-unknown-linux-gnu"
+
+; Check that the conditional return block of fmax_double3.exit was not
+; duplicated into the if.then.i block
+; CHECK: # %if.then.i
+; CHECK: lxvd2x
+; CHECK: stxvd2x
+; CHECK-NOT: bclr
+; CHECK: {{^}}.LBB{{[0-9_]+}}:
+; CHECK-SAME: # %fmax_double3.exit
+; CHECK: bclr
+; CHECK: # %if.then
+; Function Attrs: nounwind
+define void @__fmax_double3_3D_exec(<2 x double>* %input6, i1 %bool1, i1 %bool2) #0 {
+entry:
+  br i1 %bool1, label %if.then.i, label %fmax_double3.exit
+
+if.then.i:                                        ; preds = %entry
+  store <2 x double> zeroinitializer, <2 x double>* %input6, align 32
+  br label %fmax_double3.exit
+
+fmax_double3.exit:                                ; preds = %if.then.i, %entry
+  br i1 %bool2, label %if.then, label %do.end
+
+if.then:                                          ; preds = %fmax_double3.exit
+  unreachable
+
+do.end:                                           ; preds = %fmax_double3.exit
+  ret void
+}
+
+attributes #0 = { nounwind }