Handle invalid values of PLT entry size generated by ld + gcc on arm linux targets.

[omjavaid]

Summary

This patch provides a fix for wrong plt entry size generated for binaries built with gcc and linked with ld for arm linux targets.

Many tests fail on arm-linux targets for this very issues. Luckily on Android arm32 targets we get a zero size for which there is already a fix available in the code.

Effect of this patch appears when code jumps into plt code and tries to calculate frame for current PC. A wrong calculation of plt entry addresses ranges results in failure to calculate frame hence stepping failures when dealing with any library functions using procedure linkage table.

LD produces 12 byte plt entries for arm and can also produce 16 byte entries but by no means plt entry can be 4 bytes which appears while we decode plt header.

No other architecture in my knowledge uses a PLT slot of less than or equal to 4bytes. I could be wrong but in my knowledge a PLT slot is at least 2 instructions on a 32bit machine s which is 8 bytes and a lot higher for 64 bit machines so I have made the code change to handle all casses below or equal 4 bytes with manual calculation.

This fixes issues on arm targets.

LGTM? or comments?

[clayborg]

As long as PLT entries can't possibly be 4 bytes, then this is OK. Another way to fix this would be to make a "CheckPLTSize()" function that checks the architecture of the file, or just the e_machine from the ELF header, and does the right thing based on the architecture.

[tberghammer]

I don't really have an opinion about CheckPLTSize() function Greg proposes but I definitely want to see some comment explaining why we say that a plt entry less then 4 byte is invalid.

lldb/trunk/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp

 {
     const elf_xword num_relocations = rel_hdr->sh_size / rel_hdr->sh_entsize;
 
     // Clang 3.3 sets entsize to 4 for 32-bit binaries, but the plt entries are 16 bytes.
     // So round the entsize up by the alignment if addralign is set.
     elf_xword plt_entsize = plt_hdr->sh_addralign ?
         llvm::alignTo (plt_hdr->sh_entsize, plt_hdr->sh_addralign) : plt_hdr->sh_entsize;
 
-    if (plt_entsize == 0)
+    // Some linkers e.g ld for arm, fill plt_hdr->sh_entsize field incorrectly.
+    // PLT entries relocation code in general requires multiple instruction and
+    // should be greater than 4 bytes in most cases. Try to guess correct size just in case.
+    if (plt_entsize <= 4)
     {
         // The linker haven't set the plt_hdr->sh_entsize field. Try to guess the size of the plt
         // entries based on the number of entries and the size of the plt section with the
         // assumption that the size of the 0th entry is at least as big as the size of the normal
         // entries and it isn't much bigger then that.
         if (plt_hdr->sh_addralign)
             plt_entsize = plt_hdr->sh_size / plt_hdr->sh_addralign / (num_relocations + 1) * plt_hdr->sh_addralign;
         else