Change how we apply rellocations

[• rafael]

Summary

With this patch we use the first scan over the relocations to remember the information we found about them: will them be relaxed, will a plt be used, etc.

With that the actual relocation application becomes much simpler. That is particularly true for the interfaces in Target.h.

This passes all tests, but I am still debugging a difference in the produced clang binary.

[ruiu]

First round of review comments.

ELF/InputSection.cpp

309–312

Sort.

ELF/InputSection.h

28

I'd define R_* names directly inside lld::ELF namespace because they don't conflict with other identifiers because of its R_ prefix.

39

I'd name R_PPC_PLT_OPD since this is PPC-specific.

54

I'd probably avoid naming this "Expr" because it is not an expression. It is more like the relocation type, right?

ELF/Target.cpp

236

You want to make this a pure virtual function.

530

It is no longer SA (which implies S+A) right? You want to give a new name.

ELF/Writer.cpp

607–615

You can separate IsSizeRel from other types.

if (Target->isSizeRel(Type)) {
  C.Relocations.push_back({Relocation::R_SIZE, Type, RI.r_offset, Addend, &Body});
  continue;
}

if (!Config->Pic ||  ...) {
  C.Relocations.push_back({Expr, Type, RI.r_offset, Addend, &Body});
  continue;
}

[atanasyan]

Hi Rafael,

What is the state of this patch: under active development or postponed?

[• rafael]

Rebased patch.

Sorry for the crazy delay. The two main things that are delaying this are

• I noticed this was not handling non alloc sections.
• I think I can dramatically reduced the number of enumerations that are needed. Similar to what I did in r265682.

I am giving the second idea a push. With that in place I will then fix the first one and upload a new patch that also addresses the review comments.

[atanasyan]

ELF/InputSection.h

39

I'd name R_PPC_PLT_OPD since this is PPC-specific.

I suggest to rename s/R_GOT_PAGE_PC/R_AARCH64_GOT_PAGE_PC/ and s/R_PAGE_PC/R_AARCH64_PAGE_PC/ by the same reason.

[ruiu]

ELF/InputSection.cpp

308

This function can be separated into three parts: the first switch-case, the middle ifs to adjust SymVA for special cases, and the last switch-case.

Looks like in most cases you can return from this function from the first switch-case. Why don't you do that?

ELF/InputSection.h

28

So you think that that's not a good idea?

[• rafael]

Comment at: ELF/InputSection.h:53
@@ +52,3 @@
+ R_TLSLD_PC
+ } Expr;

+ uint32_t Type;

I'd probably avoid naming this "Expr" because it is not an expression. It is more like the relocation type, right?

It is part of it. The relocation type also says where to write (bits
10-21 for example), which is why I went with expr: it mostly just
shows which expression the relocation computes.

I will upload a new WIP patch in a second.

The final version I want to commit has far fewer enums by representing
the target by just addend and output section. With that representation
we don't need, for example, R_PC and and R_GOT_PC.

Cheers,
Rafael

[• rafael]

Rebase and fix some review comments.

[silvas]

ELF/Target.cpp

530

Val is very generic. The previous names were based on computations in the psABI specs. Where is the documentation of the meaning of Val?

[• rafael]

Address review comments.

Simplify mips got handling.

[ruiu]

ELF/InputSection.cpp

189

Why don't you return early in this switch-case? For example, for R_ABS, you can immediately return Body.getVA<ELFT>(A).

[ruiu]

ELF/InputSection.cpp

273–274

This if falls through because there's no continue. Is this expected?

[• rafael]

Early return as much as possible.

I will add processing of non alloca sections next.

[• rafael]

Pass new mips tests.

I will really add non alloca sections next.

[• rafael]

I think this patch handles all the cases.

It is a small speedup or slowdown in all testcases, with one exception: debug info. Since we were not doing the first pass for non alloc sections, this slows it down.

Linking scylla with debug info goes from 4.880429771 seconds to 5.623892311 seconds (gold is at 6.48).

The slowdown is regrettable, but I think we should do this as it is a big maintenance improvement. If the speed at which we handle debug info becomes an issue, we can special case non alloc sections by

• Moving the body of scan reloc to a helper function/class that just stays which dynamic relocs/exprs it maps to.
• For alloc sections, do it like now.
• For non alloc sections, don't do the first scan and have relocate call the helper for each relocation and immediately relocate it.

[ruiu]

LGTM

The current way of handling relocation is too overloaded and hard to (or even impossible to) understand. This patch is toward the right direction.

We eventually want to have a separate function to apply relocations for non-alloc sections becasue non-alloc sections don't need these crazy number of decisions we make in scanRelocs. I believe that writing a separate function for non-alloc to directly apply relocations is fairly easy. So I consider the performance degradation caused by this change is rather temporary.

[grimar]

ELF/Target.cpp

708

I think R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX should be here either.

[emaste]

Is this one ready to land?

[ruiu]

This has landed already as r266158.

ELF/InputSection.h

 namespace elf {
 
 template <class ELFT> class ICF;
 template <class ELFT> class DefinedRegular;
 template <class ELFT> class ObjectFile;
 template <class ELFT> class OutputSection;
 template <class ELFT> class OutputSectionBase;
 
+enum RelExpr {
+  R_ABS,
+  R_GOT,
+  R_GOT_PAGE_PC,
+  R_GOT_PC,
+  R_MIPS_GOT,
+  R_MIPS_GOT_LOCAL,
+  R_MIPS_GP0,
+  R_PAGE_PC,
+  R_PC,
+  R_PLT,
+  R_PLT_PC,
+  R_PPC_OPD,
+  R_PPC_PLT_OPD,
+  R_PPC_TOC,
+  R_RELAX_TLS_GD_TO_IE,
+  R_RELAX_TLS_GD_TO_IE_PC,
+  R_RELAX_TLS_GD_TO_LE,
+  R_RELAX_TLS_IE_TO_LE,
+  R_RELAX_TLS_LD_TO_LE,
+  R_SIZE,
+  R_THUNK,
+  R_TLSGD,
+  R_TLSGD_PC,
+  R_TLSLD,
+  R_TLSLD_PC
+};
+
+struct Relocation {
+  RelExpr Expr;
+  uint32_t Type;
+  uint64_t Offset;
+  uint64_t Addend;
+  SymbolBody *Sym;
+};
+
 // This corresponds to a section of an input file.
 template <class ELFT> class InputSectionBase {
 protected:
   typedef typename ELFT::Rel Elf_Rel;
   typedef typename ELFT::Rela Elf_Rela;
   typedef typename ELFT::Shdr Elf_Shdr;
   typedef typename ELFT::Sym Elf_Sym;
   typedef typename ELFT::uint uintX_t;
public:
   uintX_t getOffset(uintX_t Offset);
 
   ArrayRef<uint8_t> getSectionData() const;
 
   // Returns a section that Rel is pointing to. Used by the garbage collector.
   InputSectionBase<ELFT> *getRelocTarget(const Elf_Rel &Rel) const;
   InputSectionBase<ELFT> *getRelocTarget(const Elf_Rela &Rel) const;
 
-  template <class RelTy>
-  void relocate(uint8_t *Buf, uint8_t *BufEnd, llvm::ArrayRef<RelTy> Rels);
-
-private:
-  template <class RelTy>
-  int32_t findMipsPairedAddend(uint8_t *Buf, uint8_t *BufLoc, SymbolBody &Sym,
-                               const RelTy *Rel, const RelTy *End);
+  void relocate(uint8_t *Buf, uint8_t *BufEnd);
+  std::vector<Relocation> Relocations;
 };
 
 template <class ELFT> InputSectionBase<ELFT> InputSectionBase<ELFT>::Discarded;
 
 // Usually sections are copied to the output as atomic chunks of data,
 // but some special types of sections are split into small pieces of data
 // and each piece is copied to a different place in the output.
 // This class represents such special sections.

ELF/InputSection.cpp

for (const RelTy &Rel : Rels) {
     RelTy *P = reinterpret_cast<RelTy *>(Buf);
     Buf += sizeof(RelTy);
 
     P->r_offset = RelocatedSection->getOffset(Rel.r_offset);
     P->setSymbolAndType(Body.DynsymIndex, Type, Config->Mips64EL);
   }
 }
 
-template <class RelTy>
-static uint32_t getMipsPairType(const RelTy *Rel, const SymbolBody &Sym) {
-  switch (Rel->getType(Config->Mips64EL)) {
-  case R_MIPS_HI16:
-    return R_MIPS_LO16;
-  case R_MIPS_GOT16:
-    return Sym.isLocal() ? R_MIPS_LO16 : R_MIPS_NONE;
-  case R_MIPS_PCHI16:
-    return R_MIPS_PCLO16;
-  case R_MICROMIPS_HI16:
-    return R_MICROMIPS_LO16;
-  default:
-    return R_MIPS_NONE;
-  }
-}
-
-template <endianness E> static int16_t readSignedLo16(uint8_t *Loc) {
-  return read32<E>(Loc) & 0xffff;
+// Page(Expr) is the page address of the expression Expr, defined
+// as (Expr & ~0xFFF). (This applies even if the machine page size
+// supported by the platform has a different value.)
+static uint64_t getAArch64Page(uint64_t Expr) {
+  return Expr & (~static_cast<uint64_t>(0xFFF));
 }
 
 template <class ELFT>
-template <class RelTy>
-int32_t
-InputSectionBase<ELFT>::findMipsPairedAddend(uint8_t *Buf, uint8_t *BufLoc,
-                                             SymbolBody &Sym, const RelTy *Rel,
-                                             const RelTy *End) {
-  uint32_t SymIndex = Rel->getSymbol(Config->Mips64EL);
-  uint32_t Type = getMipsPairType(Rel, Sym);
-
-  // Some MIPS relocations use addend calculated from addend of the relocation
-  // itself and addend of paired relocation. ABI requires to compute such
-  // combined addend in case of REL relocation record format only.
-  // See p. 4-17 at ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
-  if (RelTy::IsRela || Type == R_MIPS_NONE)
-    return 0;
-
-  for (const RelTy *RI = Rel; RI != End; ++RI) {
-    if (RI->getType(Config->Mips64EL) != Type)
-      continue;
-    if (RI->getSymbol(Config->Mips64EL) != SymIndex)
-      continue;
-    uintX_t Offset = getOffset(RI->r_offset);
-    if (Offset == (uintX_t)-1)
-      break;
-    const endianness E = ELFT::TargetEndianness;
-    return ((read32<E>(BufLoc) & 0xffff) << 16) +
-           readSignedLo16<E>(Buf + Offset);
-  }
-  unsigned OldType = Rel->getType(Config->Mips64EL);
-  StringRef OldName = getELFRelocationTypeName(Config->EMachine, OldType);
-  StringRef NewName = getELFRelocationTypeName(Config->EMachine, Type);
-  warning("can't find matching " + NewName + " relocation for " + OldName);
-  return 0;
-}
-
-template <class ELFT, class uintX_t>
-static uintX_t adjustMipsSymVA(uint32_t Type, const elf::ObjectFile<ELFT> &File,
-                               const SymbolBody &Body, uintX_t AddrLoc,
-                               uintX_t SymVA) {
-  if (Type == R_MIPS_HI16 && &Body == ElfSym<ELFT>::MipsGpDisp)
-    return SymVA - AddrLoc;
-  if (Type == R_MIPS_LO16 && &Body == ElfSym<ELFT>::MipsGpDisp)
-    return SymVA - AddrLoc + 4;
-  if (Body.isLocal() && (Type == R_MIPS_GPREL16 || Type == R_MIPS_GPREL32))
+static typename ELFT::uint
+getSymVA(uint32_t Type, typename ELFT::uint A, typename ELFT::uint P,
+         const SymbolBody &Body, uint8_t *BufLoc,
+         const elf::ObjectFile<ELFT> &File, RelExpr Expr) {
+  switch (Expr) {
+  case R_TLSLD:
+    return Out<ELFT>::Got->getTlsIndexVA() + A;
+  case R_TLSLD_PC:
+    return Out<ELFT>::Got->getTlsIndexVA() + A - P;
+  case R_THUNK:
+    return Body.getThunkVA<ELFT>();
+  case R_PPC_TOC:
+    return getPPC64TocBase() + A;
+  case R_TLSGD:
+    return Out<ELFT>::Got->getGlobalDynAddr(Body) + A;
+  case R_TLSGD_PC:
+    return Out<ELFT>::Got->getGlobalDynAddr(Body) + A - P;
+  case R_PLT:
+    return Body.getPltVA<ELFT>() + A;
+  case R_PLT_PC:
+  case R_PPC_PLT_OPD:
+    return Body.getPltVA<ELFT>() + A - P;
+  case R_SIZE:
+    return Body.getSize<ELFT>() + A;
+  case R_GOT:
+  case R_RELAX_TLS_GD_TO_IE:
+    return Body.getGotVA<ELFT>() + A;
+  case R_GOT_PAGE_PC:
+    return getAArch64Page(Body.getGotVA<ELFT>() + A) - getAArch64Page(P);
+  case R_GOT_PC:
+  case R_RELAX_TLS_GD_TO_IE_PC:
+    return Body.getGotVA<ELFT>() + A - P;
+  case R_ABS:
+  case R_RELAX_TLS_GD_TO_LE:
+  case R_RELAX_TLS_IE_TO_LE:
+  case R_RELAX_TLS_LD_TO_LE:
+    return Body.getVA<ELFT>(A);
+  case R_MIPS_GP0:
     // We need to adjust SymVA value in case of R_MIPS_GPREL16/32
     // relocations because they use the following expression to calculate
     // the relocation's result for local symbol: S + A + GP0 - G.
-    return SymVA + File.getMipsGp0();
-  return SymVA;
-}
-
-template <class ELFT, class uintX_t>
-static uintX_t getMipsGotVA(const SymbolBody &Body, uintX_t SymVA,
-                            uint8_t *BufLoc) {
-  if (Body.isLocal())
+    return Body.getVA<ELFT>(A) + File.getMipsGp0();
+  case R_MIPS_GOT_LOCAL:
     // If relocation against MIPS local symbol requires GOT entry, this entry
     // should be initialized by 'page address'. This address is high 16-bits
     // of sum the symbol's value and the addend.
-    return Out<ELFT>::Got->getMipsLocalPageAddr(SymVA);
-  if (!Body.isPreemptible())
+    return Out<ELFT>::Got->getMipsLocalPageAddr(Body.getVA<ELFT>(A));
+  case R_MIPS_GOT:
     // For non-local symbols GOT entries should contain their full
     // addresses. But if such symbol cannot be preempted, we do not
     // have to put them into the "global" part of GOT and use dynamic
     // linker to determine their actual addresses. That is why we
     // create GOT entries for them in the "local" part of GOT.
-    return Out<ELFT>::Got->getMipsLocalFullAddr(Body);
-  return Body.getGotVA<ELFT>();
+    return Out<ELFT>::Got->getMipsLocalEntryAddr(Body.getVA<ELFT>(A));
+  case R_PPC_OPD: {
+    uint64_t SymVA = Body.getVA<ELFT>(A);
+    // If we have an undefined weak symbol, we might get here with a symbol
+    // address of zero. That could overflow, but the code must be unreachable,
+    // so don't bother doing anything at all.
+    if (!SymVA)
+      return 0;
+    if (Out<ELF64BE>::Opd) {
+      // If this is a local call, and we currently have the address of a
+      // function-descriptor, get the underlying code address instead.
+      uint64_t OpdStart = Out<ELF64BE>::Opd->getVA();
+      uint64_t OpdEnd = OpdStart + Out<ELF64BE>::Opd->getSize();
+      bool InOpd = OpdStart <= SymVA && SymVA < OpdEnd;
+      if (InOpd)
+        SymVA = read64be(&Out<ELF64BE>::OpdBuf[SymVA - OpdStart]);
+    }
+    return SymVA - P;
+  }
+  case R_PC:
+    return Body.getVA<ELFT>(A) - P;
+  case R_PAGE_PC:
+    return getAArch64Page(Body.getVA<ELFT>(A)) - getAArch64Page(P);
+  }
+  llvm_unreachable("Invalid expression");
 }
 
 template <class ELFT>
-template <class RelTy>
-void InputSectionBase<ELFT>::relocate(uint8_t *Buf, uint8_t *BufEnd,
-                                      ArrayRef<RelTy> Rels) {
-  size_t Num = Rels.end() - Rels.begin();
-  for (size_t I = 0; I < Num; ++I) {
-    const RelTy &RI = *(Rels.begin() + I);
-    uintX_t Offset = getOffset(RI.r_offset);
-    if (Offset == (uintX_t)-1)
-      continue;
-
-    uintX_t A = getAddend<ELFT>(RI);
-    uint32_t SymIndex = RI.getSymbol(Config->Mips64EL);
-    uint32_t Type = RI.getType(Config->Mips64EL);
+void InputSectionBase<ELFT>::relocate(uint8_t *Buf, uint8_t *BufEnd) {
+  const unsigned Bits = sizeof(uintX_t) * 8;
+  for (const Relocation &Rel : Relocations) {
+    uintX_t Offset = Rel.Offset;
     uint8_t *BufLoc = Buf + Offset;
+    uint32_t Type = Rel.Type;
+    uintX_t A = Rel.Addend;
+
     uintX_t AddrLoc = OutSec->getVA() + Offset;
+    RelExpr Expr = Rel.Expr;
+    uint64_t SymVA = SignExtend64<Bits>(
+        getSymVA<ELFT>(Type, A, AddrLoc, *Rel.Sym, BufLoc, *File, Expr));
 
-    if (Target->pointsToLocalDynamicGotEntry(Type) &&
-        !Target->canRelaxTls(Type, nullptr)) {
-      Target->relocateOne(BufLoc, BufEnd, Type, AddrLoc,
-                          Out<ELFT>::Got->getTlsIndexVA() + A);
+    if (Expr == R_RELAX_TLS_IE_TO_LE) {
+      Target->relaxTlsIeToLe(BufLoc, Type, SymVA);
       continue;
     }
-
-    SymbolBody &Body = File->getSymbolBody(SymIndex).repl();
-
-    if (Target->canRelaxTls(Type, &Body)) {
-      uintX_t SymVA;
-      if (Target->needsGot(Type, Body))
-        SymVA = Body.getGotVA<ELFT>();
-      else
-        SymVA = Body.getVA<ELFT>();
-      // By optimizing TLS relocations, it is sometimes needed to skip
-      // relocations that immediately follow TLS relocations. This function
-      // knows how many slots we need to skip.
-      I += Target->relaxTls(BufLoc, BufEnd, Type, AddrLoc, SymVA, Body);
+    if (Expr == R_RELAX_TLS_LD_TO_LE) {
+      Target->relaxTlsLdToLe(BufLoc, Type, SymVA);
       continue;
     }
-
-    // PPC64 has a special relocation representing the TOC base pointer
-    // that does not have a corresponding symbol.
-    if (Config->EMachine == EM_PPC64 && RI.getType(false) == R_PPC64_TOC) {
-      uintX_t SymVA = getPPC64TocBase() + A;
-      Target->relocateOne(BufLoc, BufEnd, Type, AddrLoc, SymVA);
+    if (Expr == R_RELAX_TLS_GD_TO_LE) {
+      Target->relaxTlsGdToLe(BufLoc, Type, SymVA);
       continue;
     }
-
-    if (Target->isTlsGlobalDynamicRel(Type) &&
-        !Target->canRelaxTls(Type, &Body)) {
-      Target->relocateOne(BufLoc, BufEnd, Type, AddrLoc,
-                          Out<ELFT>::Got->getGlobalDynAddr(Body) + A);
+    if (Expr == R_RELAX_TLS_GD_TO_IE_PC || Expr == R_RELAX_TLS_GD_TO_IE) {
+      Target->relaxTlsGdToIe(BufLoc, Type, SymVA);
       continue;
     }
 
-    if (!RelTy::IsRela)
-      A += Target->getImplicitAddend(BufLoc, Type);
-    if (Config->EMachine == EM_MIPS)
-      A += findMipsPairedAddend(Buf, BufLoc, Body, &RI, Rels.end());
-    uintX_t SymVA = Body.getVA<ELFT>(A);
-
-    if (Target->needsPlt(Type, Body)) {
-      SymVA = Body.getPltVA<ELFT>() + A;
-    } else if (Target->needsGot(Type, Body)) {
-      if (Config->EMachine == EM_MIPS)
-        SymVA = getMipsGotVA<ELFT>(Body, SymVA, BufLoc);
-      else
-        SymVA = Body.getGotVA<ELFT>() + A;
-      if (Body.isTls())
-        Type = Target->getTlsGotRel(Type);
-    } else if (Target->isSizeRel(Type) && Body.isPreemptible()) {
-      // A SIZE relocation is supposed to set a symbol size, but if a symbol
-      // can be preempted, the size at runtime may be different than link time.
-      // If that's the case, we leave the field alone rather than filling it
-      // with a possibly incorrect value.
-      continue;
-    } else if (Target->needsThunk(Type, *this->getFile(), Body)) {
-      // Get address of a thunk code related to the symbol.
-      SymVA = Body.getThunkVA<ELFT>();
-    } else if (!Target->needsCopyRel<ELFT>(Type, Body) &&
-               Body.isPreemptible()) {
-      continue;
-    } else if (Config->EMachine == EM_MIPS) {
-      SymVA = adjustMipsSymVA<ELFT>(Type, *File, Body, AddrLoc, SymVA);
+    if (Expr == R_PPC_PLT_OPD) {
+      uint32_t Nop = 0x60000000;
+      if (BufLoc + 8 <= BufEnd && read32be(BufLoc + 4) == Nop)
+        write32be(BufLoc + 4, 0xe8410028); // ld %r2, 40(%r1)
     }
-    if (Target->isSizeRel(Type))
-      SymVA = Body.getSize<ELFT>() + A;
 
-    Target->relocateOne(BufLoc, BufEnd, Type, AddrLoc, SymVA);
+    Target->relocateOne(BufLoc, Type, SymVA);
   }
 }
 
 template <class ELFT> void InputSection<ELFT>::writeTo(uint8_t *Buf) {
   if (this->Header->sh_type == SHT_NOBITS)
     return;
   ELFFile<ELFT> &EObj = this->File->getObj();
 
   // If -r is given, then an InputSection may be a relocation section.
   if (this->Header->sh_type == SHT_RELA) {
     copyRelocations(Buf + OutSecOff, EObj.relas(this->Header));
     return;
   }
   if (this->Header->sh_type == SHT_REL) {
     copyRelocations(Buf + OutSecOff, EObj.rels(this->Header));
     return;
   }
 
   // Copy section contents from source object file to output file.
   ArrayRef<uint8_t> Data = this->getSectionData();
   memcpy(Buf + OutSecOff, Data.data(), Data.size());
 
   // Iterate over all relocation sections that apply to this section.
   uint8_t *BufEnd = Buf + OutSecOff + Data.size();
-  for (const Elf_Shdr *RelSec : this->RelocSections) {
-    if (RelSec->sh_type == SHT_RELA)
-      this->relocate(Buf, BufEnd, EObj.relas(RelSec));
-    else
-      this->relocate(Buf, BufEnd, EObj.rels(RelSec));
-  }
+  this->relocate(Buf, BufEnd);
 
   // The section might have a data/code generated by the linker and need
   // to be written after the section. Usually these are thunks - small piece
   // of code used to jump between "incompatible" functions like PIC and non-PIC
   // or if the jump target too far and its address does not fit to the short
   // jump istruction.
   if (!Thunks.empty()) {
     Buf += OutSecOff + getThunkOff();
     for (const SymbolBody *S : Thunks) {
       Target->writeThunk(Buf, S->getVA<ELFT>());
       Buf += Target->ThunkSize;
     }
   }
 }
 
 template <class ELFT>
 void InputSection<ELFT>::replace(InputSection<ELFT> *Other) {
   this->Align = std::max(this->Align, Other->Align);
   Other->Repl = this->Repl;
   Other->Live = false;

ELF/OutputSections.h

 public:
   GotSection();
   void finalize() override;
   void writeTo(uint8_t *Buf) override;
   void addEntry(SymbolBody &Sym);
   bool addDynTlsEntry(SymbolBody &Sym);
   bool addTlsIndex();
   bool empty() const { return MipsLocalEntries == 0 && Entries.empty(); }
-  uintX_t getMipsLocalFullAddr(const SymbolBody &B);
+  uintX_t getMipsLocalEntryAddr(uintX_t EntryValue);
   uintX_t getMipsLocalPageAddr(uintX_t Addr);
   uintX_t getGlobalDynAddr(const SymbolBody &B) const;
   uintX_t getGlobalDynOffset(const SymbolBody &B) const;
   uintX_t getNumEntries() const { return Entries.size(); }
 
   // Returns the symbol which corresponds to the first entry of the global part
   // of GOT on MIPS platform. It is required to fill up MIPS-specific dynamic
   // table properties.

 private:
   std::vector<const SymbolBody *> Entries;
   uint32_t TlsIndexOff = -1;
   uint32_t MipsLocalEntries = 0;
   // Output sections referenced by MIPS GOT relocations.
   llvm::SmallPtrSet<const OutputSectionBase<ELFT> *, 10> MipsOutSections;
   llvm::DenseMap<uintX_t, size_t> MipsLocalGotPos;
 
-  uintX_t getMipsLocalEntryAddr(uintX_t EntryValue);
 };
 
 template <class ELFT>
 class GotPltSection final : public OutputSectionBase<ELFT> {
   typedef typename ELFT::uint uintX_t;
 
 public:
   GotPltSection();

ELF/OutputSections.cpp

template <class ELFT> bool GotSection<ELFT>::addTlsIndex() {
   TlsIndexOff = Entries.size() * sizeof(uintX_t);
   Entries.push_back(nullptr);
   Entries.push_back(nullptr);
   return true;
 }
 
 template <class ELFT>
 typename GotSection<ELFT>::uintX_t
-GotSection<ELFT>::getMipsLocalFullAddr(const SymbolBody &B) {
-  return getMipsLocalEntryAddr(B.getVA<ELFT>());
-}
-
-template <class ELFT>
-typename GotSection<ELFT>::uintX_t
 GotSection<ELFT>::getMipsLocalPageAddr(uintX_t EntryValue) {
   // Initialize the entry by the %hi(EntryValue) expression
   // but without right-shifting.
   return getMipsLocalEntryAddr((EntryValue + 0x8000) & ~0xffff);
 }
 
 template <class ELFT>
 typename GotSection<ELFT>::uintX_t
for (const EHRegion<ELFT> &F : C.Fdes) {
       size_t Offset = F.S->Offsets[F.Index].second;
       writeAlignedCieOrFde<ELFT>(F.data(), Buf + Offset);
       write32<E>(Buf + Offset + 4, Offset + 4 - CieOffset); // Pointer
 
       Out<ELFT>::EhFrameHdr->addFde(C.FdeEncoding, Offset, Buf + Offset + 8);
     }
   }
 
-  for (EHInputSection<ELFT> *S : Sections) {
-    const Elf_Shdr *RelSec = S->RelocSection;
-    if (!RelSec)
-      continue;
-    ELFFile<ELFT> &EObj = S->getFile()->getObj();
-    if (RelSec->sh_type == SHT_RELA)
-      S->relocate(Buf, nullptr, EObj.relas(RelSec));
-    else
-      S->relocate(Buf, nullptr, EObj.rels(RelSec));
-  }
+  for (EHInputSection<ELFT> *S : Sections)
+    S->relocate(Buf, nullptr);
 }
 
 template <class ELFT>
 MergeOutputSection<ELFT>::MergeOutputSection(StringRef Name, uint32_t Type,
                                              uintX_t Flags, uintX_t Alignment)
     : OutputSectionBase<ELFT>(Name, Type, Flags),
       Builder(llvm::StringTableBuilder::RAW, Alignment) {}
 

ELF/Target.h

 //===- Target.h -------------------------------------------------*- C++ -*-===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLD_ELF_TARGET_H
 #define LLD_ELF_TARGET_H
 
+#include "InputSection.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/Object/ELF.h"
 
 #include <memory>
 
 namespace lld {
 namespace elf {
 class InputFile;
public:
   enum PltNeed { Plt_No, Plt_Explicit, Plt_Implicit };
   PltNeed needsPlt(uint32_t Type, const SymbolBody &S) const;
 
   virtual bool needsThunk(uint32_t Type, const InputFile &File,
                           const SymbolBody &S) const;
 
   virtual void writeThunk(uint8_t *Buf, uint64_t S) const {}
 
-  virtual void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                           uint64_t P, uint64_t SA) const = 0;
+  virtual RelExpr getRelExpr(uint32_t Type, const SymbolBody &S) const = 0;
+  virtual void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const = 0;
   virtual bool isGotRelative(uint32_t Type) const;
   bool canRelaxTls(uint32_t Type, const SymbolBody *S) const;
   template <class ELFT>
   bool needsCopyRel(uint32_t Type, const SymbolBody &S) const;
-  size_t relaxTls(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
-                  uint64_t SA, const SymbolBody &S) const;
   virtual ~TargetInfo();
 
+  unsigned TlsGdToLeSkip = 1;
   unsigned PageSize = 4096;
 
   // On freebsd x86_64 the first page cannot be mmaped.
   // On linux that is controled by vm.mmap_min_addr. At least on some x86_64
   // installs that is 65536, so the first 15 pages cannot be used.
   // Given that, the smallest value that can be used in here is 0x10000.
   // If using 2MB pages, the smallest page aligned address that works is
   // 0x200000, but it looks like every OS uses 4k pages for executables.
public:
   uint32_t TlsOffsetRel;
   unsigned PltEntrySize = 8;
   unsigned PltZeroSize = 0;
   unsigned GotHeaderEntriesNum = 0;
   unsigned GotPltHeaderEntriesNum = 3;
   uint32_t ThunkSize = 0;
   bool UseLazyBinding = false;
 
+  virtual void relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const;
+  virtual void relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const;
+  virtual void relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const;
+  virtual void relaxTlsLdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const;
+
 private:
   virtual bool needsCopyRelImpl(uint32_t Type) const;
   virtual bool needsPltImpl(uint32_t Type) const;
-
-  virtual size_t relaxTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                                uint64_t P, uint64_t SA) const;
-  virtual size_t relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                                uint64_t P, uint64_t SA) const;
-  virtual size_t relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                                uint64_t P, uint64_t SA) const;
-  virtual size_t relaxTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                                uint64_t P, uint64_t SA) const;
 };
 
 uint64_t getPPC64TocBase();
 
 const unsigned MipsGPOffset = 0x7ff0;
 template <class ELFT> typename ELFT::uint getMipsGpAddr();
 
 extern TargetInfo *Target;
 TargetInfo *createTarget();
 }
 }
 
 #endif

ELF/Target.cpp

 //===- Target.cpp ---------------------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // Machine-specific things, such as applying relocations, creation of
 // GOT or PLT entries, etc., are handled in this file.
 //
 // Refer the ELF spec for the single letter varaibles, S, A or P, used
-// in this file. SA is S+A.
+// in this file.
 //
 //===----------------------------------------------------------------------===//
 
 #include "Target.h"
 #include "Error.h"
 #include "InputFiles.h"
 #include "OutputSections.h"
 #include "Symbols.h"
template <unsigned N> static void checkAlignment(uint64_t V, uint32_t Type) {
   StringRef S = getELFRelocationTypeName(Config->EMachine, Type);
   error("improper alignment for relocation " + S);
 }
 
 namespace {
 class X86TargetInfo final : public TargetInfo {
 public:
   X86TargetInfo();
+  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S) const override;
   uint64_t getImplicitAddend(const uint8_t *Buf, uint32_t Type) const override;
   void writeGotPltHeader(uint8_t *Buf) const override;
   uint32_t getDynRel(uint32_t Type) const override;
   uint32_t getTlsGotRel(uint32_t Type) const override;
   bool pointsToLocalDynamicGotEntry(uint32_t Type) const override;
   bool isTlsLocalDynamicRel(uint32_t Type) const override;
   bool isTlsGlobalDynamicRel(uint32_t Type) const override;
   bool isTlsInitialExecRel(uint32_t Type) const override;
   void writeGotPlt(uint8_t *Buf, uint64_t Plt) const override;
   void writePltZero(uint8_t *Buf) const override;
   void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
                 int32_t Index, unsigned RelOff) const override;
   bool isRelRelative(uint32_t Type) const override;
   bool needsCopyRelImpl(uint32_t Type) const override;
   bool needsDynRelative(uint32_t Type) const override;
   bool needsGot(uint32_t Type, const SymbolBody &S) const override;
   bool needsPltImpl(uint32_t Type) const override;
-  void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
-                   uint64_t SA) const override;
+  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
 
-  size_t relaxTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                        uint64_t P, uint64_t SA) const override;
-  size_t relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                        uint64_t P, uint64_t SA) const override;
-  size_t relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                        uint64_t P, uint64_t SA) const override;
-  size_t relaxTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                        uint64_t P, uint64_t SA) const override;
+  void relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+  void relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+  void relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+  void relaxTlsLdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
 
   bool isGotRelative(uint32_t Type) const override;
   bool refersToGotEntry(uint32_t Type) const override;
 };
 
 class X86_64TargetInfo final : public TargetInfo {
 public:
   X86_64TargetInfo();
+  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S) const override;
   uint32_t getDynRel(uint32_t Type) const override;
   uint32_t getTlsGotRel(uint32_t Type) const override;
   bool pointsToLocalDynamicGotEntry(uint32_t Type) const override;
   bool isTlsLocalDynamicRel(uint32_t Type) const override;
   bool isTlsGlobalDynamicRel(uint32_t Type) const override;
   bool isTlsInitialExecRel(uint32_t Type) const override;
   void writeGotPltHeader(uint8_t *Buf) const override;
   void writeGotPlt(uint8_t *Buf, uint64_t Plt) const override;
   void writePltZero(uint8_t *Buf) const override;
   void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
                 int32_t Index, unsigned RelOff) const override;
   bool needsCopyRelImpl(uint32_t Type) const override;
   bool needsGot(uint32_t Type, const SymbolBody &S) const override;
   bool refersToGotEntry(uint32_t Type) const override;
   bool needsPltImpl(uint32_t Type) const override;
-  void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
-                   uint64_t SA) const override;
+  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
   bool isRelRelative(uint32_t Type) const override;
   bool isSizeRel(uint32_t Type) const override;
 
-  size_t relaxTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                        uint64_t P, uint64_t SA) const override;
-  size_t relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                        uint64_t P, uint64_t SA) const override;
-  size_t relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                        uint64_t P, uint64_t SA) const override;
-  size_t relaxTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                        uint64_t P, uint64_t SA) const override;
+  void relaxTlsGdToIe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+  void relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+  void relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+  void relaxTlsLdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
 };
 
 class PPCTargetInfo final : public TargetInfo {
 public:
   PPCTargetInfo();
-  void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
-                   uint64_t SA) const override;
+  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
   bool isRelRelative(uint32_t Type) const override;
+  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S) const override;
 };
 
 class PPC64TargetInfo final : public TargetInfo {
 public:
   PPC64TargetInfo();
+  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S) const override;
   void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
                 int32_t Index, unsigned RelOff) const override;
   bool needsGot(uint32_t Type, const SymbolBody &S) const override;
   bool needsPltImpl(uint32_t Type) const override;
-  void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
-                   uint64_t SA) const override;
+  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
   bool isRelRelative(uint32_t Type) const override;
 };
 
 class AArch64TargetInfo final : public TargetInfo {
 public:
   AArch64TargetInfo();
+  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S) const override;
   uint32_t getDynRel(uint32_t Type) const override;
   bool isTlsGlobalDynamicRel(uint32_t Type) const override;
   bool isTlsInitialExecRel(uint32_t Type) const override;
   void writeGotPlt(uint8_t *Buf, uint64_t Plt) const override;
   void writePltZero(uint8_t *Buf) const override;
   void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
                 int32_t Index, unsigned RelOff) const override;
   uint32_t getTlsGotRel(uint32_t Type) const override;
   bool isRelRelative(uint32_t Type) const override;
   bool needsCopyRelImpl(uint32_t Type) const override;
   bool needsGot(uint32_t Type, const SymbolBody &S) const override;
   bool refersToGotEntry(uint32_t Type) const override;
   bool needsPltImpl(uint32_t Type) const override;
-  void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
-                   uint64_t SA) const override;
-  size_t relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                        uint64_t P, uint64_t SA) const override;
-  size_t relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                        uint64_t P, uint64_t SA) const override;
+  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+  void relaxTlsGdToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+  void relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
 
 private:
   static const uint64_t TcbSize = 16;
 };
 
 class AMDGPUTargetInfo final : public TargetInfo {
 public:
   AMDGPUTargetInfo() {}
-  void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
-                   uint64_t SA) const override;
+  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S) const override;
 };
 
 template <class ELFT> class MipsTargetInfo final : public TargetInfo {
 public:
   MipsTargetInfo();
+  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S) const override;
   uint64_t getImplicitAddend(const uint8_t *Buf, uint32_t Type) const override;
   uint32_t getDynRel(uint32_t Type) const override;
   void writeGotPlt(uint8_t *Buf, uint64_t Plt) const override;
   void writePltZero(uint8_t *Buf) const override;
   void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
                 int32_t Index, unsigned RelOff) const override;
   void writeGotHeader(uint8_t *Buf) const override;
   void writeThunk(uint8_t *Buf, uint64_t S) const override;
   bool needsCopyRelImpl(uint32_t Type) const override;
   bool needsGot(uint32_t Type, const SymbolBody &S) const override;
   bool needsPltImpl(uint32_t Type) const override;
   bool needsThunk(uint32_t Type, const InputFile &File,
                   const SymbolBody &S) const override;
-  void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
-                   uint64_t SA) const override;
+  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
   bool isHintRel(uint32_t Type) const override;
   bool isRelRelative(uint32_t Type) const override;
   bool refersToGotEntry(uint32_t Type) const override;
 };
 } // anonymous namespace
 
 TargetInfo *createTarget() {
   switch (Config->EMachine) {
TargetInfo *createTarget() {
   case EM_X86_64:
     return new X86_64TargetInfo();
   }
   fatal("unknown target machine");
 }
 
 TargetInfo::~TargetInfo() {}
 
 uint64_t TargetInfo::getImplicitAddend(const uint8_t *Buf,
                                        uint32_t Type) const {
   return 0;
 }
 
 bool TargetInfo::canRelaxTls(uint32_t Type, const SymbolBody *S) const {
   if (Config->Shared || (S && !S->isTls()))
     return false;
 

 }
 
 bool TargetInfo::isTlsLocalDynamicRel(uint32_t Type) const { return false; }
 
 bool TargetInfo::isTlsGlobalDynamicRel(uint32_t Type) const {
   return false;
 }
 
-size_t TargetInfo::relaxTls(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                            uint64_t P, uint64_t SA,
-                            const SymbolBody &S) const {
-  if (isTlsGlobalDynamicRel(Type)) {
-    if (S.isPreemptible())
-      return relaxTlsGdToIe(Loc, BufEnd, Type, P, SA);
-    return relaxTlsGdToLe(Loc, BufEnd, Type, P, SA);
-  }
-  if (isTlsLocalDynamicRel(Type))
-    return relaxTlsLdToLe(Loc, BufEnd, Type, P, SA);
-  assert(isTlsInitialExecRel(Type));
-  return relaxTlsIeToLe(Loc, BufEnd, Type, P, SA);
-}
-
-size_t TargetInfo::relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                                  uint64_t P, uint64_t SA) const {
+void TargetInfo::relaxTlsGdToLe(uint8_t *Loc, uint32_t Type,
+                                uint64_t Val) const {
   llvm_unreachable("Should not have claimed to be relaxable");
 }
 
-size_t TargetInfo::relaxTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                                  uint64_t P, uint64_t SA) const {
+void TargetInfo::relaxTlsGdToIe(uint8_t *Loc, uint32_t Type,
+                                uint64_t Val) const {
   llvm_unreachable("Should not have claimed to be relaxable");
 }
 
-size_t TargetInfo::relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                                  uint64_t P, uint64_t SA) const {
+void TargetInfo::relaxTlsIeToLe(uint8_t *Loc, uint32_t Type,
+                                uint64_t Val) const {
   llvm_unreachable("Should not have claimed to be relaxable");
 }
 
-size_t TargetInfo::relaxTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                                  uint64_t P, uint64_t SA) const {
+void TargetInfo::relaxTlsLdToLe(uint8_t *Loc, uint32_t Type,
+                                uint64_t Val) const {
   llvm_unreachable("Should not have claimed to be relaxable");
 }
 
 X86TargetInfo::X86TargetInfo() {
   CopyRel = R_386_COPY;
   GotRel = R_386_GLOB_DAT;
   PltRel = R_386_JUMP_SLOT;
   IRelativeRel = R_386_IRELATIVE;
   RelativeRel = R_386_RELATIVE;
   TlsGotRel = R_386_TLS_TPOFF;
   TlsModuleIndexRel = R_386_TLS_DTPMOD32;
   TlsOffsetRel = R_386_TLS_DTPOFF32;
   UseLazyBinding = true;
   PltEntrySize = 16;
   PltZeroSize = 16;
+  TlsGdToLeSkip = 2;
+}
+
+RelExpr X86TargetInfo::getRelExpr(uint32_t Type, const SymbolBody &S) const {
+  switch (Type) {
+  default:
+    return R_ABS;
+  case R_386_PLT32:
+  case R_386_PC32:
+  case R_386_GOTPC:
+    return R_PC;
+  }
 }
 
 bool X86TargetInfo::isRelRelative(uint32_t Type) const {
   switch (Type) {
   default:
     return false;
   case R_386_PC32:
   case R_386_PLT32:
uint64_t X86TargetInfo::getImplicitAddend(const uint8_t *Buf,
   case R_386_GOTOFF:
   case R_386_GOTPC:
   case R_386_PC32:
   case R_386_PLT32:
     return read32le(Buf);
   }
 }
 
-void X86TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                                uint64_t P, uint64_t SA) const {
+void X86TargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
+                                uint64_t Val) const {
   switch (Type) {
   case R_386_32:
-    write32le(Loc, SA);
+    write32le(Loc, Val);
     break;
   case R_386_GOT32: {
-    uint64_t V = SA - Out<ELF32LE>::Got->getVA() -
+    uint64_t V = Val - Out<ELF32LE>::Got->getVA() -
                  Out<ELF32LE>::Got->getNumEntries() * 4;
     checkInt<32>(V, Type);
     write32le(Loc, V);
     break;
   }
   case R_386_GOTOFF:
-    write32le(Loc, SA - Out<ELF32LE>::Got->getVA());
+    write32le(Loc, Val - Out<ELF32LE>::Got->getVA());
     break;
   case R_386_GOTPC:
-    write32le(Loc, SA + Out<ELF32LE>::Got->getVA() - P);
+    write32le(Loc, Val + Out<ELF32LE>::Got->getVA());
     break;
   case R_386_PC32:
   case R_386_PLT32:
-    write32le(Loc, SA - P);
+    write32le(Loc, Val);
     break;
   case R_386_TLS_GD:
   case R_386_TLS_LDM:
   case R_386_TLS_TPOFF: {
-    uint64_t V = SA - Out<ELF32LE>::Got->getVA() -
+    uint64_t V = Val - Out<ELF32LE>::Got->getVA() -
                  Out<ELF32LE>::Got->getNumEntries() * 4;
     checkInt<32>(V, Type);
     write32le(Loc, V);
     break;
   }
   case R_386_TLS_IE:
   case R_386_TLS_LDO_32:
-    write32le(Loc, SA);
+    write32le(Loc, Val);
     break;
   case R_386_TLS_LE:
-    write32le(Loc, SA - Out<ELF32LE>::TlsPhdr->p_memsz);
+    write32le(Loc, Val - Out<ELF32LE>::TlsPhdr->p_memsz);
     break;
   case R_386_TLS_LE_32:
-    write32le(Loc, Out<ELF32LE>::TlsPhdr->p_memsz - SA);
+    write32le(Loc, Out<ELF32LE>::TlsPhdr->p_memsz - Val);
     break;
   default:
     fatal("unrecognized reloc " + Twine(Type));
   }
 }
 
 bool X86TargetInfo::needsDynRelative(uint32_t Type) const {
   return Config->Shared && Type == R_386_TLS_IE;
 }
 
-size_t X86TargetInfo::relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd,
-                                     uint32_t Type, uint64_t P,
-                                     uint64_t SA) const {
+void X86TargetInfo::relaxTlsGdToLe(uint8_t *Loc, uint32_t Type,
+                                   uint64_t Val) const {
   // GD can be optimized to LE:
   //   leal x@tlsgd(, %ebx, 1),
   //   call __tls_get_addr@plt
   // Can be converted to:
   //   movl %gs:0,%eax
   //   addl $x@ntpoff,%eax
   // But gold emits subl $foo@tpoff,%eax instead of addl.
   // These instructions are completely equal in behavior.
   // This method generates subl to be consistent with gold.
   const uint8_t Inst[] = {
       0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0, %eax
       0x81, 0xe8, 0x00, 0x00, 0x00, 0x00  // subl 0(%ebx), %eax
   };
   memcpy(Loc - 3, Inst, sizeof(Inst));
-  relocateOne(Loc + 5, BufEnd, R_386_32, P,
-              Out<ELF32LE>::TlsPhdr->p_memsz - SA);
-
-  // The next relocation should be against __tls_get_addr, so skip it
-  return 1;
+  relocateOne(Loc + 5, R_386_32, Out<ELF32LE>::TlsPhdr->p_memsz - Val);
 }
 
 // "Ulrich Drepper, ELF Handling For Thread-Local Storage" (5.1
 // IA-32 Linker Optimizations, http://www.akkadia.org/drepper/tls.pdf) shows
 // how GD can be optimized to IE:
 //   leal x@tlsgd(, %ebx, 1),
 //   call __tls_get_addr@plt
 // Is converted to:
 //   movl %gs:0, %eax
 //   addl x@gotntpoff(%ebx), %eax
-size_t X86TargetInfo::relaxTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd,
-                                     uint32_t Type, uint64_t P,
-                                     uint64_t SA) const {
+void X86TargetInfo::relaxTlsGdToIe(uint8_t *Loc, uint32_t Type,
+                                   uint64_t Val) const {
   const uint8_t Inst[] = {
       0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0, %eax
       0x03, 0x83, 0x00, 0x00, 0x00, 0x00  // addl 0(%ebx), %eax
   };
   memcpy(Loc - 3, Inst, sizeof(Inst));
-  relocateOne(Loc + 5, BufEnd, R_386_32, P,
-              SA - Out<ELF32LE>::Got->getVA() -
+  relocateOne(Loc + 5, R_386_32, Val - Out<ELF32LE>::Got->getVA() -
                                      Out<ELF32LE>::Got->getNumEntries() * 4);
-
-  // The next relocation should be against __tls_get_addr, so skip it
-  return 1;
 }
 
 // In some conditions, relocations can be optimized to avoid using GOT.
 // This function does that for Initial Exec to Local Exec case.
 // Read "ELF Handling For Thread-Local Storage, 5.1
 // IA-32 Linker Optimizations" (http://www.akkadia.org/drepper/tls.pdf)
 // by Ulrich Drepper for details.
-
-size_t X86TargetInfo::relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd,
-                                     uint32_t Type, uint64_t P,
-                                     uint64_t SA) const {
+void X86TargetInfo::relaxTlsIeToLe(uint8_t *Loc, uint32_t Type,
+                                   uint64_t Val) const {
   // Ulrich's document section 6.2 says that @gotntpoff can
   // be used with MOVL or ADDL instructions.
   // @indntpoff is similar to @gotntpoff, but for use in
   // position dependent code.
   uint8_t *Inst = Loc - 2;
   uint8_t *Op = Loc - 1;
   uint8_t Reg = (Loc[-1] >> 3) & 7;
   bool IsMov = *Inst == 0x8b;
if (Type == R_386_TLS_IE) {
     // "ADDL foo@GOTNTPOFF(%RIP), %REG" is transformed to "LEAL foo(%REG), %REG"
     // Note: gold converts to ADDL instead of LEAL.
     *Inst = IsMov ? 0xc7 : 0x8d;
     if (IsMov)
       *Op = 0xc0 | ((*Op >> 3) & 7);
     else
       *Op = 0x80 | Reg | (Reg << 3);
   }
-  relocateOne(Loc, BufEnd, R_386_TLS_LE, P, SA);
-
-  return 0;
+  relocateOne(Loc, R_386_TLS_LE, Val);
 }
 
-size_t X86TargetInfo::relaxTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd,
-                                     uint32_t Type, uint64_t P,
-                                     uint64_t SA) const {
+void X86TargetInfo::relaxTlsLdToLe(uint8_t *Loc, uint32_t Type,
+                                   uint64_t Val) const {
   if (Type == R_386_TLS_LDO_32) {
-    relocateOne(Loc, BufEnd, R_386_TLS_LE, P, SA);
-    return 0;
+    relocateOne(Loc, R_386_TLS_LE, Val);
+    return;
   }
 
   // LD can be optimized to LE:
   //   leal foo(%reg),%eax
   //   call ___tls_get_addr
   // Is converted to:
   //   movl %gs:0,%eax
   //   nop
   //   leal 0(%esi,1),%esi
   const uint8_t Inst[] = {
       0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0,%eax
       0x90,                               // nop
       0x8d, 0x74, 0x26, 0x00              // leal 0(%esi,1),%esi
   };
   memcpy(Loc - 2, Inst, sizeof(Inst));
-
-  // The next relocation should be against __tls_get_addr, so skip it
-  return 1;
 }
 
 X86_64TargetInfo::X86_64TargetInfo() {
   CopyRel = R_X86_64_COPY;
   GotRel = R_X86_64_GLOB_DAT;
   PltRel = R_X86_64_JUMP_SLOT;
   RelativeRel = R_X86_64_RELATIVE;
   IRelativeRel = R_X86_64_IRELATIVE;
   TlsGotRel = R_X86_64_TPOFF64;
   TlsModuleIndexRel = R_X86_64_DTPMOD64;
   TlsOffsetRel = R_X86_64_DTPOFF64;
   UseLazyBinding = true;
   PltEntrySize = 16;
   PltZeroSize = 16;
+  TlsGdToLeSkip = 2;
+}
+
+RelExpr X86_64TargetInfo::getRelExpr(uint32_t Type, const SymbolBody &S) const {
+  switch (Type) {
+  default:
+    return R_ABS;
+  case R_X86_64_GOTPCREL:
+  case R_X86_64_PLT32:
+  case R_X86_64_PC32:
+  case R_X86_64_TLSLD:
+  case R_X86_64_GOTTPOFF:
+  case R_X86_64_TLSGD:
+    return R_PC;
+  }
 }
 
 void X86_64TargetInfo::writeGotPltHeader(uint8_t *Buf) const {
   write64le(Buf, Out<ELF64LE>::Dynamic->getVA());
 }
 
 void X86_64TargetInfo::writeGotPlt(uint8_t *Buf, uint64_t Plt) const {
   // See comments in X86TargetInfo::writeGotPlt.

 //  .byte 0x66
 //  leaq x@tlsgd(%rip), %rdi
 //  .word 0x6666
 //  rex64
 //  call __tls_get_addr@plt
 // Is converted to:
 //  mov %fs:0x0,%rax
 //  lea x@tpoff,%rax
-size_t X86_64TargetInfo::relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd,
-                                        uint32_t Type, uint64_t P,
-                                        uint64_t SA) const {
+void X86_64TargetInfo::relaxTlsGdToLe(uint8_t *Loc, uint32_t Type,
+                                      uint64_t Val) const {
   const uint8_t Inst[] = {
       0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00, // mov %fs:0x0,%rax
       0x48, 0x8d, 0x80, 0x00, 0x00, 0x00, 0x00              // lea x@tpoff,%rax
   };
   memcpy(Loc - 4, Inst, sizeof(Inst));
-  relocateOne(Loc + 8, BufEnd, R_X86_64_TPOFF32, P, SA);
-
-  // The next relocation should be against __tls_get_addr, so skip it
-  return 1;
+  relocateOne(Loc + 8, R_X86_64_TPOFF32, Val + 4);
 }
 
 // "Ulrich Drepper, ELF Handling For Thread-Local Storage" (5.5
 // x86-x64 linker optimizations, http://www.akkadia.org/drepper/tls.pdf) shows
 // how GD can be optimized to IE:
 //  .byte 0x66
 //  leaq x@tlsgd(%rip), %rdi
 //  .word 0x6666
 //  rex64
 //  call __tls_get_addr@plt
 // Is converted to:
 //  mov %fs:0x0,%rax
 //  addq x@tpoff,%rax
-size_t X86_64TargetInfo::relaxTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd,
-                                        uint32_t Type, uint64_t P,
-                                        uint64_t SA) const {
+void X86_64TargetInfo::relaxTlsGdToIe(uint8_t *Loc, uint32_t Type,
+                                      uint64_t Val) const {
   const uint8_t Inst[] = {
       0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00, // mov %fs:0x0,%rax
       0x48, 0x03, 0x05, 0x00, 0x00, 0x00, 0x00              // addq x@tpoff,%rax
   };
   memcpy(Loc - 4, Inst, sizeof(Inst));
-  relocateOne(Loc + 8, BufEnd, R_X86_64_PC32, P + 12, SA);
-
-  // The next relocation should be against __tls_get_addr, so skip it
-  return 1;
+  relocateOne(Loc + 8, R_X86_64_PC32, Val - 8);
 }
 
 // In some conditions, R_X86_64_GOTTPOFF relocation can be optimized to
 // R_X86_64_TPOFF32 so that it does not use GOT.
 // This function does that. Read "ELF Handling For Thread-Local Storage,
 // 5.5 x86-x64 linker optimizations" (http://www.akkadia.org/drepper/tls.pdf)
 // by Ulrich Drepper for details.
-size_t X86_64TargetInfo::relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd,
-                                        uint32_t Type, uint64_t P,
-                                        uint64_t SA) const {
+void X86_64TargetInfo::relaxTlsIeToLe(uint8_t *Loc, uint32_t Type,
+                                      uint64_t Val) const {
   // Ulrich's document section 6.5 says that @gottpoff(%rip) must be
   // used in MOVQ or ADDQ instructions only.
   // "MOVQ foo@GOTTPOFF(%RIP), %REG" is transformed to "MOVQ $foo, %REG".
   // "ADDQ foo@GOTTPOFF(%RIP), %REG" is transformed to "LEAQ foo(%REG), %REG"
   // (if the register is not RSP/R12) or "ADDQ $foo, %RSP".
   // Opcodes info can be found at http://ref.x86asm.net/coder64.html#x48.
   uint8_t *Prefix = Loc - 3;
   uint8_t *Inst = Loc - 2;
void X86_64TargetInfo::relaxTlsIeToLe(uint8_t *Loc, uint32_t Type,
   // we dont have.
   if (RspAdd)
     *Inst = 0x81;
   else
     *Inst = IsMov ? 0xc7 : 0x8d;
   if (*Prefix == 0x4c)
     *Prefix = (IsMov || RspAdd) ? 0x49 : 0x4d;
   *RegSlot = (IsMov || RspAdd) ? (0xc0 | Reg) : (0x80 | Reg | (Reg << 3));
-  relocateOne(Loc, BufEnd, R_X86_64_TPOFF32, P, SA);
-  return 0;
+  relocateOne(Loc, R_X86_64_TPOFF32, Val + 4);
 }
 
 // "Ulrich Drepper, ELF Handling For Thread-Local Storage" (5.5
 // x86-x64 linker optimizations, http://www.akkadia.org/drepper/tls.pdf) shows
 // how LD can be optimized to LE:
 //   leaq bar@tlsld(%rip), %rdi
 //   callq __tls_get_addr@PLT
 //   leaq bar@dtpoff(%rax), %rcx
 // Is converted to:
 //  .word 0x6666
 //  .byte 0x66
 //  mov %fs:0,%rax
 //  leaq bar@tpoff(%rax), %rcx
-size_t X86_64TargetInfo::relaxTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd,
-                                        uint32_t Type, uint64_t P,
-                                        uint64_t SA) const {
+void X86_64TargetInfo::relaxTlsLdToLe(uint8_t *Loc, uint32_t Type,
+                                      uint64_t Val) const {
   if (Type == R_X86_64_DTPOFF64) {
-    write64le(Loc, SA - Out<ELF64LE>::TlsPhdr->p_memsz);
-    return 0;
+    write64le(Loc, Val - Out<ELF64LE>::TlsPhdr->p_memsz);
+    return;
   }
   if (Type == R_X86_64_DTPOFF32) {
-    relocateOne(Loc, BufEnd, R_X86_64_TPOFF32, P, SA);
-    return 0;
+    relocateOne(Loc, R_X86_64_TPOFF32, Val);
+    return;
   }
 
   const uint8_t Inst[] = {
       0x66, 0x66,                                          //.word 0x6666
       0x66,                                                //.byte 0x66
       0x64, 0x48, 0x8b, 0x04, 0x25, 0x00, 0x00, 0x00, 0x00 // mov %fs:0,%rax
   };
   memcpy(Loc - 3, Inst, sizeof(Inst));
-  // The next relocation should be against __tls_get_addr, so skip it
-  return 1;
 }
 
-void X86_64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                                   uint64_t P, uint64_t SA) const {
+void X86_64TargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
+                                   uint64_t Val) const {
   switch (Type) {
   case R_X86_64_32:
-    checkUInt<32>(SA, Type);
-    write32le(Loc, SA);
+    checkUInt<32>(Val, Type);
+    write32le(Loc, Val);
     break;
   case R_X86_64_32S:
-    checkInt<32>(SA, Type);
-    write32le(Loc, SA);
+    checkInt<32>(Val, Type);
+    write32le(Loc, Val);
     break;
   case R_X86_64_64:
   case R_X86_64_DTPOFF64:
-    write64le(Loc, SA);
+    write64le(Loc, Val);
     break;
   case R_X86_64_DTPOFF32:
-    write32le(Loc, SA);
+    write32le(Loc, Val);
     break;
   case R_X86_64_GOTPCREL:
   case R_X86_64_GOTPCRELX:
   case R_X86_64_REX_GOTPCRELX:
   case R_X86_64_PC32:
   case R_X86_64_PLT32:
   case R_X86_64_TLSGD:
   case R_X86_64_TLSLD:
-    write32le(Loc, SA - P);
+    write32le(Loc, Val);
     break;
   case R_X86_64_SIZE32:
-    write32le(Loc, SA);
+    write32le(Loc, Val);
     break;
   case R_X86_64_SIZE64:
-    write64le(Loc, SA);
+    write64le(Loc, Val);
     break;
   case R_X86_64_TPOFF32: {
-    uint64_t Val = SA - Out<ELF64LE>::TlsPhdr->p_memsz;
+    Val -= Out<ELF64LE>::TlsPhdr->p_memsz;
     checkInt<32>(Val, Type);
     write32le(Loc, Val);
     break;
   }
   default:
     fatal("unrecognized reloc " + Twine(Type));
   }
 }
 
 // Relocation masks following the #lo(value), #hi(value), #ha(value),
 // #higher(value), #highera(value), #highest(value), and #highesta(value)
 // macros defined in section 4.5.1. Relocation Types of the PPC-elf64abi
 // document.
 static uint16_t applyPPCLo(uint64_t V) { return V; }
 static uint16_t applyPPCHi(uint64_t V) { return V >> 16; }
 static uint16_t applyPPCHa(uint64_t V) { return (V + 0x8000) >> 16; }
 static uint16_t applyPPCHigher(uint64_t V) { return V >> 32; }
 static uint16_t applyPPCHighera(uint64_t V) { return (V + 0x8000) >> 32; }
 static uint16_t applyPPCHighest(uint64_t V) { return V >> 48; }
 static uint16_t applyPPCHighesta(uint64_t V) { return (V + 0x8000) >> 48; }
 
 PPCTargetInfo::PPCTargetInfo() {}
 bool PPCTargetInfo::isRelRelative(uint32_t Type) const { return false; }
 
-void PPCTargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                                uint64_t P, uint64_t SA) const {
+void PPCTargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
+                                uint64_t Val) const {
   switch (Type) {
   case R_PPC_ADDR16_HA:
-    write16be(Loc, applyPPCHa(SA));
+    write16be(Loc, applyPPCHa(Val));
     break;
   case R_PPC_ADDR16_LO:
-    write16be(Loc, applyPPCLo(SA));
+    write16be(Loc, applyPPCLo(Val));
     break;
   default:
     fatal("unrecognized reloc " + Twine(Type));
   }
 }
 
+RelExpr PPCTargetInfo::getRelExpr(uint32_t Type, const SymbolBody &S) const {
+  return R_ABS;
+}
+
 PPC64TargetInfo::PPC64TargetInfo() {
   GotRel = R_PPC64_GLOB_DAT;
   RelativeRel = R_PPC64_RELATIVE;
   PltEntrySize = 32;
 
   // We need 64K pages (at least under glibc/Linux, the loader won't
   // set different permissions on a finer granularity than that).
   PageSize = 65536;
uint64_t getPPC64TocBase() {
 
   // Per the ppc64-elf-linux ABI, The TOC base is TOC value plus 0x8000
   // thus permitting a full 64 Kbytes segment. Note that the glibc startup
   // code (crt1.o) assumes that you can get from the TOC base to the
   // start of the .toc section with only a single (signed) 16-bit relocation.
   return TocVA + 0x8000;
 }
 
+RelExpr PPC64TargetInfo::getRelExpr(uint32_t Type, const SymbolBody &S) const {
+  switch (Type) {
+  default:
+    return R_ABS;
+  case R_PPC64_REL24:
+    return R_PPC_OPD;
+  }
+}
+
 void PPC64TargetInfo::writePlt(uint8_t *Buf, uint64_t GotEntryAddr,
                                uint64_t PltEntryAddr, int32_t Index,
                                unsigned RelOff) const {
   uint64_t Off = GotEntryAddr - getPPC64TocBase();
 
   // FIXME: What we should do, in theory, is get the offset of the function
   // descriptor in the .opd section, and use that as the offset from %r2 (the
   // TOC-base pointer). Instead, we have the GOT-entry offset, and that will
bool PPC64TargetInfo::isRelRelative(uint32_t Type) const {
   default:
     return true;
   case R_PPC64_ADDR64:
   case R_PPC64_TOC:
     return false;
   }
 }
 
-void PPC64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                                  uint64_t P, uint64_t SA) const {
+void PPC64TargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
+                                  uint64_t Val) const {
   uint64_t TB = getPPC64TocBase();
 
   // For a TOC-relative relocation, adjust the addend and proceed in terms of
   // the corresponding ADDR16 relocation type.
   switch (Type) {
-  case R_PPC64_TOC16:       Type = R_PPC64_ADDR16;       SA -= TB; break;
-  case R_PPC64_TOC16_DS:    Type = R_PPC64_ADDR16_DS;    SA -= TB; break;
-  case R_PPC64_TOC16_HA:    Type = R_PPC64_ADDR16_HA;    SA -= TB; break;
-  case R_PPC64_TOC16_HI:    Type = R_PPC64_ADDR16_HI;    SA -= TB; break;
-  case R_PPC64_TOC16_LO:    Type = R_PPC64_ADDR16_LO;    SA -= TB; break;
-  case R_PPC64_TOC16_LO_DS: Type = R_PPC64_ADDR16_LO_DS; SA -= TB; break;
+  case R_PPC64_TOC16:       Type = R_PPC64_ADDR16;       Val -= TB; break;
+  case R_PPC64_TOC16_DS:    Type = R_PPC64_ADDR16_DS;    Val -= TB; break;
+  case R_PPC64_TOC16_HA:    Type = R_PPC64_ADDR16_HA;    Val -= TB; break;
+  case R_PPC64_TOC16_HI:    Type = R_PPC64_ADDR16_HI;    Val -= TB; break;
+  case R_PPC64_TOC16_LO:    Type = R_PPC64_ADDR16_LO;    Val -= TB; break;
+  case R_PPC64_TOC16_LO_DS: Type = R_PPC64_ADDR16_LO_DS; Val -= TB; break;
   default: break;
   }
 
   switch (Type) {
   case R_PPC64_ADDR14: {
-    checkAlignment<4>(SA, Type);
+    checkAlignment<4>(Val, Type);
     // Preserve the AA/LK bits in the branch instruction
     uint8_t AALK = Loc[3];
-    write16be(Loc + 2, (AALK & 3) | (SA & 0xfffc));
+    write16be(Loc + 2, (AALK & 3) | (Val & 0xfffc));
     break;
   }
   case R_PPC64_ADDR16:
-    checkInt<16>(SA, Type);
-    write16be(Loc, SA);
+    checkInt<16>(Val, Type);
+    write16be(Loc, Val);
     break;
   case R_PPC64_ADDR16_DS:
-    checkInt<16>(SA, Type);
-    write16be(Loc, (read16be(Loc) & 3) | (SA & ~3));
+    checkInt<16>(Val, Type);
+    write16be(Loc, (read16be(Loc) & 3) | (Val & ~3));
     break;
   case R_PPC64_ADDR16_HA:
-    write16be(Loc, applyPPCHa(SA));
+    write16be(Loc, applyPPCHa(Val));
     break;
   case R_PPC64_ADDR16_HI:
-    write16be(Loc, applyPPCHi(SA));
+    write16be(Loc, applyPPCHi(Val));
     break;
   case R_PPC64_ADDR16_HIGHER:
-    write16be(Loc, applyPPCHigher(SA));
+    write16be(Loc, applyPPCHigher(Val));
     break;
   case R_PPC64_ADDR16_HIGHERA:
-    write16be(Loc, applyPPCHighera(SA));
+    write16be(Loc, applyPPCHighera(Val));
     break;
   case R_PPC64_ADDR16_HIGHEST:
-    write16be(Loc, applyPPCHighest(SA));
+    write16be(Loc, applyPPCHighest(Val));
     break;
   case R_PPC64_ADDR16_HIGHESTA:
-    write16be(Loc, applyPPCHighesta(SA));
+    write16be(Loc, applyPPCHighesta(Val));
     break;
   case R_PPC64_ADDR16_LO:
-    write16be(Loc, applyPPCLo(SA));
+    write16be(Loc, applyPPCLo(Val));
     break;
   case R_PPC64_ADDR16_LO_DS:
-    write16be(Loc, (read16be(Loc) & 3) | (applyPPCLo(SA) & ~3));
+    write16be(Loc, (read16be(Loc) & 3) | (applyPPCLo(Val) & ~3));
     break;
   case R_PPC64_ADDR32:
-    checkInt<32>(SA, Type);
-    write32be(Loc, SA);
+    checkInt<32>(Val, Type);
+    write32be(Loc, Val);
     break;
   case R_PPC64_ADDR64:
-    write64be(Loc, SA);
+    write64be(Loc, Val);
     break;
   case R_PPC64_REL16_HA:
-    write16be(Loc, applyPPCHa(SA - P));
+    write16be(Loc, applyPPCHa(Val));
     break;
   case R_PPC64_REL16_HI:
-    write16be(Loc, applyPPCHi(SA - P));
+    write16be(Loc, applyPPCHi(Val));
     break;
   case R_PPC64_REL16_LO:
-    write16be(Loc, applyPPCLo(SA - P));
+    write16be(Loc, applyPPCLo(Val));
     break;
   case R_PPC64_REL24: {
-    // If we have an undefined weak symbol, we might get here with a symbol
-    // address of zero. That could overflow, but the code must be unreachable,
-    // so don't bother doing anything at all.
-    if (!SA)
-      break;
-
-    uint64_t PltStart = Out<ELF64BE>::Plt->getVA();
-    uint64_t PltEnd = PltStart + Out<ELF64BE>::Plt->getSize();
-    bool InPlt = PltStart <= SA && SA < PltEnd;
-
-    if (!InPlt && Out<ELF64BE>::Opd) {
-      // If this is a local call, and we currently have the address of a
-      // function-descriptor, get the underlying code address instead.
-      uint64_t OpdStart = Out<ELF64BE>::Opd->getVA();
-      uint64_t OpdEnd = OpdStart + Out<ELF64BE>::Opd->getSize();
-      bool InOpd = OpdStart <= SA && SA < OpdEnd;
-
-      if (InOpd)
-        SA = read64be(&Out<ELF64BE>::OpdBuf[SA - OpdStart]);
-    }
-
     uint32_t Mask = 0x03FFFFFC;
-    checkInt<24>(SA - P, Type);
-    write32be(Loc, (read32be(Loc) & ~Mask) | ((SA - P) & Mask));
-
-    uint32_t Nop = 0x60000000;
-    if (InPlt && Loc + 8 <= BufEnd && read32be(Loc + 4) == Nop)
-      write32be(Loc + 4, 0xe8410028); // ld %r2, 40(%r1)
+    checkInt<24>(Val, Type);
+    write32be(Loc, (read32be(Loc) & ~Mask) | (Val & Mask));
     break;
   }
   case R_PPC64_REL32:
-    checkInt<32>(SA - P, Type);
-    write32be(Loc, SA - P);
+    checkInt<32>(Val, Type);
+    write32be(Loc, Val);
     break;
   case R_PPC64_REL64:
-    write64be(Loc, SA - P);
+    write64be(Loc, Val);
     break;
   case R_PPC64_TOC:
-    write64be(Loc, SA);
+    write64be(Loc, Val);
     break;
   default:
     fatal("unrecognized reloc " + Twine(Type));
   }
 }
 
 AArch64TargetInfo::AArch64TargetInfo() {
   CopyRel = R_AARCH64_COPY;
   RelativeRel = R_AARCH64_RELATIVE;
   IRelativeRel = R_AARCH64_IRELATIVE;
   GotRel = R_AARCH64_GLOB_DAT;
   PltRel = R_AARCH64_JUMP_SLOT;
   TlsGotRel = R_AARCH64_TLS_TPREL64;
   TlsModuleIndexRel = R_AARCH64_TLS_DTPMOD64;
   TlsOffsetRel = R_AARCH64_TLS_DTPREL64;
   UseLazyBinding = true;
   PltEntrySize = 16;
   PltZeroSize = 32;
 }
 
+RelExpr AArch64TargetInfo::getRelExpr(uint32_t Type,
+                                      const SymbolBody &S) const {
+  switch (Type) {
+  default:
+    return R_ABS;
+  case R_AARCH64_JUMP26:
+  case R_AARCH64_CALL26:
+  case R_AARCH64_PREL16:
+  case R_AARCH64_PREL32:
+  case R_AARCH64_PREL64:
+  case R_AARCH64_CONDBR19:
+  case R_AARCH64_ADR_PREL_LO21:
+  case R_AARCH64_TSTBR14:
+    return R_PC;
+  case R_AARCH64_ADR_GOT_PAGE:
+  case R_AARCH64_ADR_PREL_PG_HI21:
+  case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
+    return R_PAGE_PC;
+  }
+}
+
 bool AArch64TargetInfo::isRelRelative(uint32_t Type) const {
   switch (Type) {
   default:
     return false;
   case R_AARCH64_ADD_ABS_LO12_NC:
   case R_AARCH64_ADR_GOT_PAGE:
   case R_AARCH64_ADR_PREL_LO21:
   case R_AARCH64_ADR_PREL_PG_HI21:
uint32_t AArch64TargetInfo::getDynRel(uint32_t Type) const {
   // Keep it going with a dummy value so that we can find more reloc errors.
   return R_AARCH64_ABS32;
 }
 
 void AArch64TargetInfo::writeGotPlt(uint8_t *Buf, uint64_t Plt) const {
   write64le(Buf, Out<ELF64LE>::Plt->getVA());
 }
 
+static uint64_t getAArch64Page(uint64_t Expr) {
+  return Expr & (~static_cast<uint64_t>(0xFFF));
+}
+
 void AArch64TargetInfo::writePltZero(uint8_t *Buf) const {
   const uint8_t PltData[] = {
       0xf0, 0x7b, 0xbf, 0xa9, // stp  x16, x30, [sp,#-16]!
       0x10, 0x00, 0x00, 0x90, // adrp  x16, Page(&(.plt.got[2]))
       0x11, 0x02, 0x40, 0xf9, // ldr  x17, [x16, Offset(&(.plt.got[2]))]
       0x10, 0x02, 0x00, 0x91, // add  x16, x16, Offset(&(.plt.got[2]))
       0x20, 0x02, 0x1f, 0xd6, // br x17
       0x1f, 0x20, 0x03, 0xd5, // nop
       0x1f, 0x20, 0x03, 0xd5, // nop
       0x1f, 0x20, 0x03, 0xd5  // nop
   };
   memcpy(Buf, PltData, sizeof(PltData));
 
   uint64_t Got = Out<ELF64LE>::GotPlt->getVA();
   uint64_t Plt = Out<ELF64LE>::Plt->getVA();
-  relocateOne(Buf + 4, Buf + 8, R_AARCH64_ADR_PREL_PG_HI21, Plt + 4, Got + 16);
-  relocateOne(Buf + 8, Buf + 12, R_AARCH64_LDST64_ABS_LO12_NC, Plt + 8,
-              Got + 16);
-  relocateOne(Buf + 12, Buf + 16, R_AARCH64_ADD_ABS_LO12_NC, Plt + 12,
-              Got + 16);
+  relocateOne(Buf + 4, R_AARCH64_ADR_PREL_PG_HI21,
+              getAArch64Page(Got + 16) - getAArch64Page(Plt + 4));
+  relocateOne(Buf + 8, R_AARCH64_LDST64_ABS_LO12_NC, Got + 16);
+  relocateOne(Buf + 12, R_AARCH64_ADD_ABS_LO12_NC, Got + 16);
 }
 
 void AArch64TargetInfo::writePlt(uint8_t *Buf, uint64_t GotEntryAddr,
                                  uint64_t PltEntryAddr, int32_t Index,
                                  unsigned RelOff) const {
   const uint8_t Inst[] = {
       0x10, 0x00, 0x00, 0x90, // adrp x16, Page(&(.plt.got[n]))
       0x11, 0x02, 0x40, 0xf9, // ldr  x17, [x16, Offset(&(.plt.got[n]))]
       0x10, 0x02, 0x00, 0x91, // add  x16, x16, Offset(&(.plt.got[n]))
       0x20, 0x02, 0x1f, 0xd6  // br   x17
   };
   memcpy(Buf, Inst, sizeof(Inst));
 
-  relocateOne(Buf, Buf + 4, R_AARCH64_ADR_PREL_PG_HI21, PltEntryAddr,
-              GotEntryAddr);
-  relocateOne(Buf + 4, Buf + 8, R_AARCH64_LDST64_ABS_LO12_NC, PltEntryAddr + 4,
-              GotEntryAddr);
-  relocateOne(Buf + 8, Buf + 12, R_AARCH64_ADD_ABS_LO12_NC, PltEntryAddr + 8,
-              GotEntryAddr);
+  relocateOne(Buf, R_AARCH64_ADR_PREL_PG_HI21,
+              getAArch64Page(GotEntryAddr) - getAArch64Page(PltEntryAddr));
+  relocateOne(Buf + 4, R_AARCH64_LDST64_ABS_LO12_NC, GotEntryAddr);
+  relocateOne(Buf + 8, R_AARCH64_ADD_ABS_LO12_NC, GotEntryAddr);
 }
 
 uint32_t AArch64TargetInfo::getTlsGotRel(uint32_t Type) const {
   assert(Type == R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 ||
          Type == R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC);
   return Type;
 }
 
static void updateAArch64Addr(uint8_t *L, uint64_t Imm) {
   uint64_t Mask = (0x3 << 29) | (0x7FFFF << 5);
   write32le(L, (read32le(L) & ~Mask) | ImmLo | ImmHi);
 }
 
 static inline void updateAArch64Add(uint8_t *L, uint64_t Imm) {
   or32le(L, (Imm & 0xFFF) << 10);
 }
 
-// Page(Expr) is the page address of the expression Expr, defined
-// as (Expr & ~0xFFF). (This applies even if the machine page size
-// supported by the platform has a different value.)
-static uint64_t getAArch64Page(uint64_t Expr) {
-  return Expr & (~static_cast<uint64_t>(0xFFF));
-}
-
-void AArch64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd,
-                                    uint32_t Type, uint64_t P,
-                                    uint64_t SA) const {
+void AArch64TargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
+                                    uint64_t Val) const {
   switch (Type) {
   case R_AARCH64_ABS16:
-    checkIntUInt<16>(SA, Type);
-    write16le(Loc, SA);
+    checkIntUInt<16>(Val, Type);
+    write16le(Loc, Val);
     break;
   case R_AARCH64_ABS32:
-    checkIntUInt<32>(SA, Type);
-    write32le(Loc, SA);
+    checkIntUInt<32>(Val, Type);
+    write32le(Loc, Val);
     break;
   case R_AARCH64_ABS64:
-    write64le(Loc, SA);
+    write64le(Loc, Val);
     break;
   case R_AARCH64_ADD_ABS_LO12_NC:
     // This relocation stores 12 bits and there's no instruction
     // to do it. Instead, we do a 32 bits store of the value
     // of r_addend bitwise-or'ed Loc. This assumes that the addend
     // bits in Loc are zero.
-    or32le(Loc, (SA & 0xFFF) << 10);
+    or32le(Loc, (Val & 0xFFF) << 10);
     break;
   case R_AARCH64_ADR_GOT_PAGE: {
-    uint64_t X = getAArch64Page(SA) - getAArch64Page(P);
+    uint64_t X = Val;
     checkInt<33>(X, Type);
     updateAArch64Addr(Loc, (X >> 12) & 0x1FFFFF); // X[32:12]
     break;
   }
   case R_AARCH64_ADR_PREL_LO21: {
-    uint64_t X = SA - P;
+    uint64_t X = Val;
     checkInt<21>(X, Type);
     updateAArch64Addr(Loc, X & 0x1FFFFF);
     break;
   }
   case R_AARCH64_ADR_PREL_PG_HI21:
   case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21: {
-    uint64_t X = getAArch64Page(SA) - getAArch64Page(P);
+    uint64_t X = Val;
     checkInt<33>(X, Type);
     updateAArch64Addr(Loc, (X >> 12) & 0x1FFFFF); // X[32:12]
     break;
   }
   case R_AARCH64_CALL26:
   case R_AARCH64_JUMP26: {
-    uint64_t X = SA - P;
+    uint64_t X = Val;
     checkInt<28>(X, Type);
     or32le(Loc, (X & 0x0FFFFFFC) >> 2);
     break;
   }
   case R_AARCH64_CONDBR19: {
-    uint64_t X = SA - P;
+    uint64_t X = Val;
     checkInt<21>(X, Type);
     or32le(Loc, (X & 0x1FFFFC) << 3);
     break;
   }
   case R_AARCH64_LD64_GOT_LO12_NC:
   case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
-    checkAlignment<8>(SA, Type);
-    or32le(Loc, (SA & 0xFF8) << 7);
+    checkAlignment<8>(Val, Type);
+    or32le(Loc, (Val & 0xFF8) << 7);
     break;
   case R_AARCH64_LDST128_ABS_LO12_NC:
-    or32le(Loc, (SA & 0x0FF8) << 6);
+    or32le(Loc, (Val & 0x0FF8) << 6);
     break;
   case R_AARCH64_LDST16_ABS_LO12_NC:
-    or32le(Loc, (SA & 0x0FFC) << 9);
+    or32le(Loc, (Val & 0x0FFC) << 9);
     break;
   case R_AARCH64_LDST8_ABS_LO12_NC:
-    or32le(Loc, (SA & 0xFFF) << 10);
+    or32le(Loc, (Val & 0xFFF) << 10);
     break;
   case R_AARCH64_LDST32_ABS_LO12_NC:
-    or32le(Loc, (SA & 0xFFC) << 8);
+    or32le(Loc, (Val & 0xFFC) << 8);
     break;
   case R_AARCH64_LDST64_ABS_LO12_NC:
-    or32le(Loc, (SA & 0xFF8) << 7);
+    or32le(Loc, (Val & 0xFF8) << 7);
     break;
   case R_AARCH64_PREL16:
-    checkIntUInt<16>(SA - P, Type);
-    write16le(Loc, SA - P);
+    checkIntUInt<16>(Val, Type);
+    write16le(Loc, Val);
     break;
   case R_AARCH64_PREL32:
-    checkIntUInt<32>(SA - P, Type);
-    write32le(Loc, SA - P);
+    checkIntUInt<32>(Val, Type);
+    write32le(Loc, Val);
     break;
   case R_AARCH64_PREL64:
-    write64le(Loc, SA - P);
+    write64le(Loc, Val);
     break;
   case R_AARCH64_TSTBR14: {
-    uint64_t X = SA - P;
+    uint64_t X = Val;
     checkInt<16>(X, Type);
     or32le(Loc, (X & 0xFFFC) << 3);
     break;
   }
   case R_AARCH64_TLSLE_ADD_TPREL_HI12: {
-    uint64_t V = llvm::alignTo(TcbSize, Out<ELF64LE>::TlsPhdr->p_align) + SA;
+    uint64_t V = llvm::alignTo(TcbSize, Out<ELF64LE>::TlsPhdr->p_align) + Val;
     checkInt<24>(V, Type);
     updateAArch64Add(Loc, (V & 0xFFF000) >> 12);
     break;
   }
   case R_AARCH64_TLSLE_ADD_TPREL_LO12_NC: {
-    uint64_t V = llvm::alignTo(TcbSize, Out<ELF64LE>::TlsPhdr->p_align) + SA;
+    uint64_t V = llvm::alignTo(TcbSize, Out<ELF64LE>::TlsPhdr->p_align) + Val;
     updateAArch64Add(Loc, V & 0xFFF);
     break;
   }
   default:
     fatal("unrecognized reloc " + Twine(Type));
   }
 }
 
-size_t AArch64TargetInfo::relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd,
-                                         uint32_t Type, uint64_t P,
-                                         uint64_t SA) const {
+void AArch64TargetInfo::relaxTlsGdToLe(uint8_t *Loc, uint32_t Type,
+                                       uint64_t Val) const {
   // TLSDESC Global-Dynamic relocation are in the form:
   //   adrp    x0, :tlsdesc:v             [R_AARCH64_TLSDESC_ADR_PAGE21]
   //   ldr     x1, [x0, #:tlsdesc_lo12:v  [R_AARCH64_TLSDESC_LD64_LO12_NC]
   //   add     x0, x0, :tlsdesc_los:v     [_AARCH64_TLSDESC_ADD_LO12_NC]
   //   .tlsdesccall                       [R_AARCH64_TLSDESC_CALL]
   // And it can optimized to:
   //   movz    x0, #0x0, lsl #16
   //   movk    x0, #0x10
   //   nop
   //   nop
   uint64_t TPOff = llvm::alignTo(TcbSize, Out<ELF64LE>::TlsPhdr->p_align);
-  uint64_t X = SA + TPOff;
+  uint64_t X = Val + TPOff;
   checkUInt<32>(X, Type);
 
   uint32_t NewInst;
   switch (Type) {
   case R_AARCH64_TLSDESC_ADD_LO12_NC:
   case R_AARCH64_TLSDESC_CALL:
     // nop
     NewInst = 0xd503201f;
     break;
   case R_AARCH64_TLSDESC_ADR_PAGE21:
     // movz
     NewInst = 0xd2a00000 | (((X >> 16) & 0xffff) << 5);
     break;
   case R_AARCH64_TLSDESC_LD64_LO12_NC:
     // movk
     NewInst = 0xf2800000 | ((X & 0xffff) << 5);
     break;
   default:
     llvm_unreachable("unsupported Relocation for TLS GD to LE relax");
   }
   write32le(Loc, NewInst);
-
-  return 0;
 }
 
-size_t AArch64TargetInfo::relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd,
-                                         uint32_t Type, uint64_t P,
-                                         uint64_t SA) const {
+void AArch64TargetInfo::relaxTlsIeToLe(uint8_t *Loc, uint32_t Type,
+                                       uint64_t Val) const {
   uint64_t TPOff = llvm::alignTo(TcbSize, Out<ELF64LE>::TlsPhdr->p_align);
-  uint64_t X = SA + TPOff;
+  uint64_t X = Val + TPOff;
   checkUInt<32>(X, Type);
 
   uint32_t Inst = read32le(Loc);
   uint32_t NewInst;
   if (Type == R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21) {
     // Generate movz.
     unsigned RegNo = (Inst & 0x1f);
     NewInst = (0xd2a00000 | RegNo) | (((X >> 16) & 0xffff) << 5);
   } else if (Type == R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC) {
     // Generate movk
     unsigned RegNo = (Inst & 0x1f);
     NewInst = (0xf2800000 | RegNo) | ((X & 0xffff) << 5);
   } else {
     llvm_unreachable("invalid Relocation for TLS IE to LE Relax");
   }
   write32le(Loc, NewInst);
-
-  return 0;
 }
 
 // Implementing relocations for AMDGPU is low priority since most
 // programs don't use relocations now. Thus, this function is not
 // actually called (relocateOne is called for each relocation).
 // That's why the AMDGPU port works without implementing this function.
-void AMDGPUTargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
-                                   uint64_t P, uint64_t SA) const {
+void AMDGPUTargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
+                                   uint64_t Val) const {
+  llvm_unreachable("not implemented");
+}
+
+RelExpr AMDGPUTargetInfo::getRelExpr(uint32_t Type, const SymbolBody &S) const {
   llvm_unreachable("not implemented");
 }
 
 template <class ELFT> MipsTargetInfo<ELFT>::MipsTargetInfo() {
   GotHeaderEntriesNum = 2;
   GotPltHeaderEntriesNum = 2;
   PageSize = 65536;
   PltEntrySize = 16;
   PltZeroSize = 32;
   ThunkSize = 16;
   UseLazyBinding = true;
   CopyRel = R_MIPS_COPY;
   PltRel = R_MIPS_JUMP_SLOT;
   RelativeRel = R_MIPS_REL32;
 }
 
 template <class ELFT>
+RelExpr MipsTargetInfo<ELFT>::getRelExpr(uint32_t Type,
+                                         const SymbolBody &S) const {
+  switch (Type) {
+  default:
+    return R_ABS;
+  case R_MIPS_HI16:
+    // MIPS _gp_disp designates offset between start of function and 'gp'
+    // pointer into GOT. __gnu_local_gp is equal to the current value of
+    // the 'gp'. Therefore any relocations against them do not require
+    // dynamic relocation.
+    if (&S == ElfSym<ELFT>::MipsGpDisp)
+      return R_PC;
+    return R_ABS;
+  case R_MIPS_PC32:
+  case R_MIPS_PC16:
+  case R_MIPS_PC19_S2:
+  case R_MIPS_PC21_S2:
+  case R_MIPS_PC26_S2:
+  case R_MIPS_PCHI16:
+  case R_MIPS_PCLO16:
+    return R_PC;
+  }
+}
+
+template <class ELFT>
 uint32_t MipsTargetInfo<ELFT>::getDynRel(uint32_t Type) const {
   if (Type == R_MIPS_32 || Type == R_MIPS_64)
     return R_MIPS_REL32;
   StringRef S = getELFRelocationTypeName(EM_MIPS, Type);
   error("relocation " + S + " cannot be used when making a shared object; "
                             "recompile with -fPIC.");
   // Keep it going with a dummy value so that we can find more reloc errors.
   return R_MIPS_32;

 template <endianness E, uint8_t BSIZE, uint8_t SHIFT>
 static int64_t getPcRelocAddend(const uint8_t *Loc) {
   uint32_t Instr = read32<E>(Loc);
   uint32_t Mask = 0xffffffff >> (32 - BSIZE);
   return SignExtend64<BSIZE + SHIFT>((Instr & Mask) << SHIFT);
 }
 
 template <endianness E, uint8_t BSIZE, uint8_t SHIFT>
-static void applyMipsPcReloc(uint8_t *Loc, uint32_t Type, uint64_t P,
-                             uint64_t SA) {
+static void applyMipsPcReloc(uint8_t *Loc, uint32_t Type, uint64_t V) {
   uint32_t Mask = 0xffffffff >> (32 - BSIZE);
   uint32_t Instr = read32<E>(Loc);
-  int64_t V = SA - P;
   if (SHIFT > 0)
     checkAlignment<(1 << SHIFT)>(V, Type);
   checkInt<BSIZE + SHIFT>(V, Type);
   write32<E>(Loc, (Instr & ~Mask) | ((V >> SHIFT) & Mask));
 }
 
 template <endianness E>
 static void writeMipsHi16(uint8_t *Loc, uint64_t V) {
uint64_t MipsTargetInfo<ELFT>::getImplicitAddend(const uint8_t *Buf,
   case R_MIPS_PC26_S2:
     return getPcRelocAddend<E, 26, 2>(Buf);
   case R_MIPS_PC32:
     return getPcRelocAddend<E, 32, 0>(Buf);
   }
 }
 
 template <class ELFT>
-void MipsTargetInfo<ELFT>::relocateOne(uint8_t *Loc, uint8_t *BufEnd,
-                                       uint32_t Type, uint64_t P,
-                                       uint64_t SA) const {
+void MipsTargetInfo<ELFT>::relocateOne(uint8_t *Loc, uint32_t Type,
+                                       uint64_t Val) const {
   const endianness E = ELFT::TargetEndianness;
   // Thread pointer and DRP offsets from the start of TLS data area.
   // https://www.linux-mips.org/wiki/NPTL
   const uint32_t TPOffset = 0x7000;
   const uint32_t DTPOffset = 0x8000;
   switch (Type) {
   case R_MIPS_32:
-    write32<E>(Loc, SA);
+    write32<E>(Loc, Val);
     break;
   case R_MIPS_26: {
     uint32_t Instr = read32<E>(Loc);
-    write32<E>(Loc, (Instr & ~0x3ffffff) | (SA >> 2));
+    write32<E>(Loc, (Instr & ~0x3ffffff) | (Val >> 2));
     break;
   }
   case R_MIPS_CALL16:
   case R_MIPS_GOT16: {
-    int64_t V = SA - getMipsGpAddr<ELFT>();
+    int64_t V = Val - getMipsGpAddr<ELFT>();
     if (Type == R_MIPS_GOT16)
       checkInt<16>(V, Type);
     writeMipsLo16<E>(Loc, V);
     break;
   }
   case R_MIPS_GPREL16: {
-    int64_t V = SA - getMipsGpAddr<ELFT>();
+    int64_t V = Val - getMipsGpAddr<ELFT>();
     checkInt<16>(V, Type);
     writeMipsLo16<E>(Loc, V);
     break;
   }
   case R_MIPS_GPREL32:
-    write32<E>(Loc, SA - getMipsGpAddr<ELFT>());
+    write32<E>(Loc, Val - getMipsGpAddr<ELFT>());
     break;
   case R_MIPS_HI16:
-    writeMipsHi16<E>(Loc, SA);
+    writeMipsHi16<E>(Loc, Val);
     break;
   case R_MIPS_JALR:
     // Ignore this optimization relocation for now
     break;
   case R_MIPS_LO16:
-    writeMipsLo16<E>(Loc, SA);
+    writeMipsLo16<E>(Loc, Val);
     break;
   case R_MIPS_PC16:
-    applyMipsPcReloc<E, 16, 2>(Loc, Type, P, SA);
+    applyMipsPcReloc<E, 16, 2>(Loc, Type, Val);
     break;
   case R_MIPS_PC19_S2:
-    applyMipsPcReloc<E, 19, 2>(Loc, Type, P, SA);
+    applyMipsPcReloc<E, 19, 2>(Loc, Type, Val);
     break;
   case R_MIPS_PC21_S2:
-    applyMipsPcReloc<E, 21, 2>(Loc, Type, P, SA);
+    applyMipsPcReloc<E, 21, 2>(Loc, Type, Val);
     break;
   case R_MIPS_PC26_S2:
-    applyMipsPcReloc<E, 26, 2>(Loc, Type, P, SA);
+    applyMipsPcReloc<E, 26, 2>(Loc, Type, Val);
     break;
   case R_MIPS_PC32:
-    applyMipsPcReloc<E, 32, 0>(Loc, Type, P, SA);
+    applyMipsPcReloc<E, 32, 0>(Loc, Type, Val);
     break;
   case R_MIPS_PCHI16:
-    writeMipsHi16<E>(Loc, SA - P);
+    writeMipsHi16<E>(Loc, Val);
     break;
   case R_MIPS_PCLO16:
-    writeMipsLo16<E>(Loc, SA - P);
+    writeMipsLo16<E>(Loc, Val);
     break;
   case R_MIPS_TLS_DTPREL_HI16:
-    writeMipsHi16<E>(Loc, SA - DTPOffset);
+    writeMipsHi16<E>(Loc, Val - DTPOffset);
     break;
   case R_MIPS_TLS_DTPREL_LO16:
-    writeMipsLo16<E>(Loc, SA - DTPOffset);
+    writeMipsLo16<E>(Loc, Val - DTPOffset);
     break;
   case R_MIPS_TLS_TPREL_HI16:
-    writeMipsHi16<E>(Loc, SA - TPOffset);
+    writeMipsHi16<E>(Loc, Val - TPOffset);
     break;
   case R_MIPS_TLS_TPREL_LO16:
-    writeMipsLo16<E>(Loc, SA - TPOffset);
+    writeMipsLo16<E>(Loc, Val - TPOffset);
     break;
   default:
     fatal("unrecognized reloc " + Twine(Type));
   }
 }
 
 template <class ELFT>
 bool MipsTargetInfo<ELFT>::isHintRel(uint32_t Type) const {

ELF/Writer.cpp

 #include "LinkerScript.h"
 #include "OutputSections.h"
 #include "SymbolTable.h"
 #include "Target.h"
 
 #include "llvm/ADT/SmallPtrSet.h"
 #include "llvm/ADT/StringMap.h"
 #include "llvm/ADT/StringSwitch.h"
+#include "llvm/Support/Endian.h"
 #include "llvm/Support/FileOutputBuffer.h"
 #include "llvm/Support/StringSaver.h"
 #include "llvm/Support/raw_ostream.h"
 
 using namespace llvm;
 using namespace llvm::ELF;
 using namespace llvm::object;
+using namespace llvm::support::endian;
 
 using namespace lld;
 using namespace lld::elf;
 
 namespace {
 // The writer writes a SymbolTable result to a file.
 template <class ELFT> class Writer {
 public:
static bool isEqual(const SectionKey<Is64Bits> &LHS,
     return DenseMapInfo<StringRef>::isEqual(LHS.Name, RHS.Name) &&
            LHS.Type == RHS.Type && LHS.Flags == RHS.Flags &&
            LHS.Alignment == RHS.Alignment;
   }
 };
 }
 
 // Returns the number of relocations processed.
-template <class ELFT, class RelT>
+template <class ELFT>
 static unsigned handleTlsRelocation(uint32_t Type, SymbolBody &Body,
-                                    InputSectionBase<ELFT> &C, RelT &RI) {
+                                    InputSectionBase<ELFT> &C,
+                                    typename ELFT::uint Offset,
+                                    typename ELFT::uint Addend, RelExpr Expr) {
+  if (!(C.getSectionHdr()->sh_flags & SHF_ALLOC))
+    return 0;
+
   typedef typename ELFT::uint uintX_t;
   if (Target->pointsToLocalDynamicGotEntry(Type)) {
-    if (Target->canRelaxTls(Type, nullptr))
+    if (Target->canRelaxTls(Type, nullptr)) {
+      C.Relocations.push_back(
+          {R_RELAX_TLS_LD_TO_LE, Type, Offset, Addend, &Body});
       return 2;
+    }
     if (Out<ELFT>::Got->addTlsIndex())
       Out<ELFT>::RelaDyn->addReloc({Target->TlsModuleIndexRel, Out<ELFT>::Got,
                                     Out<ELFT>::Got->getTlsIndexOff(), false,
                                     nullptr, 0});
+    Expr = Expr == R_PC ? R_TLSLD_PC : R_TLSLD;
+    C.Relocations.push_back({Expr, Type, Offset, Addend, &Body});
     return 1;
   }
 
   if (!Body.isTls())
     return 0;
 
+  if (Target->isTlsLocalDynamicRel(Type) &&
+      Target->canRelaxTls(Type, nullptr)) {
+    C.Relocations.push_back(
+        {R_RELAX_TLS_LD_TO_LE, Type, Offset, Addend, &Body});
+    return 1;
+  }
+
   if (Target->isTlsGlobalDynamicRel(Type)) {
     if (!Target->canRelaxTls(Type, &Body)) {
       if (Out<ELFT>::Got->addDynTlsEntry(Body)) {
         uintX_t Off = Out<ELFT>::Got->getGlobalDynOffset(Body);
         Out<ELFT>::RelaDyn->addReloc(
             {Target->TlsModuleIndexRel, Out<ELFT>::Got, Off, false, &Body, 0});
         Out<ELFT>::RelaDyn->addReloc({Target->TlsOffsetRel, Out<ELFT>::Got,
                                       Off + (uintX_t)sizeof(uintX_t), false,
                                       &Body, 0});
       }
+      Expr = Expr == R_PC ? R_TLSGD_PC : R_TLSGD;
+      C.Relocations.push_back({Expr, Type, Offset, Addend, &Body});
       return 1;
     }
-    if (!Body.isPreemptible())
-      return 2;
+
+    if (Body.isPreemptible()) {
+      Expr = Expr == R_PC ? R_RELAX_TLS_GD_TO_IE_PC : R_RELAX_TLS_GD_TO_IE;
+      C.Relocations.push_back({Expr, Type, Offset, Addend, &Body});
       if (!Body.isInGot()) {
         Out<ELFT>::Got->addEntry(Body);
         Out<ELFT>::RelaDyn->addReloc({Target->TlsGotRel, Out<ELFT>::Got,
                                       Body.getGotOffset<ELFT>(), false, &Body,
                                       0});
       }
       return 2;
     }
+    C.Relocations.push_back(
+        {R_RELAX_TLS_GD_TO_LE, Type, Offset, Addend, &Body});
+    return Target->TlsGdToLeSkip;
+  }
+  if (Target->isTlsInitialExecRel(Type) && Target->canRelaxTls(Type, &Body)) {
+    C.Relocations.push_back(
+        {R_RELAX_TLS_IE_TO_LE, Type, Offset, Addend, &Body});
+    return 1;
+  }
   return 0;
 }
 
 // Some targets might require creation of thunks for relocations. Now we
 // support only MIPS which requires LA25 thunk to call PIC code from non-PIC
 // one. Scan relocations to find each one requires thunk.
 template <class ELFT>
 template <class RelTy>
 void Writer<ELFT>::scanRelocsForThunks(const elf::ObjectFile<ELFT> &File,
                                        ArrayRef<RelTy> Rels) {
   for (const RelTy &RI : Rels) {
     uint32_t Type = RI.getType(Config->Mips64EL);
     uint32_t SymIndex = RI.getSymbol(Config->Mips64EL);
     SymbolBody &Body = File.getSymbolBody(SymIndex).repl();
     if (Body.hasThunk() || !Target->needsThunk(Type, File, Body))
       continue;
     auto *D = cast<DefinedRegular<ELFT>>(&Body);
     auto *S = cast<InputSection<ELFT>>(D->Section);
     S->addThunk(Body);
   }
 }
 
+template <endianness E> static int16_t readSignedLo16(const uint8_t *Loc) {
+  return read32<E>(Loc) & 0xffff;
+}
+
+template <class RelTy>
+static uint32_t getMipsPairType(const RelTy *Rel, const SymbolBody &Sym) {
+  switch (Rel->getType(Config->Mips64EL)) {
+  case R_MIPS_HI16:
+    return R_MIPS_LO16;
+  case R_MIPS_GOT16:
+    return Sym.isLocal() ? R_MIPS_LO16 : R_MIPS_NONE;
+  case R_MIPS_PCHI16:
+    return R_MIPS_PCLO16;
+  case R_MICROMIPS_HI16:
+    return R_MICROMIPS_LO16;
+  default:
+    return R_MIPS_NONE;
+  }
+}
+
+template <class ELFT, class RelTy>
+static int32_t findMipsPairedAddend(const uint8_t *Buf, const uint8_t *BufLoc,
+                                    SymbolBody &Sym, const RelTy *Rel,
+                                    const RelTy *End) {
+  uint32_t SymIndex = Rel->getSymbol(Config->Mips64EL);
+  uint32_t Type = getMipsPairType(Rel, Sym);
+
+  // Some MIPS relocations use addend calculated from addend of the relocation
+  // itself and addend of paired relocation. ABI requires to compute such
+  // combined addend in case of REL relocation record format only.
+  // See p. 4-17 at ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
+  if (RelTy::IsRela || Type == R_MIPS_NONE)
+    return 0;
+
+  for (const RelTy *RI = Rel; RI != End; ++RI) {
+    if (RI->getType(Config->Mips64EL) != Type)
+      continue;
+    if (RI->getSymbol(Config->Mips64EL) != SymIndex)
+      continue;
+    const endianness E = ELFT::TargetEndianness;
+    return ((read32<E>(BufLoc) & 0xffff) << 16) +
+           readSignedLo16<E>(Buf + RI->r_offset);
+  }
+  unsigned OldType = Rel->getType(Config->Mips64EL);
+  StringRef OldName = getELFRelocationTypeName(Config->EMachine, OldType);
+  StringRef NewName = getELFRelocationTypeName(Config->EMachine, Type);
+  warning("can't find matching " + NewName + " relocation for " + OldName);
+  return 0;
+}
+
 // The reason we have to do this early scan is as follows
 // * To mmap the output file, we need to know the size
 // * For that, we need to know how many dynamic relocs we will have.
 // It might be possible to avoid this by outputting the file with write:
 // * Write the allocated output sections, computing addresses.
 // * Apply relocations, recording which ones require a dynamic reloc.
 // * Write the dynamic relocations.
 // * Write the rest of the file.
 // This would have some drawbacks. For example, we would only know if .rela.dyn
 // is needed after applying relocations. If it is, it will go after rw and rx
 // sections. Given that it is ro, we will need an extra PT_LOAD. This
 // complicates things for the dynamic linker and means we would have to reserve
 // space for the extra PT_LOAD even if we end up not using it.
 template <class ELFT>
 template <class RelTy>
 void Writer<ELFT>::scanRelocs(InputSectionBase<ELFT> &C, ArrayRef<RelTy> Rels) {
+  bool IsAlloc = C.getSectionHdr()->sh_flags & SHF_ALLOC;
+
+  auto AddDyn = [=](const DynamicReloc<ELFT> &Reloc) {
+    if (IsAlloc)
+      Out<ELFT>::RelaDyn->addReloc(Reloc);
+  };
+
   const elf::ObjectFile<ELFT> &File = *C.getFile();
+  ArrayRef<uint8_t> SectionData = C.getSectionData();
+  const uint8_t *Buf = SectionData.begin();
   for (auto I = Rels.begin(), E = Rels.end(); I != E; ++I) {
     const RelTy &RI = *I;
     uint32_t SymIndex = RI.getSymbol(Config->Mips64EL);
     SymbolBody &OrigBody = File.getSymbolBody(SymIndex);
     SymbolBody &Body = OrigBody.repl();
     uint32_t Type = RI.getType(Config->Mips64EL);
 
     // Ignore "hint" relocation because it is for optional code optimization.
     if (Target->isHintRel(Type))
       continue;
 
     uintX_t Offset = C.getOffset(RI.r_offset);
     if (Offset == (uintX_t)-1)
       continue;
 
     if (Target->isGotRelative(Type))
       HasGotOffRel = true;
 
     // Set "used" bit for --as-needed.
     if (OrigBody.isUndefined() && !OrigBody.isWeak())
       if (auto *S = dyn_cast<SharedSymbol<ELFT>>(&Body))
         S->File->IsUsed = true;
 
+    RelExpr Expr = Target->getRelExpr(Type, Body);
+
+    uintX_t Addend = getAddend<ELFT>(RI);
+    const uint8_t *BufLoc = Buf + RI.r_offset;
+    if (!RelTy::IsRela)
+      Addend += Target->getImplicitAddend(BufLoc, Type);
+    if (Config->EMachine == EM_MIPS)
+      Addend += findMipsPairedAddend<ELFT>(Buf, BufLoc, Body, &RI, E);
+
     bool Preemptible = Body.isPreemptible();
-    if (unsigned Processed = handleTlsRelocation<ELFT>(Type, Body, C, RI)) {
+    if (unsigned Processed =
+            handleTlsRelocation<ELFT>(Type, Body, C, Offset, Addend, Expr)) {
       I += (Processed - 1);
       continue;
     }
 
     if (Target->needsDynRelative(Type))
-      Out<ELFT>::RelaDyn->addReloc({Target->RelativeRel, C.OutSec, Offset, true,
-                                    &Body, getAddend<ELFT>(RI)});
+      AddDyn({Target->RelativeRel, C.OutSec, Offset, true, &Body,
+              getAddend<ELFT>(RI)});
 
     // If a symbol in a DSO is referenced directly instead of through GOT,
     // we need to create a copy relocation for the symbol.
     if (auto *B = dyn_cast<SharedSymbol<ELFT>>(&Body)) {
-      if (Target->needsCopyRel<ELFT>(Type, Body)) {
+      if (IsAlloc && Target->needsCopyRel<ELFT>(Type, *B)) {
         if (!B->needsCopy())
           addCopyRelSymbol(B);
+        C.Relocations.push_back({Expr, Type, Offset, Addend, &Body});
         continue;
       }
     }
 
     // If a relocation needs PLT, we create a PLT and a GOT slot
     // for the symbol.
     TargetInfo::PltNeed NeedPlt = Target->needsPlt(Type, Body);
     if (NeedPlt) {
       if (NeedPlt == TargetInfo::Plt_Implicit)
         Body.NeedsCopyOrPltAddr = true;
+      RelExpr E;
+      if (Expr == R_PPC_OPD)
+        E = R_PPC_PLT_OPD;
+      else if (Expr == R_PC)
+        E = R_PLT_PC;
+      else
+        E = R_PLT;
+      C.Relocations.push_back({E, Type, Offset, Addend, &Body});
+
       if (Body.isInPlt())
         continue;
       Out<ELFT>::Plt->addEntry(Body);
 
       uint32_t Rel;
       if (Body.isGnuIFunc())
         Rel = Preemptible ? Target->PltRel : Target->IRelativeRel;
       else
         Rel = Target->UseLazyBinding ? Target->PltRel : Target->GotRel;
 
       if (Target->UseLazyBinding) {
         Out<ELFT>::GotPlt->addEntry(Body);
+        if (IsAlloc)
           Out<ELFT>::RelaPlt->addReloc({Rel, Out<ELFT>::GotPlt,
                                         Body.getGotPltOffset<ELFT>(),
                                         !Preemptible, &Body, 0});
       } else {
         if (Body.isInGot())
           continue;
         Out<ELFT>::Got->addEntry(Body);
-        Out<ELFT>::RelaDyn->addReloc({Rel, Out<ELFT>::Got,
-                                      Body.getGotOffset<ELFT>(), !Preemptible,
-                                      &Body, 0});
+        AddDyn({Rel, Out<ELFT>::Got, Body.getGotOffset<ELFT>(), !Preemptible,
       }
       continue;
     }
 
+    if (Target->needsThunk(Type, File, Body)) {
+      C.Relocations.push_back({R_THUNK, Type, Offset, Addend, &Body});
+      continue;
+    }
+
     // If a relocation needs GOT, we create a GOT slot for the symbol.
     if (Target->needsGot(Type, Body)) {
+      uint32_t T = Body.isTls() ? Target->getTlsGotRel(Type) : Type;
+      RelExpr E;
+      if (Expr == R_PC)
+        E = R_GOT_PC;
+      else if (Expr == R_PAGE_PC)
+        E = R_GOT_PAGE_PC;
+      else if (Config->EMachine == EM_MIPS) {
+        if (Body.isLocal())
+          E = R_MIPS_GOT_LOCAL;
+        else if (!Body.isPreemptible())
+          E = R_MIPS_GOT;
+        else
+          E = R_GOT;
+      } else
+        E = R_GOT;
+      C.Relocations.push_back({E, T, Offset, Addend, &Body});
       if (Body.isInGot())
         continue;
       Out<ELFT>::Got->addEntry(Body);
 
       if (Config->EMachine == EM_MIPS)
         // MIPS ABI has special rules to process GOT entries
         // and doesn't require relocation entries for them.
         // See "Global Offset Table" in Chapter 5 in the following document
         // for detailed description:
         // ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
         continue;
 
       if (Preemptible || Config->Pic) {
         uint32_t DynType;
         if (Body.isTls())
           DynType = Target->TlsGotRel;
         else if (Preemptible)
           DynType = Target->GotRel;
         else
           DynType = Target->RelativeRel;
-        Out<ELFT>::RelaDyn->addReloc({DynType, Out<ELFT>::Got,
-                                      Body.getGotOffset<ELFT>(), !Preemptible,
-                                      &Body, 0});
+        AddDyn({DynType, Out<ELFT>::Got, Body.getGotOffset<ELFT>(),
+                !Preemptible, &Body, 0});
       }
       continue;
     }
 
-    // MIPS _gp_disp designates offset between start of function and 'gp'
-    // pointer into GOT. __gnu_local_gp is equal to the current value of
-    // the 'gp'. Therefore any relocations against them do not require
-    // dynamic relocation.
-    if (Config->EMachine == EM_MIPS && (&Body == ElfSym<ELFT>::MipsGpDisp ||
-                                        &Body == ElfSym<ELFT>::MipsLocalGp))
-      continue;
-
     if (Preemptible) {
       // We don't know anything about the finaly symbol. Just ask the dynamic
       // linker to handle the relocation for us.
-      Out<ELFT>::RelaDyn->addReloc({Target->getDynRel(Type), C.OutSec, Offset,
-                                    false, &Body, getAddend<ELFT>(RI)});
+      AddDyn({Target->getDynRel(Type), C.OutSec, Offset, false, &Body, Addend});
+      continue;
+    }
+
+    if (Config->EMachine == EM_PPC64 && RI.getType(false) == R_PPC64_TOC) {
+      C.Relocations.push_back({R_PPC_TOC, Type, Offset, Addend, &Body});
+      AddDyn({R_PPC64_RELATIVE, C.OutSec, Offset, false, nullptr,
+              (uintX_t)getPPC64TocBase() + Addend});
       continue;
     }
 
     // We know that this is the final symbol. If the program being produced
     // is position independent, the final value is still not known.
     // If the relocation depends on the symbol value (not the size or distances
     // in the output), we still need some help from the dynamic linker.
     // We can however do better than just copying the incoming relocation. We
     // can process some of it and and just ask the dynamic linker to add the
     // load address.
-    if (!Config->Pic || Target->isRelRelative(Type) || Target->isSizeRel(Type))
+    if (Target->isSizeRel(Type)) {
+      C.Relocations.push_back({R_SIZE, Type, Offset, Addend, &Body});
       continue;
-
-    uintX_t Addend = getAddend<ELFT>(RI);
-    if (Config->EMachine == EM_PPC64 && RI.getType(false) == R_PPC64_TOC) {
-      Out<ELFT>::RelaDyn->addReloc({R_PPC64_RELATIVE, C.OutSec, Offset, false,
-                                    nullptr,
-                                    (uintX_t)getPPC64TocBase() + Addend});
+    }
+    if (!Config->Pic || Target->isRelRelative(Type) || Expr == R_PC) {
+      if (Config->EMachine == EM_MIPS && Body.isLocal() &&
+          (Type == R_MIPS_GPREL16 || Type == R_MIPS_GPREL32))
+        Expr = R_MIPS_GP0;
+      C.Relocations.push_back({Expr, Type, Offset, Addend, &Body});
       continue;
     }
-    Out<ELFT>::RelaDyn->addReloc(
-        {Target->RelativeRel, C.OutSec, Offset, true, &Body, Addend});
+
+    AddDyn({Target->RelativeRel, C.OutSec, Offset, true, &Body, Addend});
+    C.Relocations.push_back({R_ABS, Type, Offset, Addend, &Body});
   }
 
   // Scan relocations for necessary thunks.
   if (Config->EMachine == EM_MIPS)
     scanRelocsForThunks(File, Rels);
 }
 
 template <class ELFT> void Writer<ELFT>::scanRelocs(InputSection<ELFT> &C) {
-  if (C.getSectionHdr()->sh_flags & SHF_ALLOC)
-    for (const Elf_Shdr *RelSec : C.RelocSections)
-      scanRelocs(C, *RelSec);
 }
 
 template <class ELFT>
 void Writer<ELFT>::scanRelocs(InputSectionBase<ELFT> &S,
                               const Elf_Shdr &RelSec) {
   ELFFile<ELFT> &EObj = S.getFile()->getObj();
   if (RelSec.sh_type == SHT_RELA)
     scanRelocs(S, EObj.relas(&RelSec));

test/ELF/tls-opt.s

 // DISASM-NEXT: 1102a: 48 c7 c0 fc ff ff ff movq $-4, %rax
 // DISASM-NEXT: 11031: 49 c7 c7 fc ff ff ff movq $-4, %r15
 // DISASM-NEXT: 11038: 48 8d 80 fc ff ff ff leaq -4(%rax), %rax
 // DISASM-NEXT: 1103f: 4d 8d bf fc ff ff ff leaq -4(%r15), %r15
 // DISASM-NEXT: 11046: 48 81 c4 fc ff ff ff addq $-4, %rsp
 // DISASM-NEXT: 1104d: 49 81 c4 fc ff ff ff addq $-4, %r12
 // Corrupred output:
 // DISASM-NEXT: 11054: 48 8d 80 f8 ff ff ff leaq -8(%rax), %rax
-// DISASM-NEXT: 1105b: 48 d1 81 c4 f8 ff ff rolq -1852(%rcx)
+// DISASM-NEXT: 1105b: 48 d1 81 c4 fc ff ff rolq -828(%rcx)
 // DISASM-NEXT: 11062: ff 48 d1 decl -47(%rax)
-// DISASM-NEXT: 11065: 81 c4 f8 ff ff ff addl $4294967288, %esp
+// DISASM-NEXT: 11065: 81 c4 fc ff ff ff addl $4294967292, %esp
 // LD to LE:
 // DISASM-NEXT: 1106b: 66 66 66 64 48 8b 04 25 00 00 00 00 movq %fs:0, %rax
 // DISASM-NEXT: 11077: 48 8d 88 f8 ff ff ff                leaq -8(%rax), %rcx
 // DISASM-NEXT: 1107e: 66 66 66 64 48 8b 04 25 00 00 00 00 movq %fs:0, %rax
 // DISASM-NEXT: 1108a: 48 8d 88 fc ff ff ff                leaq -4(%rax), %rcx
 // GD to LE:
 // DISASM-NEXT: 11091: 64 48 8b 04 25 00 00 00 00          movq %fs:0, %rax
 // DISASM-NEXT: 1109a: 48 8d 80 f8 ff ff ff                leaq -8(%rax), %rax