Also, remove all the manual definition of
GCC_HAVE_SYNC_COMPARE_AND_SWAP_* macros. Instead, define it based on
MaxAtomicInlineWidth, just like the GCC_ATOMIC_*_LOCK_FREE macros.
Previously, the __GCC_HAVE_SYNC_COMPARE_AND_SWAP_* defines had been
computed separately, and *were* being set appropriately for older x86
targets, while MaxAtomicInlineWidth was not.
(Note the one FIXME comment: __GCC_ATOMIC_LLONG_LOCK_FREE is (still) set
improperly for i586, due to checking alignment where it ought not to.)
Test changes of note:
A few test invocations of clang -cc1 needed to have a "-target-cpu i686"
argument added -- the Driver would do so automatically based on the
"i686" in the triple, but in the tests cases cc1 invocations, it was
Some of the OpenMP tests needed a "-target-cpu core2" added: they were
assuming that cmpxchg16b was available, even though it's not in the base
An ARM test was asserting that V8M doesn't have
__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1. This was wrong: V8M *does* support