Add support to detect arm hard float ABI based binaries for ABISysV_arm

[omjavaid]

Summary

This patch adds logic to detect if underlying binary is using arm hard float abi and use that information while handling return values in ABISysV_arm.

This patch only handles float and double passed using floating point registers.

More return types and argument passing will be handled in a follow up patches.

[tberghammer]

Looks good with a few nits inline

source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp

418 ↗

(On Diff #46126)

(nit): I would suggest to pass in the thread by reference because the function have no meaning with a NULL thread

427 ↗

(On Diff #46126)

This will break if we add a new (independent) architecture flag for arm in the future. Please only check if the given bit is set instead of comparing for equality.

427–430 ↗

(On Diff #46126)

(nit): You can write it much simpler like this:

return (arch.GetFlags() & ArchSpec::eARM_abi_hard_float) != 0;

539 ↗

(On Diff #46126)

(nit); Please revert the order of the if and the else case so you don't have to negate the condition

[clayborg]

Change over to use a "Thread &" as argument to "bool ABISysV_arm::IsArmHardFloat(Thread *)" and this is good to go.

[clayborg]

And fix all of the tberghammer's comments as well.

[omjavaid]

Updated after addressing concerns.

LGTM?

[tberghammer]

Looks good

[clayborg]

Looks good.

lldb/trunk/include/lldb/Core/ArchSpec.h

enum MIPSASE
         eMIPSAse_xpa        = 0x00001000,   // XPA ASE
         eMIPSAse_mask       = 0x00001fff,
         eMIPSABI_O32        = 0x00002000,
         eMIPSABI_N32        = 0x00004000,
         eMIPSABI_N64        = 0x00008000,
         eMIPSABI_mask       = 0x000ff000
     };
 
+    // ARM specific e_flags
+    enum ARMeflags
+    {
+        eARM_abi_soft_float = 0x00000200,
+        eARM_abi_hard_float = 0x00000400
+    };
+
     enum Core
     {
         eCore_arm_generic,
         eCore_arm_armv4,
         eCore_arm_armv4t,
         eCore_arm_armv5,
         eCore_arm_armv5e,
         eCore_arm_armv5t,

lldb/trunk/source/Plugins/ABI/SysV-arm/ABISysV_arm.h

FixCodeAddress (lldb::addr_t pc) override
         // ARM uses bit zero to signify a code address is thumb, so we must
         // strip bit zero in any code addresses.
         return pc & ~(lldb::addr_t)1;
     }
 
     const lldb_private::RegisterInfo *
     GetRegisterInfoArray (uint32_t &count) override;
 
+    bool
+    IsArmHardFloat (lldb_private::Thread &thread) const;
+
     //------------------------------------------------------------------
     // Static Functions
     //------------------------------------------------------------------
 
     static void
     Initialize();
     
     static void

lldb/trunk/source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp

GetReturnValuePassedInMemory(Thread &thread, RegisterContext* reg_ctx, size_t byte_size, Value& value)
 
     if (error.Fail())
         return false;
 
     value.SetBytes(buffer.GetBytes(), buffer.GetByteSize());
     return true;
 }
 
+bool
+ABISysV_arm::IsArmHardFloat (Thread &thread) const
+{
+    ProcessSP process_sp (thread.GetProcess());
+    if (process_sp)
+    {
+        const ArchSpec &arch (process_sp->GetTarget().GetArchitecture());
+
+        return (arch.GetFlags() & ArchSpec::eARM_abi_hard_float) != 0;
+    }
+
+    return false;
+}
+
 ValueObjectSP
 ABISysV_arm::GetReturnValueObjectImpl (Thread &thread,
                                        lldb_private::CompilerType &compiler_type) const
 {
     Value value;
     ValueObjectSP return_valobj_sp;
     
     if (!compiler_type)
else if (compiler_type.IsFloatingPointType(float_count, is_complex))
         {
             switch (bit_width)
             {
                 default:
                     return return_valobj_sp;
                 case 64:
                 {
                     static_assert(sizeof(double) == sizeof(uint64_t), "");
-                    const RegisterInfo *r1_reg_info = reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG2);
+
+                    if (IsArmHardFloat(thread))
+                    {
+                        RegisterValue reg_value;
+                        const RegisterInfo *d0_reg_info = reg_ctx->GetRegisterInfoByName("d0", 0);
+                        reg_ctx->ReadRegister(d0_reg_info, reg_value);
+                        value.GetScalar() = reg_value.GetAsDouble();
+                    }
+                    else
+                    {
                         uint64_t raw_value;
+                        const RegisterInfo *r1_reg_info = reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG2);
                         raw_value = reg_ctx->ReadRegisterAsUnsigned(r0_reg_info, 0) & UINT32_MAX;
                         raw_value |= ((uint64_t)(reg_ctx->ReadRegisterAsUnsigned(r1_reg_info, 0) & UINT32_MAX)) << 32;
                         value.GetScalar() = *reinterpret_cast<double*>(&raw_value);
+                    }
                     break;
                 }
                 case 16: // Half precision returned after a conversion to single precision
                 case 32:
                 {
                     static_assert(sizeof(float) == sizeof(uint32_t), "");
-                    uint32_t raw_value = reg_ctx->ReadRegisterAsUnsigned(r0_reg_info, 0) & UINT32_MAX;
+
+                    if (IsArmHardFloat(thread))
+                    {
+                        RegisterValue reg_value;
+                        const RegisterInfo *s0_reg_info = reg_ctx->GetRegisterInfoByName("s0", 0);
+                        reg_ctx->ReadRegister(s0_reg_info, reg_value);
+                        value.GetScalar() = reg_value.GetAsFloat();
+                    }
+                    else
+                    {
+                        uint32_t raw_value;
+                        raw_value = reg_ctx->ReadRegisterAsUnsigned(r0_reg_info, 0) & UINT32_MAX;
                         value.GetScalar() = *reinterpret_cast<float*>(&raw_value);
+                    }
                     break;
                 }
             }
         }
         else
         {
             // not handled yet
             return return_valobj_sp;

lldb/trunk/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp

if (arch_spec.GetMachine() == llvm::Triple::mips || arch_spec.GetMachine() == llvm::Triple::mipsel
             case llvm::ELF::EF_MIPS_ARCH_ASE_MDMX:
                 arch_spec.SetFlags (ArchSpec::eMIPSAse_mdmx);
                 break;
             default:
                 break;
         }
     }
 
+    if (arch_spec.GetMachine() == llvm::Triple::arm ||
+        arch_spec.GetMachine() == llvm::Triple::thumb)
+    {
+        if (header.e_flags & llvm::ELF::EF_ARM_SOFT_FLOAT)
+            arch_spec.SetFlags (ArchSpec::eARM_abi_soft_float);
+        else if (header.e_flags & llvm::ELF::EF_ARM_VFP_FLOAT)
+            arch_spec.SetFlags (ArchSpec::eARM_abi_hard_float);
+    }
+
     // If there are no section headers we are done.
     if (header.e_shnum == 0)
         return 0;
 
     Log *log(lldb_private::GetLogIfAllCategoriesSet (LIBLLDB_LOG_MODULES));
 
     section_headers.resize(header.e_shnum);
     if (section_headers.size() != header.e_shnum)