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Differential D157770

[RISCV][GISel] Make s32 a legal type for RV64 for any operation that has a W version.
ClosedPublic

Authored by craig.topper on Aug 11 2023, 7:58 PM.

Details

Reviewers
nitinjohnraj
reames
asb
arsenm
Commits
rGb41e75c8a422: [RISCV][GISel] Make s32 a legal type for RV64 for any operation that has a W…
Summary

My thought is that we can directly select W instructions using s32.

This will likely require combines and other optimizations eventually,
but this makes a simple starting point.

I'm slowly prototyping a similar approach for SelectionDAG.

Diff Detail

Event Timeline

craig.topper created this revision.Aug 11 2023, 7:58 PM
Herald added a project: Restricted Project. · View Herald TranscriptAug 11 2023, 7:58 PM
Herald added subscribers: jobnoorman, luke, VincentWu and 27 others. · View Herald Transcript
craig.topper requested review of this revision.Aug 11 2023, 7:58 PM
Herald added a project: Restricted Project. · View Herald TranscriptAug 11 2023, 7:58 PM
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Harbormaster completed remote builds in B252076: Diff 549567.Aug 11 2023, 9:36 PM
reames accepted this revision.Aug 14 2023, 9:22 AM

LGTM

For context, Craig and I chatted about general directions here for a good while on Friday. This is not a high confidence statement that we'll definitely end up with i32 legal on RV64. It's instead a low confidence guess as to where SDAG will be in about a year. If it turns out we're wrong, we'll reverse direction and move GISEL towards the current model that SDAG is using. We're so far from O3 code quality on GISEL that we don't expect to hit the code quality questions in practice to well beyond that rough 1yr timeline.

So basically, if you're looking at this later and think we went the wrong direction, it's entirely possible you're right.

This revision is now accepted and ready to land.Aug 14 2023, 9:22 AM
craig.topper updated this revision to Diff 550022.Aug 14 2023, 10:40 AM

Rebase

Harbormaster completed remote builds in B252426: Diff 550022.Aug 14 2023, 4:15 PM
craig.topper updated this revision to Diff 551325.Aug 17 2023, 4:55 PM

Rebase

Herald added a subscriber: sunshaoce. · View Herald TranscriptAug 17 2023, 4:55 PM
Harbormaster completed remote builds in B253351: Diff 551325.Aug 17 2023, 5:36 PM
craig.topper mentioned this in D76051: [RISCV][GlobalISel] Select register banks for GPR ALU instructions.Aug 17 2023, 11:01 PM
craig.topper updated this revision to Diff 551715.Aug 19 2023, 12:44 AM

Rebase

Harbormaster completed remote builds in B253631: Diff 551715.Aug 19 2023, 1:37 AM
This revision was landed with ongoing or failed builds.Aug 19 2023, 11:21 AM
Closed by commit rGb41e75c8a422: [RISCV][GISel] Make s32 a legal type for RV64 for any operation that has a W… (authored by craig.topper). · Explain Why
This revision was automatically updated to reflect the committed changes.
craig.topper added a commit: rGb41e75c8a422: [RISCV][GISel] Make s32 a legal type for RV64 for any operation that has a W….

Revision Contents

PathSize
llvm/
lib/
Target/
RISCV/
GISel/
46 lines
test/
CodeGen/
RISCV/
GlobalISel/
legalizer/
rv32/
66 lines
90 lines
184 lines
90 lines
rv64/
28 lines
85 lines
42 lines
158 lines
224 lines
71 lines
32 lines
28 lines
158 lines
30 lines
112 lines
28 lines

Diff 551778

llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp

Show All 25 LinesRISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST) {
const LLT p0 = LLT::pointer(0, XLen); const LLT p0 = LLT::pointer(0, XLen);
const LLT s1 = LLT::scalar(1); const LLT s1 = LLT::scalar(1);
const LLT s8 = LLT::scalar(8); const LLT s8 = LLT::scalar(8);
const LLT s16 = LLT::scalar(16); const LLT s16 = LLT::scalar(16);
const LLT s32 = LLT::scalar(32); const LLT s32 = LLT::scalar(32);
using namespace TargetOpcode; using namespace TargetOpcode;
getActionDefinitionsBuilder({G_ADD, G_SUB, G_AND, G_OR, G_XOR}) getActionDefinitionsBuilder({G_AND, G_OR, G_XOR})
.legalFor({XLenLLT}) .legalFor({XLenLLT})
.widenScalarToNextPow2(0) .widenScalarToNextPow2(0)
.clampScalar(0, XLenLLT, XLenLLT); .clampScalar(0, XLenLLT, XLenLLT);
getActionDefinitionsBuilder({G_ADD, G_SUB})
.legalFor({s32, XLenLLT})
.widenScalarToNextPow2(0)
.clampScalar(0, s32, XLenLLT);
getActionDefinitionsBuilder( getActionDefinitionsBuilder(
{G_UADDE, G_UADDO, G_USUBE, G_USUBO}) {G_UADDE, G_UADDO, G_USUBE, G_USUBO})
.lowerFor({{XLenLLT, s1}}); .lowerFor({{XLenLLT, s1}});
getActionDefinitionsBuilder({G_ASHR, G_LSHR, G_SHL}) getActionDefinitionsBuilder({G_ASHR, G_LSHR, G_SHL})
.legalFor({{XLenLLT, XLenLLT}}) .legalFor({{s32, s32}, {s32, XLenLLT}, {XLenLLT, XLenLLT}})
.widenScalarToNextPow2(0) .widenScalarToNextPow2(0)
.clampScalar(1, XLenLLT, XLenLLT) .clampScalar(1, s32, XLenLLT)
.clampScalar(0, XLenLLT, XLenLLT); .clampScalar(0, s32, XLenLLT);
if (ST.is64Bit())
getActionDefinitionsBuilder({G_ZEXT, G_SEXT, G_ANYEXT})
.legalFor({{XLenLLT, s32}})
.maxScalar(0, XLenLLT);
else
getActionDefinitionsBuilder({G_ZEXT, G_SEXT, G_ANYEXT}) getActionDefinitionsBuilder({G_ZEXT, G_SEXT, G_ANYEXT})
.maxScalar(0, XLenLLT); .maxScalar(0, XLenLLT);
getActionDefinitionsBuilder(G_SEXT_INREG) getActionDefinitionsBuilder(G_SEXT_INREG)
.legalFor({XLenLLT})
.maxScalar(0, XLenLLT) .maxScalar(0, XLenLLT)
.lower(); .lower();
// Merge/Unmerge // Merge/Unmerge
for (unsigned Op : {G_MERGE_VALUES, G_UNMERGE_VALUES}) { for (unsigned Op : {G_MERGE_VALUES, G_UNMERGE_VALUES}) {
unsigned BigTyIdx = Op == G_MERGE_VALUES ? 0 : 1; unsigned BigTyIdx = Op == G_MERGE_VALUES ? 0 : 1;
unsigned LitTyIdx = Op == G_MERGE_VALUES ? 1 : 0; unsigned LitTyIdx = Op == G_MERGE_VALUES ? 1 : 0;
getActionDefinitionsBuilder(Op) getActionDefinitionsBuilder(Op)
.widenScalarToNextPow2(LitTyIdx, XLen) .widenScalarToNextPow2(LitTyIdx, XLen)
.widenScalarToNextPow2(BigTyIdx, XLen) .widenScalarToNextPow2(BigTyIdx, XLen)
.clampScalar(LitTyIdx, XLenLLT, XLenLLT) .clampScalar(LitTyIdx, XLenLLT, XLenLLT)
.clampScalar(BigTyIdx, XLenLLT, XLenLLT); .clampScalar(BigTyIdx, XLenLLT, XLenLLT);
} }
getActionDefinitionsBuilder({G_CONSTANT, G_IMPLICIT_DEF}) getActionDefinitionsBuilder({G_CONSTANT, G_IMPLICIT_DEF})
.legalFor({XLenLLT, p0}) .legalFor({s32, XLenLLT, p0})
.widenScalarToNextPow2(0) .widenScalarToNextPow2(0)
.clampScalar(0, XLenLLT, XLenLLT); .clampScalar(0, s32, XLenLLT);
getActionDefinitionsBuilder(G_ICMP) getActionDefinitionsBuilder(G_ICMP)
.legalFor({{XLenLLT, XLenLLT}, {XLenLLT, p0}}) .legalFor({{XLenLLT, XLenLLT}, {XLenLLT, p0}})
.widenScalarToNextPow2(1) .widenScalarToNextPow2(1)
.clampScalar(1, XLenLLT, XLenLLT) .clampScalar(1, XLenLLT, XLenLLT)
.clampScalar(0, XLenLLT, XLenLLT); .clampScalar(0, XLenLLT, XLenLLT);
getActionDefinitionsBuilder(G_SELECT) getActionDefinitionsBuilder(G_SELECT)
.legalFor({{XLenLLT, XLenLLT}, {p0, XLenLLT}}) .legalFor({{XLenLLT, XLenLLT}, {p0, XLenLLT}})
.widenScalarToNextPow2(0) .widenScalarToNextPow2(0)
.clampScalar(0, XLenLLT, XLenLLT) .clampScalar(0, XLenLLT, XLenLLT)
.clampScalar(1, XLenLLT, XLenLLT); .clampScalar(1, XLenLLT, XLenLLT);
getActionDefinitionsBuilder({G_LOAD, G_STORE}) getActionDefinitionsBuilder({G_LOAD, G_STORE})
.legalForTypesWithMemDesc({{XLenLLT, p0, s8, 8}, .legalForTypesWithMemDesc({{s32, p0, s8, 8},
{s32, p0, s16, 16},
{s32, p0, s32, 32},
{XLenLLT, p0, s8, 8},
{XLenLLT, p0, s16, 16}, {XLenLLT, p0, s16, 16},
{XLenLLT, p0, s32, 32}, {XLenLLT, p0, s32, 32},
{XLenLLT, p0, XLenLLT, XLen}, {XLenLLT, p0, XLenLLT, XLen},
{p0, p0, XLenLLT, XLen}}) {p0, p0, XLenLLT, XLen}})
.clampScalar(0, XLenLLT, XLenLLT) .clampScalar(0, s32, XLenLLT)
.lower(); .lower();
auto &ZExtLoadActions = getActionDefinitionsBuilder(G_ZEXTLOAD) auto &ZExtLoadActions = getActionDefinitionsBuilder(G_ZEXTLOAD)
.legalForTypesWithMemDesc({{XLenLLT, p0, s8, 8}, .legalForTypesWithMemDesc({{s32, p0, s8, 8},
{s32, p0, s16, 16},
{XLenLLT, p0, s8, 8},
{XLenLLT, p0, s16, 16}}); {XLenLLT, p0, s16, 16}});
if (XLen == 64) if (XLen == 64)
ZExtLoadActions.legalForTypesWithMemDesc({{XLenLLT, p0, s32, 32}}); ZExtLoadActions.legalForTypesWithMemDesc({{XLenLLT, p0, s32, 32}});
ZExtLoadActions.lower(); ZExtLoadActions.lower();
getActionDefinitionsBuilder(G_PTR_ADD) getActionDefinitionsBuilder(G_PTR_ADD)
.legalFor({{p0, XLenLLT}}); .legalFor({{p0, XLenLLT}});
getActionDefinitionsBuilder(G_BRCOND) getActionDefinitionsBuilder(G_BRCOND)
.legalFor({XLenLLT}) .legalFor({XLenLLT})
.minScalar(0, XLenLLT); .minScalar(0, XLenLLT);
getActionDefinitionsBuilder(G_PHI) getActionDefinitionsBuilder(G_PHI)
.legalFor({p0, XLenLLT}) .legalFor({p0, XLenLLT})
.widenScalarToNextPow2(0) .widenScalarToNextPow2(0)
.clampScalar(0, XLenLLT, XLenLLT); .clampScalar(0, XLenLLT, XLenLLT);
getActionDefinitionsBuilder(G_GLOBAL_VALUE) getActionDefinitionsBuilder(G_GLOBAL_VALUE)
.legalFor({p0}); .legalFor({p0});
if (ST.hasStdExtM() || ST.hasStdExtZmmul()) { if (ST.hasStdExtM() || ST.hasStdExtZmmul()) {
getActionDefinitionsBuilder(G_MUL) getActionDefinitionsBuilder(G_MUL)
.legalFor({XLenLLT}) .legalFor({s32, XLenLLT})
.widenScalarToNextPow2(0) .widenScalarToNextPow2(0)
.clampScalar(0, XLenLLT, XLenLLT); .clampScalar(0, s32, XLenLLT);
// clang-format off // clang-format off
getActionDefinitionsBuilder({G_SMULH, G_UMULH}) getActionDefinitionsBuilder({G_SMULH, G_UMULH})
.legalFor({XLenLLT}) .legalFor({XLenLLT})
.lower(); .lower();
// clang-format on // clang-format on
} else { } else {
getActionDefinitionsBuilder(G_MUL) getActionDefinitionsBuilder(G_MUL)
.libcallFor({XLenLLT, DoubleXLenLLT}) .libcallFor({XLenLLT, DoubleXLenLLT})
.widenScalarToNextPow2(0) .widenScalarToNextPow2(0)
.clampScalar(0, XLenLLT, DoubleXLenLLT); .clampScalar(0, XLenLLT, DoubleXLenLLT);
getActionDefinitionsBuilder({G_SMULH, G_UMULH}).lowerFor({XLenLLT}); getActionDefinitionsBuilder({G_SMULH, G_UMULH}).lowerFor({XLenLLT});
} }
if (ST.hasStdExtM()) { if (ST.hasStdExtM()) {
getActionDefinitionsBuilder({G_UDIV, G_SDIV, G_UREM, G_SREM}) getActionDefinitionsBuilder({G_UDIV, G_SDIV, G_UREM, G_SREM})
.legalFor({XLenLLT}) .legalFor({s32, XLenLLT})
.libcallFor({DoubleXLenLLT}) .libcallFor({DoubleXLenLLT})
.clampScalar(0, XLenLLT, DoubleXLenLLT) .clampScalar(0, s32, DoubleXLenLLT)
.widenScalarToNextPow2(0); .widenScalarToNextPow2(0);
} else { } else {
getActionDefinitionsBuilder({G_UDIV, G_SDIV, G_UREM, G_SREM}) getActionDefinitionsBuilder({G_UDIV, G_SDIV, G_UREM, G_SREM})
.libcallFor({XLenLLT, DoubleXLenLLT}) .libcallFor({XLenLLT, DoubleXLenLLT})
.clampScalar(0, XLenLLT, DoubleXLenLLT) .clampScalar(0, XLenLLT, DoubleXLenLLT)
.widenScalarToNextPow2(0); .widenScalarToNextPow2(0);
} }
getLegacyLegalizerInfo().computeTables(); getLegacyLegalizerInfo().computeTables();
} }

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-ashr.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
--- ---
name: ashr_i7 name: ashr_i7
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: ashr_i7 ; CHECK-LABEL: name: ashr_i7
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 127 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 127
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 7 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 25
; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SEXT_INREG]], [[AND]](s32) ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C1]](s32)
; CHECK-NEXT: $x10 = COPY [[ASHR]](s32) ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C1]](s32)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[ASHR]], [[AND]](s32)
; CHECK-NEXT: $x10 = COPY [[ASHR1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s7) = G_TRUNC %0(s32) %2:_(s7) = G_TRUNC %0(s32)
%3:_(s7) = G_TRUNC %1(s32) %3:_(s7) = G_TRUNC %1(s32)
%4:_(s7) = G_ASHR %2, %3 %4:_(s7) = G_ASHR %2, %3
%5:_(s32) = G_ANYEXT %4(s7) %5:_(s32) = G_ANYEXT %4(s7)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: ashr_i8 name: ashr_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: ashr_i8 ; CHECK-LABEL: name: ashr_i8
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 8 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SEXT_INREG]], [[AND]](s32) ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C1]](s32)
; CHECK-NEXT: $x10 = COPY [[ASHR]](s32) ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C1]](s32)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[ASHR]], [[AND]](s32)
; CHECK-NEXT: $x10 = COPY [[ASHR1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s8) = G_TRUNC %0(s32) %2:_(s8) = G_TRUNC %0(s32)
%3:_(s8) = G_TRUNC %1(s32) %3:_(s8) = G_TRUNC %1(s32)
%4:_(s8) = G_ASHR %2, %3 %4:_(s8) = G_ASHR %2, %3
%5:_(s32) = G_ANYEXT %4(s8) %5:_(s32) = G_ANYEXT %4(s8)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: ashr_i16 name: ashr_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: ashr_i16 ; CHECK-LABEL: name: ashr_i16
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 16 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SEXT_INREG]], [[AND]](s32) ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C1]](s32)
; CHECK-NEXT: $x10 = COPY [[ASHR]](s32) ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C1]](s32)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[ASHR]], [[AND]](s32)
; CHECK-NEXT: $x10 = COPY [[ASHR1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s16) = G_TRUNC %0(s32) %2:_(s16) = G_TRUNC %0(s32)
%3:_(s16) = G_TRUNC %1(s32) %3:_(s16) = G_TRUNC %1(s32)
%4:_(s16) = G_ASHR %2, %3 %4:_(s16) = G_ASHR %2, %3
%5:_(s32) = G_ANYEXT %4(s16) %5:_(s32) = G_ANYEXT %4(s16)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
Show All 20 Lines
--- ---
name: ashr_i48 name: ashr_i48
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: ashr_i48 ; CHECK-LABEL: name: ashr_i48
; CHECK: %xlo:_(s32) = COPY $x10 ; CHECK: %xlo:_(s32) = COPY $x10
; CHECK-NEXT: %xhi:_(s32) = COPY $x11 ; CHECK-NEXT: %xhi:_(s32) = COPY $x11
; CHECK-NEXT: %ylo:_(s32) = COPY $x12 ; CHECK-NEXT: %ylo:_(s32) = COPY $x12
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG %xhi, 16 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL %xhi, [[C]](s32)
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB %ylo, [[C]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], %ylo ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB %ylo, [[C1]]
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %ylo(s32), [[C]] ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C1]], %ylo
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %ylo(s32), [[C1]] ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SEXT_INREG]], %ylo(s32) ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %ylo(s32), [[C1]]
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %ylo(s32), [[C2]]
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[ASHR]], %ylo(s32)
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR %xlo, %ylo(s32) ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR %xlo, %ylo(s32)
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[SEXT_INREG]], [[SUB1]](s32) ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[ASHR]], [[SUB1]](s32)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL]] ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL1]]
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 31 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SEXT_INREG]], [[C2]](s32) ; CHECK-NEXT: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[ASHR]], [[C3]](s32)
; CHECK-NEXT: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[SEXT_INREG]], [[SUB]](s32) ; CHECK-NEXT: [[ASHR3:%[0-9]+]]:_(s32) = G_ASHR [[ASHR]], [[SUB]](s32)
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ICMP]], [[C3]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[OR]], [[ASHR2]]
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 ; CHECK-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[ICMP1]], [[C4]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ICMP]], [[C4]]
; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[AND1]](s32), %xlo, [[SELECT]] ; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[OR]], [[ASHR3]]
; CHECK-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 ; CHECK-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[ICMP]], [[C5]] ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[ICMP1]], [[C5]]
; CHECK-NEXT: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[AND2]](s32), [[ASHR]], [[ASHR1]] ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[AND1]](s32), %xlo, [[SELECT]]
; CHECK-NEXT: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[ICMP]], [[C6]]
; CHECK-NEXT: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[AND2]](s32), [[ASHR1]], [[ASHR2]]
; CHECK-NEXT: $x10 = COPY [[SELECT1]](s32) ; CHECK-NEXT: $x10 = COPY [[SELECT1]](s32)
; CHECK-NEXT: $x11 = COPY [[SELECT2]](s32) ; CHECK-NEXT: $x11 = COPY [[SELECT2]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11 ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%xlo:_(s32) = COPY $x10 %xlo:_(s32) = COPY $x10
%xhi:_(s32) = COPY $x11 %xhi:_(s32) = COPY $x11
%ylo:_(s32) = COPY $x12 %ylo:_(s32) = COPY $x12
%yhi:_(s32) = COPY $x13 %yhi:_(s32) = COPY $x13
%x0:_(s64) = G_MERGE_VALUES %xlo(s32), %xhi(s32) %x0:_(s64) = G_MERGE_VALUES %xlo(s32), %xhi(s32)
▲ Show 20 Lines • Show All 193 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-div.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s -check-prefix=CHECK-I # RUN: | FileCheck %s -check-prefix=CHECK-I
# RUN: llc -mattr=+m -mtriple=riscv32 -run-pass=legalizer %s -o - \ # RUN: llc -mattr=+m -mtriple=riscv32 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s -check-prefix=CHECK-M # RUN: | FileCheck %s -check-prefix=CHECK-M
--- ---
name: sdiv_i7 name: sdiv_i7
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-I-LABEL: name: sdiv_i7 ; CHECK-I-LABEL: name: sdiv_i7
; CHECK-I: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK-I: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 7 ; CHECK-I-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 25
; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 7 ; CHECK-I-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-I-NEXT: $x10 = COPY [[SEXT_INREG]](s32) ; CHECK-I-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-I-NEXT: $x11 = COPY [[SEXT_INREG1]](s32) ; CHECK-I-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 25
; CHECK-I-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C1]](s32)
; CHECK-I-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s32)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s32)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divsi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divsi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32) ; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32)
; CHECK-I-NEXT: PseudoRET implicit $x10 ; CHECK-I-NEXT: PseudoRET implicit $x10
; ;
; CHECK-M-LABEL: name: sdiv_i7 ; CHECK-M-LABEL: name: sdiv_i7
; CHECK-M: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK-M: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 7 ; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 25
; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 7 ; CHECK-M-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-M-NEXT: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[SEXT_INREG]], [[SEXT_INREG1]] ; CHECK-M-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 25
; CHECK-M-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C1]](s32)
; CHECK-M-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-M-NEXT: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[ASHR]], [[ASHR1]]
; CHECK-M-NEXT: $x10 = COPY [[SDIV]](s32) ; CHECK-M-NEXT: $x10 = COPY [[SDIV]](s32)
; CHECK-M-NEXT: PseudoRET implicit $x10 ; CHECK-M-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s7) = G_TRUNC %0(s32) %2:_(s7) = G_TRUNC %0(s32)
%3:_(s7) = G_TRUNC %1(s32) %3:_(s7) = G_TRUNC %1(s32)
%4:_(s7) = G_SDIV %2, %3 %4:_(s7) = G_SDIV %2, %3
%5:_(s32) = G_ANYEXT %4(s7) %5:_(s32) = G_ANYEXT %4(s7)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: sdiv_i8 name: sdiv_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-I-LABEL: name: sdiv_i8 ; CHECK-I-LABEL: name: sdiv_i8
; CHECK-I: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK-I: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 8 ; CHECK-I-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 8 ; CHECK-I-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-I-NEXT: $x10 = COPY [[SEXT_INREG]](s32) ; CHECK-I-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-I-NEXT: $x11 = COPY [[SEXT_INREG1]](s32) ; CHECK-I-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; CHECK-I-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C1]](s32)
; CHECK-I-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s32)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s32)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divsi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divsi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32) ; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32)
; CHECK-I-NEXT: PseudoRET implicit $x10 ; CHECK-I-NEXT: PseudoRET implicit $x10
; ;
; CHECK-M-LABEL: name: sdiv_i8 ; CHECK-M-LABEL: name: sdiv_i8
; CHECK-M: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK-M: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 8 ; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 8 ; CHECK-M-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-M-NEXT: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[SEXT_INREG]], [[SEXT_INREG1]] ; CHECK-M-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; CHECK-M-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C1]](s32)
; CHECK-M-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-M-NEXT: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[ASHR]], [[ASHR1]]
; CHECK-M-NEXT: $x10 = COPY [[SDIV]](s32) ; CHECK-M-NEXT: $x10 = COPY [[SDIV]](s32)
; CHECK-M-NEXT: PseudoRET implicit $x10 ; CHECK-M-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s8) = G_TRUNC %0(s32) %2:_(s8) = G_TRUNC %0(s32)
%3:_(s8) = G_TRUNC %1(s32) %3:_(s8) = G_TRUNC %1(s32)
%4:_(s8) = G_SDIV %2, %3 %4:_(s8) = G_SDIV %2, %3
%5:_(s32) = G_ANYEXT %4(s8) %5:_(s32) = G_ANYEXT %4(s8)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: sdiv_i16 name: sdiv_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-I-LABEL: name: sdiv_i16 ; CHECK-I-LABEL: name: sdiv_i16
; CHECK-I: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK-I: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 16 ; CHECK-I-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 16 ; CHECK-I-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-I-NEXT: $x10 = COPY [[SEXT_INREG]](s32) ; CHECK-I-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-I-NEXT: $x11 = COPY [[SEXT_INREG1]](s32) ; CHECK-I-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-I-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C1]](s32)
; CHECK-I-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s32)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s32)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divsi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divsi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32) ; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32)
; CHECK-I-NEXT: PseudoRET implicit $x10 ; CHECK-I-NEXT: PseudoRET implicit $x10
; ;
; CHECK-M-LABEL: name: sdiv_i16 ; CHECK-M-LABEL: name: sdiv_i16
; CHECK-M: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK-M: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 16 ; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 16 ; CHECK-M-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-M-NEXT: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[SEXT_INREG]], [[SEXT_INREG1]] ; CHECK-M-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-M-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C1]](s32)
; CHECK-M-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-M-NEXT: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[ASHR]], [[ASHR1]]
; CHECK-M-NEXT: $x10 = COPY [[SDIV]](s32) ; CHECK-M-NEXT: $x10 = COPY [[SDIV]](s32)
; CHECK-M-NEXT: PseudoRET implicit $x10 ; CHECK-M-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s16) = G_TRUNC %0(s32) %2:_(s16) = G_TRUNC %0(s32)
%3:_(s16) = G_TRUNC %1(s32) %3:_(s16) = G_TRUNC %1(s32)
%4:_(s16) = G_SDIV %2, %3 %4:_(s16) = G_SDIV %2, %3
%5:_(s32) = G_ANYEXT %4(s16) %5:_(s32) = G_ANYEXT %4(s16)
Show All 32 Lines
name: sdiv_i48 name: sdiv_i48
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-I-LABEL: name: sdiv_i48 ; CHECK-I-LABEL: name: sdiv_i48
; CHECK-I: %xlo:_(s32) = COPY $x10 ; CHECK-I: %xlo:_(s32) = COPY $x10
; CHECK-I-NEXT: %xhi:_(s32) = COPY $x11 ; CHECK-I-NEXT: %xhi:_(s32) = COPY $x11
; CHECK-I-NEXT: %ylo:_(s32) = COPY $x12 ; CHECK-I-NEXT: %ylo:_(s32) = COPY $x12
; CHECK-I-NEXT: %yhi:_(s32) = COPY $x13 ; CHECK-I-NEXT: %yhi:_(s32) = COPY $x13
; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG %xhi, 16 ; CHECK-I-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG %yhi, 16 ; CHECK-I-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL %xhi, [[C]](s32)
; CHECK-I-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-I-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-I-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL %yhi, [[C1]](s32)
; CHECK-I-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-I-NEXT: $x10 = COPY %xlo(s32) ; CHECK-I-NEXT: $x10 = COPY %xlo(s32)
; CHECK-I-NEXT: $x11 = COPY [[SEXT_INREG]](s32) ; CHECK-I-NEXT: $x11 = COPY [[ASHR]](s32)
; CHECK-I-NEXT: $x12 = COPY %ylo(s32) ; CHECK-I-NEXT: $x12 = COPY %ylo(s32)
; CHECK-I-NEXT: $x13 = COPY [[SEXT_INREG1]](s32) ; CHECK-I-NEXT: $x13 = COPY [[ASHR1]](s32)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11 ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-I-NEXT: $x10 = COPY [[COPY]](s32) ; CHECK-I-NEXT: $x10 = COPY [[COPY]](s32)
; CHECK-I-NEXT: $x11 = COPY [[COPY1]](s32) ; CHECK-I-NEXT: $x11 = COPY [[COPY1]](s32)
; CHECK-I-NEXT: PseudoRET implicit $x10, implicit $x11 ; CHECK-I-NEXT: PseudoRET implicit $x10, implicit $x11
; ;
; CHECK-M-LABEL: name: sdiv_i48 ; CHECK-M-LABEL: name: sdiv_i48
; CHECK-M: %xlo:_(s32) = COPY $x10 ; CHECK-M: %xlo:_(s32) = COPY $x10
; CHECK-M-NEXT: %xhi:_(s32) = COPY $x11 ; CHECK-M-NEXT: %xhi:_(s32) = COPY $x11
; CHECK-M-NEXT: %ylo:_(s32) = COPY $x12 ; CHECK-M-NEXT: %ylo:_(s32) = COPY $x12
; CHECK-M-NEXT: %yhi:_(s32) = COPY $x13 ; CHECK-M-NEXT: %yhi:_(s32) = COPY $x13
; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG %xhi, 16 ; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG %yhi, 16 ; CHECK-M-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL %xhi, [[C]](s32)
; CHECK-M-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-M-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL %yhi, [[C1]](s32)
; CHECK-M-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-M-NEXT: $x10 = COPY %xlo(s32) ; CHECK-M-NEXT: $x10 = COPY %xlo(s32)
; CHECK-M-NEXT: $x11 = COPY [[SEXT_INREG]](s32) ; CHECK-M-NEXT: $x11 = COPY [[ASHR]](s32)
; CHECK-M-NEXT: $x12 = COPY %ylo(s32) ; CHECK-M-NEXT: $x12 = COPY %ylo(s32)
; CHECK-M-NEXT: $x13 = COPY [[SEXT_INREG1]](s32) ; CHECK-M-NEXT: $x13 = COPY [[ASHR1]](s32)
; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11 ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-M-NEXT: $x10 = COPY [[COPY]](s32) ; CHECK-M-NEXT: $x10 = COPY [[COPY]](s32)
; CHECK-M-NEXT: $x11 = COPY [[COPY1]](s32) ; CHECK-M-NEXT: $x11 = COPY [[COPY1]](s32)
; CHECK-M-NEXT: PseudoRET implicit $x10, implicit $x11 ; CHECK-M-NEXT: PseudoRET implicit $x10, implicit $x11
%xlo:_(s32) = COPY $x10 %xlo:_(s32) = COPY $x10
%xhi:_(s32) = COPY $x11 %xhi:_(s32) = COPY $x11
▲ Show 20 Lines • Show All 318 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-icmp.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
--- ---
name: cmp_sgt_i7 name: cmp_sgt_i7
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sgt_i7 ; CHECK-LABEL: name: cmp_sgt_i7
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 7 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 25
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 7 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sgt), [[SEXT_INREG]](s32), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 25
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C1]](s32)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sgt), [[ASHR]](s32), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s32) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s7) = G_TRUNC %0(s32) %2:_(s7) = G_TRUNC %0(s32)
%3:_(s7) = G_TRUNC %1(s32) %3:_(s7) = G_TRUNC %1(s32)
%4:_(s1) = G_ICMP intpred(sgt), %2(s7), %3 %4:_(s1) = G_ICMP intpred(sgt), %2(s7), %3
%5:_(s32) = G_ANYEXT %4(s1) %5:_(s32) = G_ANYEXT %4(s1)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: cmp_sgt_i8 name: cmp_sgt_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sgt_i8 ; CHECK-LABEL: name: cmp_sgt_i8
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 8 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 8 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sgt), [[SEXT_INREG]](s32), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C1]](s32)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sgt), [[ASHR]](s32), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s32) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s8) = G_TRUNC %0(s32) %2:_(s8) = G_TRUNC %0(s32)
%3:_(s8) = G_TRUNC %1(s32) %3:_(s8) = G_TRUNC %1(s32)
%4:_(s1) = G_ICMP intpred(sgt), %2(s8), %3 %4:_(s1) = G_ICMP intpred(sgt), %2(s8), %3
%5:_(s32) = G_ANYEXT %4(s1) %5:_(s32) = G_ANYEXT %4(s1)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: cmp_sgt_i16 name: cmp_sgt_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sgt_i16 ; CHECK-LABEL: name: cmp_sgt_i16
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 16 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 16 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sgt), [[SEXT_INREG]](s32), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C1]](s32)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sgt), [[ASHR]](s32), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s32) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s16) = G_TRUNC %0(s32) %2:_(s16) = G_TRUNC %0(s32)
%3:_(s16) = G_TRUNC %1(s32) %3:_(s16) = G_TRUNC %1(s32)
%4:_(s1) = G_ICMP intpred(sgt), %2(s16), %3 %4:_(s1) = G_ICMP intpred(sgt), %2(s16), %3
%5:_(s32) = G_ANYEXT %4(s1) %5:_(s32) = G_ANYEXT %4(s1)
Show All 23 Lines
name: cmp_sgt_i48 name: cmp_sgt_i48
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sgt_i48 ; CHECK-LABEL: name: cmp_sgt_i48
; CHECK: %xhi:_(s32) = COPY $x10 ; CHECK: %xhi:_(s32) = COPY $x10
; CHECK-NEXT: %xlo:_(s32) = COPY $x11 ; CHECK-NEXT: %xlo:_(s32) = COPY $x11
; CHECK-NEXT: %yhi:_(s32) = COPY $x12 ; CHECK-NEXT: %yhi:_(s32) = COPY $x12
; CHECK-NEXT: %ylo:_(s32) = COPY $x13 ; CHECK-NEXT: %ylo:_(s32) = COPY $x13
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG %xlo, 16 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG %ylo, 16 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL %xlo, [[C]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sgt), [[SEXT_INREG]](s32), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[SEXT_INREG]](s32), [[SEXT_INREG1]] ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL %ylo, [[C1]](s32)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sgt), [[ASHR]](s32), [[ASHR1]]
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[ASHR]](s32), [[ASHR1]]
; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(ugt), %xhi(s32), %yhi ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(ugt), %xhi(s32), %yhi
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ICMP1]], [[C]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ICMP1]], [[C2]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[ICMP2]], [[ICMP]] ; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[ICMP2]], [[ICMP]]
; CHECK-NEXT: $x10 = COPY [[SELECT]](s32) ; CHECK-NEXT: $x10 = COPY [[SELECT]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%xhi:_(s32) = COPY $x10 %xhi:_(s32) = COPY $x10
%xlo:_(s32) = COPY $x11 %xlo:_(s32) = COPY $x11
%yhi:_(s32) = COPY $x12 %yhi:_(s32) = COPY $x12
%ylo:_(s32) = COPY $x13 %ylo:_(s32) = COPY $x13
%x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32) %x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32)
Show All 37 Lines
... ...
--- ---
name: cmp_slt_i7 name: cmp_slt_i7
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_slt_i7 ; CHECK-LABEL: name: cmp_slt_i7
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 7 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 25
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 7 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[SEXT_INREG]](s32), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 25
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C1]](s32)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[ASHR]](s32), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s32) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s7) = G_TRUNC %0(s32) %2:_(s7) = G_TRUNC %0(s32)
%3:_(s7) = G_TRUNC %1(s32) %3:_(s7) = G_TRUNC %1(s32)
%4:_(s1) = G_ICMP intpred(slt), %2(s7), %3 %4:_(s1) = G_ICMP intpred(slt), %2(s7), %3
%5:_(s32) = G_ANYEXT %4(s1) %5:_(s32) = G_ANYEXT %4(s1)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: cmp_slt_i8 name: cmp_slt_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_slt_i8 ; CHECK-LABEL: name: cmp_slt_i8
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 8 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 8 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[SEXT_INREG]](s32), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C1]](s32)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[ASHR]](s32), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s32) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s8) = G_TRUNC %0(s32) %2:_(s8) = G_TRUNC %0(s32)
%3:_(s8) = G_TRUNC %1(s32) %3:_(s8) = G_TRUNC %1(s32)
%4:_(s1) = G_ICMP intpred(slt), %2(s8), %3 %4:_(s1) = G_ICMP intpred(slt), %2(s8), %3
%5:_(s32) = G_ANYEXT %4(s1) %5:_(s32) = G_ANYEXT %4(s1)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: cmp_slt_i16 name: cmp_slt_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_slt_i16 ; CHECK-LABEL: name: cmp_slt_i16
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 16 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 16 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[SEXT_INREG]](s32), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C1]](s32)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[ASHR]](s32), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s32) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s16) = G_TRUNC %0(s32) %2:_(s16) = G_TRUNC %0(s32)
%3:_(s16) = G_TRUNC %1(s32) %3:_(s16) = G_TRUNC %1(s32)
%4:_(s1) = G_ICMP intpred(slt), %2(s16), %3 %4:_(s1) = G_ICMP intpred(slt), %2(s16), %3
%5:_(s32) = G_ANYEXT %4(s1) %5:_(s32) = G_ANYEXT %4(s1)
Show All 23 Lines
name: cmp_slt_i48 name: cmp_slt_i48
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_slt_i48 ; CHECK-LABEL: name: cmp_slt_i48
; CHECK: %xhi:_(s32) = COPY $x10 ; CHECK: %xhi:_(s32) = COPY $x10
; CHECK-NEXT: %xlo:_(s32) = COPY $x11 ; CHECK-NEXT: %xlo:_(s32) = COPY $x11
; CHECK-NEXT: %yhi:_(s32) = COPY $x12 ; CHECK-NEXT: %yhi:_(s32) = COPY $x12
; CHECK-NEXT: %ylo:_(s32) = COPY $x13 ; CHECK-NEXT: %ylo:_(s32) = COPY $x13
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG %xlo, 16 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG %ylo, 16 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL %xlo, [[C]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[SEXT_INREG]](s32), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[SEXT_INREG]](s32), [[SEXT_INREG1]] ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL %ylo, [[C1]](s32)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[ASHR]](s32), [[ASHR1]]
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[ASHR]](s32), [[ASHR1]]
; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %xhi(s32), %yhi ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %xhi(s32), %yhi
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ICMP1]], [[C]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ICMP1]], [[C2]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[ICMP2]], [[ICMP]] ; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[ICMP2]], [[ICMP]]
; CHECK-NEXT: $x10 = COPY [[SELECT]](s32) ; CHECK-NEXT: $x10 = COPY [[SELECT]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%xhi:_(s32) = COPY $x10 %xhi:_(s32) = COPY $x10
%xlo:_(s32) = COPY $x11 %xlo:_(s32) = COPY $x11
%yhi:_(s32) = COPY $x12 %yhi:_(s32) = COPY $x12
%ylo:_(s32) = COPY $x13 %ylo:_(s32) = COPY $x13
%x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32) %x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32)
Show All 37 Lines
... ...
--- ---
name: cmp_sge_i7 name: cmp_sge_i7
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sge_i7 ; CHECK-LABEL: name: cmp_sge_i7
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 7 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 25
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 7 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sge), [[SEXT_INREG]](s32), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 25
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C1]](s32)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sge), [[ASHR]](s32), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s32) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s7) = G_TRUNC %0(s32) %2:_(s7) = G_TRUNC %0(s32)
%3:_(s7) = G_TRUNC %1(s32) %3:_(s7) = G_TRUNC %1(s32)
%4:_(s1) = G_ICMP intpred(sge), %2(s7), %3 %4:_(s1) = G_ICMP intpred(sge), %2(s7), %3
%5:_(s32) = G_ANYEXT %4(s1) %5:_(s32) = G_ANYEXT %4(s1)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: cmp_sge_i8 name: cmp_sge_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sge_i8 ; CHECK-LABEL: name: cmp_sge_i8
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 8 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 8 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sge), [[SEXT_INREG]](s32), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C1]](s32)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sge), [[ASHR]](s32), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s32) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s8) = G_TRUNC %0(s32) %2:_(s8) = G_TRUNC %0(s32)
%3:_(s8) = G_TRUNC %1(s32) %3:_(s8) = G_TRUNC %1(s32)
%4:_(s1) = G_ICMP intpred(sge), %2(s8), %3 %4:_(s1) = G_ICMP intpred(sge), %2(s8), %3
%5:_(s32) = G_ANYEXT %4(s1) %5:_(s32) = G_ANYEXT %4(s1)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: cmp_sge_i16 name: cmp_sge_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sge_i16 ; CHECK-LABEL: name: cmp_sge_i16
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 16 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 16 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sge), [[SEXT_INREG]](s32), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C1]](s32)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sge), [[ASHR]](s32), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s32) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s16) = G_TRUNC %0(s32) %2:_(s16) = G_TRUNC %0(s32)
%3:_(s16) = G_TRUNC %1(s32) %3:_(s16) = G_TRUNC %1(s32)
%4:_(s1) = G_ICMP intpred(sge), %2(s16), %3 %4:_(s1) = G_ICMP intpred(sge), %2(s16), %3
%5:_(s32) = G_ANYEXT %4(s1) %5:_(s32) = G_ANYEXT %4(s1)
Show All 23 Lines
name: cmp_sge_i48 name: cmp_sge_i48
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sge_i48 ; CHECK-LABEL: name: cmp_sge_i48
; CHECK: %xhi:_(s32) = COPY $x10 ; CHECK: %xhi:_(s32) = COPY $x10
; CHECK-NEXT: %xlo:_(s32) = COPY $x11 ; CHECK-NEXT: %xlo:_(s32) = COPY $x11
; CHECK-NEXT: %yhi:_(s32) = COPY $x12 ; CHECK-NEXT: %yhi:_(s32) = COPY $x12
; CHECK-NEXT: %ylo:_(s32) = COPY $x13 ; CHECK-NEXT: %ylo:_(s32) = COPY $x13
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG %xlo, 16 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG %ylo, 16 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL %xlo, [[C]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sge), [[SEXT_INREG]](s32), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[SEXT_INREG]](s32), [[SEXT_INREG1]] ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL %ylo, [[C1]](s32)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sge), [[ASHR]](s32), [[ASHR1]]
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[ASHR]](s32), [[ASHR1]]
; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(uge), %xhi(s32), %yhi ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(uge), %xhi(s32), %yhi
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ICMP1]], [[C]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ICMP1]], [[C2]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[ICMP2]], [[ICMP]] ; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[ICMP2]], [[ICMP]]
; CHECK-NEXT: $x10 = COPY [[SELECT]](s32) ; CHECK-NEXT: $x10 = COPY [[SELECT]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%xhi:_(s32) = COPY $x10 %xhi:_(s32) = COPY $x10
%xlo:_(s32) = COPY $x11 %xlo:_(s32) = COPY $x11
%yhi:_(s32) = COPY $x12 %yhi:_(s32) = COPY $x12
%ylo:_(s32) = COPY $x13 %ylo:_(s32) = COPY $x13
%x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32) %x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32)
Show All 37 Lines
... ...
--- ---
name: cmp_sle_i7 name: cmp_sle_i7
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sle_i7 ; CHECK-LABEL: name: cmp_sle_i7
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 7 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 25
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 7 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sle), [[SEXT_INREG]](s32), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 25
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C1]](s32)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sle), [[ASHR]](s32), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s32) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s7) = G_TRUNC %0(s32) %2:_(s7) = G_TRUNC %0(s32)
%3:_(s7) = G_TRUNC %1(s32) %3:_(s7) = G_TRUNC %1(s32)
%4:_(s1) = G_ICMP intpred(sle), %2(s7), %3 %4:_(s1) = G_ICMP intpred(sle), %2(s7), %3
%5:_(s32) = G_ANYEXT %4(s1) %5:_(s32) = G_ANYEXT %4(s1)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: cmp_sle_i8 name: cmp_sle_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sle_i8 ; CHECK-LABEL: name: cmp_sle_i8
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 8 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 8 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sle), [[SEXT_INREG]](s32), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C1]](s32)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sle), [[ASHR]](s32), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s32) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s8) = G_TRUNC %0(s32) %2:_(s8) = G_TRUNC %0(s32)
%3:_(s8) = G_TRUNC %1(s32) %3:_(s8) = G_TRUNC %1(s32)
%4:_(s1) = G_ICMP intpred(sle), %2(s8), %3 %4:_(s1) = G_ICMP intpred(sle), %2(s8), %3
%5:_(s32) = G_ANYEXT %4(s1) %5:_(s32) = G_ANYEXT %4(s1)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: cmp_sle_i16 name: cmp_sle_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sle_i16 ; CHECK-LABEL: name: cmp_sle_i16
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 16 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 16 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sle), [[SEXT_INREG]](s32), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C1]](s32)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sle), [[ASHR]](s32), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s32) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s16) = G_TRUNC %0(s32) %2:_(s16) = G_TRUNC %0(s32)
%3:_(s16) = G_TRUNC %1(s32) %3:_(s16) = G_TRUNC %1(s32)
%4:_(s1) = G_ICMP intpred(sle), %2(s16), %3 %4:_(s1) = G_ICMP intpred(sle), %2(s16), %3
%5:_(s32) = G_ANYEXT %4(s1) %5:_(s32) = G_ANYEXT %4(s1)
Show All 23 Lines
name: cmp_sle_i48 name: cmp_sle_i48
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sle_i48 ; CHECK-LABEL: name: cmp_sle_i48
; CHECK: %xhi:_(s32) = COPY $x10 ; CHECK: %xhi:_(s32) = COPY $x10
; CHECK-NEXT: %xlo:_(s32) = COPY $x11 ; CHECK-NEXT: %xlo:_(s32) = COPY $x11
; CHECK-NEXT: %yhi:_(s32) = COPY $x12 ; CHECK-NEXT: %yhi:_(s32) = COPY $x12
; CHECK-NEXT: %ylo:_(s32) = COPY $x13 ; CHECK-NEXT: %ylo:_(s32) = COPY $x13
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG %xlo, 16 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG %ylo, 16 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL %xlo, [[C]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sle), [[SEXT_INREG]](s32), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[SEXT_INREG]](s32), [[SEXT_INREG1]] ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL %ylo, [[C1]](s32)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sle), [[ASHR]](s32), [[ASHR1]]
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[ASHR]](s32), [[ASHR1]]
; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(ule), %xhi(s32), %yhi ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(ule), %xhi(s32), %yhi
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ICMP1]], [[C]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ICMP1]], [[C2]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[ICMP2]], [[ICMP]] ; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[ICMP2]], [[ICMP]]
; CHECK-NEXT: $x10 = COPY [[SELECT]](s32) ; CHECK-NEXT: $x10 = COPY [[SELECT]](s32)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%xhi:_(s32) = COPY $x10 %xhi:_(s32) = COPY $x10
%xlo:_(s32) = COPY $x11 %xlo:_(s32) = COPY $x11
%yhi:_(s32) = COPY $x12 %yhi:_(s32) = COPY $x12
%ylo:_(s32) = COPY $x13 %ylo:_(s32) = COPY $x13
%x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32) %x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32)
▲ Show 20 Lines • Show All 1,000 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-rem.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s -check-prefix=CHECK-I # RUN: | FileCheck %s -check-prefix=CHECK-I
# RUN: llc -mattr=+m -mtriple=riscv32 -run-pass=legalizer %s -o - \ # RUN: llc -mattr=+m -mtriple=riscv32 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s -check-prefix=CHECK-M # RUN: | FileCheck %s -check-prefix=CHECK-M
--- ---
name: srem_i7 name: srem_i7
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-I-LABEL: name: srem_i7 ; CHECK-I-LABEL: name: srem_i7
; CHECK-I: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK-I: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 7 ; CHECK-I-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 25
; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 7 ; CHECK-I-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-I-NEXT: $x10 = COPY [[SEXT_INREG]](s32) ; CHECK-I-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-I-NEXT: $x11 = COPY [[SEXT_INREG1]](s32) ; CHECK-I-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 25
; CHECK-I-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C1]](s32)
; CHECK-I-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s32)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s32)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__modsi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__modsi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32) ; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32)
; CHECK-I-NEXT: PseudoRET implicit $x10 ; CHECK-I-NEXT: PseudoRET implicit $x10
; ;
; CHECK-M-LABEL: name: srem_i7 ; CHECK-M-LABEL: name: srem_i7
; CHECK-M: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK-M: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 7 ; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 25
; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 7 ; CHECK-M-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-M-NEXT: [[SREM:%[0-9]+]]:_(s32) = G_SREM [[SEXT_INREG]], [[SEXT_INREG1]] ; CHECK-M-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 25
; CHECK-M-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C1]](s32)
; CHECK-M-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-M-NEXT: [[SREM:%[0-9]+]]:_(s32) = G_SREM [[ASHR]], [[ASHR1]]
; CHECK-M-NEXT: $x10 = COPY [[SREM]](s32) ; CHECK-M-NEXT: $x10 = COPY [[SREM]](s32)
; CHECK-M-NEXT: PseudoRET implicit $x10 ; CHECK-M-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s7) = G_TRUNC %0(s32) %2:_(s7) = G_TRUNC %0(s32)
%3:_(s7) = G_TRUNC %1(s32) %3:_(s7) = G_TRUNC %1(s32)
%4:_(s7) = G_SREM %2, %3 %4:_(s7) = G_SREM %2, %3
%5:_(s32) = G_ANYEXT %4(s7) %5:_(s32) = G_ANYEXT %4(s7)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: srem_i8 name: srem_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-I-LABEL: name: srem_i8 ; CHECK-I-LABEL: name: srem_i8
; CHECK-I: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK-I: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 8 ; CHECK-I-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 8 ; CHECK-I-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-I-NEXT: $x10 = COPY [[SEXT_INREG]](s32) ; CHECK-I-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-I-NEXT: $x11 = COPY [[SEXT_INREG1]](s32) ; CHECK-I-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; CHECK-I-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C1]](s32)
; CHECK-I-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s32)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s32)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__modsi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__modsi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32) ; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32)
; CHECK-I-NEXT: PseudoRET implicit $x10 ; CHECK-I-NEXT: PseudoRET implicit $x10
; ;
; CHECK-M-LABEL: name: srem_i8 ; CHECK-M-LABEL: name: srem_i8
; CHECK-M: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK-M: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 8 ; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 8 ; CHECK-M-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-M-NEXT: [[SREM:%[0-9]+]]:_(s32) = G_SREM [[SEXT_INREG]], [[SEXT_INREG1]] ; CHECK-M-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; CHECK-M-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C1]](s32)
; CHECK-M-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-M-NEXT: [[SREM:%[0-9]+]]:_(s32) = G_SREM [[ASHR]], [[ASHR1]]
; CHECK-M-NEXT: $x10 = COPY [[SREM]](s32) ; CHECK-M-NEXT: $x10 = COPY [[SREM]](s32)
; CHECK-M-NEXT: PseudoRET implicit $x10 ; CHECK-M-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s8) = G_TRUNC %0(s32) %2:_(s8) = G_TRUNC %0(s32)
%3:_(s8) = G_TRUNC %1(s32) %3:_(s8) = G_TRUNC %1(s32)
%4:_(s8) = G_SREM %2, %3 %4:_(s8) = G_SREM %2, %3
%5:_(s32) = G_ANYEXT %4(s8) %5:_(s32) = G_ANYEXT %4(s8)
$x10 = COPY %5(s32) $x10 = COPY %5(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: srem_i16 name: srem_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-I-LABEL: name: srem_i16 ; CHECK-I-LABEL: name: srem_i16
; CHECK-I: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK-I: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 16 ; CHECK-I-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 16 ; CHECK-I-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-I-NEXT: $x10 = COPY [[SEXT_INREG]](s32) ; CHECK-I-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-I-NEXT: $x11 = COPY [[SEXT_INREG1]](s32) ; CHECK-I-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-I-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C1]](s32)
; CHECK-I-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s32)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s32)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__modsi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__modsi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32) ; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32)
; CHECK-I-NEXT: PseudoRET implicit $x10 ; CHECK-I-NEXT: PseudoRET implicit $x10
; ;
; CHECK-M-LABEL: name: srem_i16 ; CHECK-M-LABEL: name: srem_i16
; CHECK-M: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK-M: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 16 ; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 16 ; CHECK-M-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK-M-NEXT: [[SREM:%[0-9]+]]:_(s32) = G_SREM [[SEXT_INREG]], [[SEXT_INREG1]] ; CHECK-M-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-M-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C1]](s32)
; CHECK-M-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-M-NEXT: [[SREM:%[0-9]+]]:_(s32) = G_SREM [[ASHR]], [[ASHR1]]
; CHECK-M-NEXT: $x10 = COPY [[SREM]](s32) ; CHECK-M-NEXT: $x10 = COPY [[SREM]](s32)
; CHECK-M-NEXT: PseudoRET implicit $x10 ; CHECK-M-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s16) = G_TRUNC %0(s32) %2:_(s16) = G_TRUNC %0(s32)
%3:_(s16) = G_TRUNC %1(s32) %3:_(s16) = G_TRUNC %1(s32)
%4:_(s16) = G_SREM %2, %3 %4:_(s16) = G_SREM %2, %3
%5:_(s32) = G_ANYEXT %4(s16) %5:_(s32) = G_ANYEXT %4(s16)
Show All 32 Lines
name: srem_i48 name: srem_i48
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-I-LABEL: name: srem_i48 ; CHECK-I-LABEL: name: srem_i48
; CHECK-I: %xlo:_(s32) = COPY $x10 ; CHECK-I: %xlo:_(s32) = COPY $x10
; CHECK-I-NEXT: %xhi:_(s32) = COPY $x11 ; CHECK-I-NEXT: %xhi:_(s32) = COPY $x11
; CHECK-I-NEXT: %ylo:_(s32) = COPY $x12 ; CHECK-I-NEXT: %ylo:_(s32) = COPY $x12
; CHECK-I-NEXT: %yhi:_(s32) = COPY $x13 ; CHECK-I-NEXT: %yhi:_(s32) = COPY $x13
; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG %xhi, 16 ; CHECK-I-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG %yhi, 16 ; CHECK-I-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL %xhi, [[C]](s32)
; CHECK-I-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-I-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-I-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL %yhi, [[C1]](s32)
; CHECK-I-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-I-NEXT: $x10 = COPY %xlo(s32) ; CHECK-I-NEXT: $x10 = COPY %xlo(s32)
; CHECK-I-NEXT: $x11 = COPY [[SEXT_INREG]](s32) ; CHECK-I-NEXT: $x11 = COPY [[ASHR]](s32)
; CHECK-I-NEXT: $x12 = COPY %ylo(s32) ; CHECK-I-NEXT: $x12 = COPY %ylo(s32)
; CHECK-I-NEXT: $x13 = COPY [[SEXT_INREG1]](s32) ; CHECK-I-NEXT: $x13 = COPY [[ASHR1]](s32)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11 ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-I-NEXT: $x10 = COPY [[COPY]](s32) ; CHECK-I-NEXT: $x10 = COPY [[COPY]](s32)
; CHECK-I-NEXT: $x11 = COPY [[COPY1]](s32) ; CHECK-I-NEXT: $x11 = COPY [[COPY1]](s32)
; CHECK-I-NEXT: PseudoRET implicit $x10, implicit $x11 ; CHECK-I-NEXT: PseudoRET implicit $x10, implicit $x11
; ;
; CHECK-M-LABEL: name: srem_i48 ; CHECK-M-LABEL: name: srem_i48
; CHECK-M: %xlo:_(s32) = COPY $x10 ; CHECK-M: %xlo:_(s32) = COPY $x10
; CHECK-M-NEXT: %xhi:_(s32) = COPY $x11 ; CHECK-M-NEXT: %xhi:_(s32) = COPY $x11
; CHECK-M-NEXT: %ylo:_(s32) = COPY $x12 ; CHECK-M-NEXT: %ylo:_(s32) = COPY $x12
; CHECK-M-NEXT: %yhi:_(s32) = COPY $x13 ; CHECK-M-NEXT: %yhi:_(s32) = COPY $x13
; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG %xhi, 16 ; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG %yhi, 16 ; CHECK-M-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL %xhi, [[C]](s32)
; CHECK-M-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-M-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL %yhi, [[C1]](s32)
; CHECK-M-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-M-NEXT: $x10 = COPY %xlo(s32) ; CHECK-M-NEXT: $x10 = COPY %xlo(s32)
; CHECK-M-NEXT: $x11 = COPY [[SEXT_INREG]](s32) ; CHECK-M-NEXT: $x11 = COPY [[ASHR]](s32)
; CHECK-M-NEXT: $x12 = COPY %ylo(s32) ; CHECK-M-NEXT: $x12 = COPY %ylo(s32)
; CHECK-M-NEXT: $x13 = COPY [[SEXT_INREG1]](s32) ; CHECK-M-NEXT: $x13 = COPY [[ASHR1]](s32)
; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11 ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-M-NEXT: $x10 = COPY [[COPY]](s32) ; CHECK-M-NEXT: $x10 = COPY [[COPY]](s32)
; CHECK-M-NEXT: $x11 = COPY [[COPY1]](s32) ; CHECK-M-NEXT: $x11 = COPY [[COPY1]](s32)
; CHECK-M-NEXT: PseudoRET implicit $x10, implicit $x11 ; CHECK-M-NEXT: PseudoRET implicit $x10, implicit $x11
%xlo:_(s32) = COPY $x10 %xlo:_(s32) = COPY $x10
%xhi:_(s32) = COPY $x11 %xhi:_(s32) = COPY $x11
▲ Show 20 Lines • Show All 318 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-add.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
--- ---
name: add_i8 name: add_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: add_i8 ; CHECK-LABEL: name: add_i8
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[COPY1]] ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: $x10 = COPY [[ADD]](s64) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[TRUNC]], [[TRUNC1]]
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ADD]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s8) = G_TRUNC %0(s64) %2:_(s8) = G_TRUNC %0(s64)
%3:_(s8) = G_TRUNC %1(s64) %3:_(s8) = G_TRUNC %1(s64)
%4:_(s8) = G_ADD %2, %3 %4:_(s8) = G_ADD %2, %3
%5:_(s64) = G_ANYEXT %4(s8) %5:_(s64) = G_ANYEXT %4(s8)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: add_i15 name: add_i15
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: add_i15 ; CHECK-LABEL: name: add_i15
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[COPY1]] ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: $x10 = COPY [[ADD]](s64) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[TRUNC]], [[TRUNC1]]
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ADD]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s15) = G_TRUNC %0(s64) %2:_(s15) = G_TRUNC %0(s64)
%3:_(s15) = G_TRUNC %1(s64) %3:_(s15) = G_TRUNC %1(s64)
%4:_(s15) = G_ADD %2, %3 %4:_(s15) = G_ADD %2, %3
%5:_(s64) = G_ANYEXT %4(s15) %5:_(s64) = G_ANYEXT %4(s15)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: add_i16 name: add_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: add_i16 ; CHECK-LABEL: name: add_i16
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[COPY1]] ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: $x10 = COPY [[ADD]](s64) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[TRUNC]], [[TRUNC1]]
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ADD]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s16) = G_TRUNC %0(s64) %2:_(s16) = G_TRUNC %0(s64)
%3:_(s16) = G_TRUNC %1(s64) %3:_(s16) = G_TRUNC %1(s64)
%4:_(s16) = G_ADD %2, %3 %4:_(s16) = G_ADD %2, %3
%5:_(s64) = G_ANYEXT %4(s16) %5:_(s64) = G_ANYEXT %4(s16)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: add_i32 name: add_i32
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: add_i32 ; CHECK-LABEL: name: add_i32
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[COPY1]] ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: $x10 = COPY [[ADD]](s64) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[TRUNC]], [[TRUNC1]]
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ADD]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s32) = G_TRUNC %0(s64) %2:_(s32) = G_TRUNC %0(s64)
%3:_(s32) = G_TRUNC %1(s64) %3:_(s32) = G_TRUNC %1(s64)
%4:_(s32) = G_ADD %2, %3 %4:_(s32) = G_ADD %2, %3
%5:_(s64) = G_ANYEXT %4(s32) %5:_(s64) = G_ANYEXT %4(s32)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
▲ Show 20 Lines • Show All 131 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-ashr.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
--- ---
name: ashr_i8 name: ashr_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: ashr_i8 ; CHECK-LABEL: name: ashr_i8
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 255 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]]
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 8 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SEXT_INREG]], [[AND]](s64) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: $x10 = COPY [[ASHR]](s64) ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC1]], [[C1]](s32)
; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C1]](s32)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[ASHR]], [[TRUNC]](s32)
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ASHR1]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s8) = G_TRUNC %0(s64) %2:_(s8) = G_TRUNC %0(s64)
%3:_(s8) = G_TRUNC %1(s64) %3:_(s8) = G_TRUNC %1(s64)
%4:_(s8) = G_ASHR %2, %3 %4:_(s8) = G_ASHR %2, %3
%5:_(s64) = G_ANYEXT %4(s8) %5:_(s64) = G_ANYEXT %4(s8)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: ashr_i15 name: ashr_i15
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: ashr_i15 ; CHECK-LABEL: name: ashr_i15
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32767 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32767
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]]
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 15 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SEXT_INREG]], [[AND]](s64) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: $x10 = COPY [[ASHR]](s64) ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 17
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC1]], [[C1]](s32)
; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C1]](s32)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[ASHR]], [[TRUNC]](s32)
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ASHR1]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s15) = G_TRUNC %0(s64) %2:_(s15) = G_TRUNC %0(s64)
%3:_(s15) = G_TRUNC %1(s64) %3:_(s15) = G_TRUNC %1(s64)
%4:_(s15) = G_ASHR %2, %3 %4:_(s15) = G_ASHR %2, %3
%5:_(s64) = G_ANYEXT %4(s15) %5:_(s64) = G_ANYEXT %4(s15)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: ashr_i16 name: ashr_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: ashr_i16 ; CHECK-LABEL: name: ashr_i16
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]]
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 16 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SEXT_INREG]], [[AND]](s64) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: $x10 = COPY [[ASHR]](s64) ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC1]], [[C1]](s32)
; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C1]](s32)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[ASHR]], [[TRUNC]](s32)
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ASHR1]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s16) = G_TRUNC %0(s64) %2:_(s16) = G_TRUNC %0(s64)
%3:_(s16) = G_TRUNC %1(s64) %3:_(s16) = G_TRUNC %1(s64)
%4:_(s16) = G_ASHR %2, %3 %4:_(s16) = G_ASHR %2, %3
%5:_(s64) = G_ANYEXT %4(s16) %5:_(s64) = G_ANYEXT %4(s16)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: ashr_i32 name: ashr_i32
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: ashr_i32 ; CHECK-LABEL: name: ashr_i32
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]] ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 32 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[TRUNC]], [[TRUNC1]](s32)
; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SEXT_INREG]], [[AND]](s64) ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ASHR]](s32)
; CHECK-NEXT: $x10 = COPY [[ASHR]](s64) ; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s32) = G_TRUNC %0(s64) %2:_(s32) = G_TRUNC %0(s64)
%3:_(s32) = G_TRUNC %1(s64) %3:_(s32) = G_TRUNC %1(s64)
%4:_(s32) = G_ASHR %2, %3 %4:_(s32) = G_ASHR %2, %3
%5:_(s64) = G_ANYEXT %4(s32) %5:_(s64) = G_ANYEXT %4(s32)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
Show All 20 Lines
--- ---
name: ashr_i72 name: ashr_i72
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: ashr_i72 ; CHECK-LABEL: name: ashr_i72
; CHECK: %x00:_(s64) = COPY $x10 ; CHECK: %x00:_(s64) = COPY $x10
; CHECK-NEXT: %x01:_(s64) = COPY $x11 ; CHECK-NEXT: %x01:_(s64) = COPY $x11
; CHECK-NEXT: %y00:_(s64) = COPY $x12 ; CHECK-NEXT: %y00:_(s64) = COPY $x12
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG %x01, 8 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 64 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL %x01, [[C]](s64)
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB %y00, [[C]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[C]], %y00 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB %y00, [[C1]]
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %y00(s64), [[C]] ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[C1]], %y00
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), %y00(s64), [[C1]] ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SEXT_INREG]], %y00(s64) ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %y00(s64), [[C1]]
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), %y00(s64), [[C2]]
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[ASHR]], %y00(s64)
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR %x00, %y00(s64) ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR %x00, %y00(s64)
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[SEXT_INREG]], [[SUB1]](s64) ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[ASHR]], [[SUB1]](s64)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[SHL]] ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[SHL1]]
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 63 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 63
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SEXT_INREG]], [[C2]](s64) ; CHECK-NEXT: [[ASHR2:%[0-9]+]]:_(s64) = G_ASHR [[ASHR]], [[C3]](s64)
; CHECK-NEXT: [[ASHR2:%[0-9]+]]:_(s64) = G_ASHR [[SEXT_INREG]], [[SUB]](s64) ; CHECK-NEXT: [[ASHR3:%[0-9]+]]:_(s64) = G_ASHR [[ASHR]], [[SUB]](s64)
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[ICMP]], [[C3]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[AND]](s64), [[OR]], [[ASHR2]]
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 ; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[ICMP1]], [[C4]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[ICMP]], [[C4]]
; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[AND1]](s64), %x00, [[SELECT]] ; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[AND]](s64), [[OR]], [[ASHR3]]
; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 ; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[ICMP]], [[C5]] ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[ICMP1]], [[C5]]
; CHECK-NEXT: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[AND2]](s64), [[ASHR]], [[ASHR1]] ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[AND1]](s64), %x00, [[SELECT]]
; CHECK-NEXT: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[ICMP]], [[C6]]
; CHECK-NEXT: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[AND2]](s64), [[ASHR1]], [[ASHR2]]
; CHECK-NEXT: $x10 = COPY [[SELECT1]](s64) ; CHECK-NEXT: $x10 = COPY [[SELECT1]](s64)
; CHECK-NEXT: $x11 = COPY [[SELECT2]](s64) ; CHECK-NEXT: $x11 = COPY [[SELECT2]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11 ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%x00:_(s64) = COPY $x10 %x00:_(s64) = COPY $x10
%x01:_(s64) = COPY $x11 %x01:_(s64) = COPY $x11
%y00:_(s64) = COPY $x12 %y00:_(s64) = COPY $x12
%y01:_(s64) = COPY $x13 %y01:_(s64) = COPY $x13
%x0:_(s128) = G_MERGE_VALUES %x00(s64), %x01 %x0:_(s128) = G_MERGE_VALUES %x00(s64), %x01
▲ Show 20 Lines • Show All 193 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-const.mir

Show First 20 Lines • Show All 132 Lines • ▼ Show 20 Lines bb.0.entry:
; CHECK: [[C:%[0-9]+]]:_(p0) = G_CONSTANT i64 0 ; CHECK: [[C:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
; CHECK-NEXT: $x10 = COPY [[C]](p0) ; CHECK-NEXT: $x10 = COPY [[C]](p0)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(p0) = G_CONSTANT i64 0 %0:_(p0) = G_CONSTANT i64 0
$x10 = COPY %0(p0) $x10 = COPY %0(p0)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
---
name: const_add_i32
body: |
bb.0.entry:
; CHECK-LABEL: name: const_add_i32
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -64769
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[TRUNC]], [[C]]
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ADD]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = G_CONSTANT i32 -64769
%1:_(s64) = COPY $x10
%2:_(s32) = G_TRUNC %1(s64)
%3:_(s32) = G_ADD %2, %0
%4:_(s64) = G_ANYEXT %3(s32)
$x10 = COPY %4(s64)
PseudoRET implicit $x10
...
---
name: const_add_i8
body: |
bb.0.entry:
; CHECK-LABEL: name: const_add_i8
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[TRUNC]], [[C]]
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ADD]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s8) = G_CONSTANT i8 1
%1:_(s64) = COPY $x10
%2:_(s8) = G_TRUNC %1(s64)
%3:_(s8) = G_ADD %2, %0
%4:_(s64) = G_ANYEXT %3(s8)
$x10 = COPY %4(s64)
PseudoRET implicit $x10
...

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-div.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s -check-prefix=CHECK-I # RUN: | FileCheck %s -check-prefix=CHECK-I
# RUN: llc -mattr=+m -mtriple=riscv64 -run-pass=legalizer %s -o - \ # RUN: llc -mattr=+m -mtriple=riscv64 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s -check-prefix=CHECK-M # RUN: | FileCheck %s -check-prefix=CHECK-M
--- ---
name: sdiv_i8 name: sdiv_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-I-LABEL: name: sdiv_i8 ; CHECK-I-LABEL: name: sdiv_i8
; CHECK-I: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-I: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 8 ; CHECK-I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 8 ; CHECK-I-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK-I-NEXT: $x10 = COPY [[SEXT_INREG]](s64) ; CHECK-I-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-I-NEXT: $x11 = COPY [[SEXT_INREG1]](s64) ; CHECK-I-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-I-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
; CHECK-I-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s64)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s64)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64) ; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
; CHECK-I-NEXT: PseudoRET implicit $x10 ; CHECK-I-NEXT: PseudoRET implicit $x10
; ;
; CHECK-M-LABEL: name: sdiv_i8 ; CHECK-M-LABEL: name: sdiv_i8
; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 8 ; CHECK-M-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 8 ; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; CHECK-M-NEXT: [[SDIV:%[0-9]+]]:_(s64) = G_SDIV [[SEXT_INREG]], [[SEXT_INREG1]] ; CHECK-M-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC]], [[C]](s32)
; CHECK-M-NEXT: $x10 = COPY [[SDIV]](s64) ; CHECK-M-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-M-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; CHECK-M-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[TRUNC1]], [[C1]](s32)
; CHECK-M-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-M-NEXT: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[ASHR]], [[ASHR1]]
; CHECK-M-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SDIV]](s32)
; CHECK-M-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10 ; CHECK-M-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s8) = G_TRUNC %0(s64) %2:_(s8) = G_TRUNC %0(s64)
%3:_(s8) = G_TRUNC %1(s64) %3:_(s8) = G_TRUNC %1(s64)
%4:_(s8) = G_SDIV %2, %3 %4:_(s8) = G_SDIV %2, %3
%5:_(s64) = G_ANYEXT %4(s8) %5:_(s64) = G_ANYEXT %4(s8)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: sdiv_i15 name: sdiv_i15
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-I-LABEL: name: sdiv_i15 ; CHECK-I-LABEL: name: sdiv_i15
; CHECK-I: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-I: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 15 ; CHECK-I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 49
; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 15 ; CHECK-I-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK-I-NEXT: $x10 = COPY [[SEXT_INREG]](s64) ; CHECK-I-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-I-NEXT: $x11 = COPY [[SEXT_INREG1]](s64) ; CHECK-I-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 49
; CHECK-I-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
; CHECK-I-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s64)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s64)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64) ; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
; CHECK-I-NEXT: PseudoRET implicit $x10 ; CHECK-I-NEXT: PseudoRET implicit $x10
; ;
; CHECK-M-LABEL: name: sdiv_i15 ; CHECK-M-LABEL: name: sdiv_i15
; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 15 ; CHECK-M-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 15 ; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 17
; CHECK-M-NEXT: [[SDIV:%[0-9]+]]:_(s64) = G_SDIV [[SEXT_INREG]], [[SEXT_INREG1]] ; CHECK-M-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC]], [[C]](s32)
; CHECK-M-NEXT: $x10 = COPY [[SDIV]](s64) ; CHECK-M-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-M-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 17
; CHECK-M-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[TRUNC1]], [[C1]](s32)
; CHECK-M-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-M-NEXT: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[ASHR]], [[ASHR1]]
; CHECK-M-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SDIV]](s32)
; CHECK-M-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10 ; CHECK-M-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s15) = G_TRUNC %0(s64) %2:_(s15) = G_TRUNC %0(s64)
%3:_(s15) = G_TRUNC %1(s64) %3:_(s15) = G_TRUNC %1(s64)
%4:_(s15) = G_SDIV %2, %3 %4:_(s15) = G_SDIV %2, %3
%5:_(s64) = G_ANYEXT %4(s15) %5:_(s64) = G_ANYEXT %4(s15)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: sdiv_i16 name: sdiv_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-I-LABEL: name: sdiv_i16 ; CHECK-I-LABEL: name: sdiv_i16
; CHECK-I: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-I: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 16 ; CHECK-I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 16 ; CHECK-I-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK-I-NEXT: $x10 = COPY [[SEXT_INREG]](s64) ; CHECK-I-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-I-NEXT: $x11 = COPY [[SEXT_INREG1]](s64) ; CHECK-I-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
; CHECK-I-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
; CHECK-I-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s64)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s64)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64) ; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
; CHECK-I-NEXT: PseudoRET implicit $x10 ; CHECK-I-NEXT: PseudoRET implicit $x10
; ;
; CHECK-M-LABEL: name: sdiv_i16 ; CHECK-M-LABEL: name: sdiv_i16
; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 16 ; CHECK-M-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 16 ; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-M-NEXT: [[SDIV:%[0-9]+]]:_(s64) = G_SDIV [[SEXT_INREG]], [[SEXT_INREG1]] ; CHECK-M-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC]], [[C]](s32)
; CHECK-M-NEXT: $x10 = COPY [[SDIV]](s64) ; CHECK-M-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-M-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-M-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[TRUNC1]], [[C1]](s32)
; CHECK-M-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-M-NEXT: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[ASHR]], [[ASHR1]]
; CHECK-M-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SDIV]](s32)
; CHECK-M-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10 ; CHECK-M-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s16) = G_TRUNC %0(s64) %2:_(s16) = G_TRUNC %0(s64)
%3:_(s16) = G_TRUNC %1(s64) %3:_(s16) = G_TRUNC %1(s64)
%4:_(s16) = G_SDIV %2, %3 %4:_(s16) = G_SDIV %2, %3
%5:_(s64) = G_ANYEXT %4(s16) %5:_(s64) = G_ANYEXT %4(s16)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: sdiv_i32 name: sdiv_i32
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-I-LABEL: name: sdiv_i32 ; CHECK-I-LABEL: name: sdiv_i32
; CHECK-I: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-I: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 32 ; CHECK-I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 32 ; CHECK-I-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK-I-NEXT: $x10 = COPY [[SEXT_INREG]](s64) ; CHECK-I-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-I-NEXT: $x11 = COPY [[SEXT_INREG1]](s64) ; CHECK-I-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; CHECK-I-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
; CHECK-I-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s64)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s64)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64) ; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
; CHECK-I-NEXT: PseudoRET implicit $x10 ; CHECK-I-NEXT: PseudoRET implicit $x10
; ;
; CHECK-M-LABEL: name: sdiv_i32 ; CHECK-M-LABEL: name: sdiv_i32
; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 32 ; CHECK-M-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 32 ; CHECK-M-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-M-NEXT: [[SDIV:%[0-9]+]]:_(s64) = G_SDIV [[SEXT_INREG]], [[SEXT_INREG1]] ; CHECK-M-NEXT: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[TRUNC]], [[TRUNC1]]
; CHECK-M-NEXT: $x10 = COPY [[SDIV]](s64) ; CHECK-M-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SDIV]](s32)
; CHECK-M-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10 ; CHECK-M-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s32) = G_TRUNC %0(s64) %2:_(s32) = G_TRUNC %0(s64)
%3:_(s32) = G_TRUNC %1(s64) %3:_(s32) = G_TRUNC %1(s64)
%4:_(s32) = G_SDIV %2, %3 %4:_(s32) = G_SDIV %2, %3
%5:_(s64) = G_ANYEXT %4(s32) %5:_(s64) = G_ANYEXT %4(s32)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
Show All 31 Lines
name: sdiv_i72 name: sdiv_i72
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-I-LABEL: name: sdiv_i72 ; CHECK-I-LABEL: name: sdiv_i72
; CHECK-I: %xlo:_(s64) = COPY $x10 ; CHECK-I: %xlo:_(s64) = COPY $x10
; CHECK-I-NEXT: %xhi:_(s64) = COPY $x11 ; CHECK-I-NEXT: %xhi:_(s64) = COPY $x11
; CHECK-I-NEXT: %ylo:_(s64) = COPY $x12 ; CHECK-I-NEXT: %ylo:_(s64) = COPY $x12
; CHECK-I-NEXT: %yhi:_(s64) = COPY $x13 ; CHECK-I-NEXT: %yhi:_(s64) = COPY $x13
; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG %xhi, 8 ; CHECK-I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG %yhi, 8 ; CHECK-I-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL %xhi, [[C]](s64)
; CHECK-I-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-I-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-I-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL %yhi, [[C1]](s64)
; CHECK-I-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-I-NEXT: $x10 = COPY %xlo(s64) ; CHECK-I-NEXT: $x10 = COPY %xlo(s64)
; CHECK-I-NEXT: $x11 = COPY [[SEXT_INREG]](s64) ; CHECK-I-NEXT: $x11 = COPY [[ASHR]](s64)
; CHECK-I-NEXT: $x12 = COPY %ylo(s64) ; CHECK-I-NEXT: $x12 = COPY %ylo(s64)
; CHECK-I-NEXT: $x13 = COPY [[SEXT_INREG1]](s64) ; CHECK-I-NEXT: $x13 = COPY [[ASHR1]](s64)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divti3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11 ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divti3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-I-NEXT: $x10 = COPY [[COPY]](s64) ; CHECK-I-NEXT: $x10 = COPY [[COPY]](s64)
; CHECK-I-NEXT: $x11 = COPY [[COPY1]](s64) ; CHECK-I-NEXT: $x11 = COPY [[COPY1]](s64)
; CHECK-I-NEXT: PseudoRET implicit $x10, implicit $x11 ; CHECK-I-NEXT: PseudoRET implicit $x10, implicit $x11
; ;
; CHECK-M-LABEL: name: sdiv_i72 ; CHECK-M-LABEL: name: sdiv_i72
; CHECK-M: %xlo:_(s64) = COPY $x10 ; CHECK-M: %xlo:_(s64) = COPY $x10
; CHECK-M-NEXT: %xhi:_(s64) = COPY $x11 ; CHECK-M-NEXT: %xhi:_(s64) = COPY $x11
; CHECK-M-NEXT: %ylo:_(s64) = COPY $x12 ; CHECK-M-NEXT: %ylo:_(s64) = COPY $x12
; CHECK-M-NEXT: %yhi:_(s64) = COPY $x13 ; CHECK-M-NEXT: %yhi:_(s64) = COPY $x13
; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG %xhi, 8 ; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG %yhi, 8 ; CHECK-M-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL %xhi, [[C]](s64)
; CHECK-M-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-M-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL %yhi, [[C1]](s64)
; CHECK-M-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-M-NEXT: $x10 = COPY %xlo(s64) ; CHECK-M-NEXT: $x10 = COPY %xlo(s64)
; CHECK-M-NEXT: $x11 = COPY [[SEXT_INREG]](s64) ; CHECK-M-NEXT: $x11 = COPY [[ASHR]](s64)
; CHECK-M-NEXT: $x12 = COPY %ylo(s64) ; CHECK-M-NEXT: $x12 = COPY %ylo(s64)
; CHECK-M-NEXT: $x13 = COPY [[SEXT_INREG1]](s64) ; CHECK-M-NEXT: $x13 = COPY [[ASHR1]](s64)
; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__divti3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11 ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__divti3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-M-NEXT: $x10 = COPY [[COPY]](s64) ; CHECK-M-NEXT: $x10 = COPY [[COPY]](s64)
; CHECK-M-NEXT: $x11 = COPY [[COPY1]](s64) ; CHECK-M-NEXT: $x11 = COPY [[COPY1]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10, implicit $x11 ; CHECK-M-NEXT: PseudoRET implicit $x10, implicit $x11
%xlo:_(s64) = COPY $x10 %xlo:_(s64) = COPY $x10
%xhi:_(s64) = COPY $x11 %xhi:_(s64) = COPY $x11
▲ Show 20 Lines • Show All 77 Lines • ▼ Show 20 Lines bb.0.entry:
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64) ; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
; CHECK-I-NEXT: PseudoRET implicit $x10 ; CHECK-I-NEXT: PseudoRET implicit $x10
; ;
; CHECK-M-LABEL: name: udiv_i8 ; CHECK-M-LABEL: name: udiv_i8
; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 255 ; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]] ; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
; CHECK-M-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 255 ; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]] ; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]]
; CHECK-M-NEXT: [[UDIV:%[0-9]+]]:_(s64) = G_UDIV [[AND]], [[AND1]] ; CHECK-M-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[AND1]](s64)
; CHECK-M-NEXT: $x10 = COPY [[UDIV]](s64) ; CHECK-M-NEXT: [[UDIV:%[0-9]+]]:_(s32) = G_UDIV [[TRUNC]], [[TRUNC1]]
; CHECK-M-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UDIV]](s32)
; CHECK-M-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10 ; CHECK-M-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s8) = G_TRUNC %0(s64) %2:_(s8) = G_TRUNC %0(s64)
%3:_(s8) = G_TRUNC %1(s64) %3:_(s8) = G_TRUNC %1(s64)
%4:_(s8) = G_UDIV %2, %3 %4:_(s8) = G_UDIV %2, %3
%5:_(s64) = G_ANYEXT %4(s8) %5:_(s64) = G_ANYEXT %4(s8)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
Show All 18 Lines bb.0.entry:
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64) ; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
; CHECK-I-NEXT: PseudoRET implicit $x10 ; CHECK-I-NEXT: PseudoRET implicit $x10
; ;
; CHECK-M-LABEL: name: udiv_i15 ; CHECK-M-LABEL: name: udiv_i15
; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32767 ; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32767
; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]] ; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
; CHECK-M-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32767 ; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32767
; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]] ; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]]
; CHECK-M-NEXT: [[UDIV:%[0-9]+]]:_(s64) = G_UDIV [[AND]], [[AND1]] ; CHECK-M-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[AND1]](s64)
; CHECK-M-NEXT: $x10 = COPY [[UDIV]](s64) ; CHECK-M-NEXT: [[UDIV:%[0-9]+]]:_(s32) = G_UDIV [[TRUNC]], [[TRUNC1]]
; CHECK-M-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UDIV]](s32)
; CHECK-M-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10 ; CHECK-M-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s15) = G_TRUNC %0(s64) %2:_(s15) = G_TRUNC %0(s64)
%3:_(s15) = G_TRUNC %1(s64) %3:_(s15) = G_TRUNC %1(s64)
%4:_(s15) = G_UDIV %2, %3 %4:_(s15) = G_UDIV %2, %3
%5:_(s64) = G_ANYEXT %4(s15) %5:_(s64) = G_ANYEXT %4(s15)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
Show All 18 Lines bb.0.entry:
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64) ; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
; CHECK-I-NEXT: PseudoRET implicit $x10 ; CHECK-I-NEXT: PseudoRET implicit $x10
; ;
; CHECK-M-LABEL: name: udiv_i16 ; CHECK-M-LABEL: name: udiv_i16
; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535 ; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]] ; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
; CHECK-M-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535 ; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]] ; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]]
; CHECK-M-NEXT: [[UDIV:%[0-9]+]]:_(s64) = G_UDIV [[AND]], [[AND1]] ; CHECK-M-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[AND1]](s64)
; CHECK-M-NEXT: $x10 = COPY [[UDIV]](s64) ; CHECK-M-NEXT: [[UDIV:%[0-9]+]]:_(s32) = G_UDIV [[TRUNC]], [[TRUNC1]]
; CHECK-M-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UDIV]](s32)
; CHECK-M-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10 ; CHECK-M-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s16) = G_TRUNC %0(s64) %2:_(s16) = G_TRUNC %0(s64)
%3:_(s16) = G_TRUNC %1(s64) %3:_(s16) = G_TRUNC %1(s64)
%4:_(s16) = G_UDIV %2, %3 %4:_(s16) = G_UDIV %2, %3
%5:_(s64) = G_ANYEXT %4(s16) %5:_(s64) = G_ANYEXT %4(s16)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
Show All 16 Lines bb.0.entry:
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__udivdi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__udivdi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64) ; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
; CHECK-I-NEXT: PseudoRET implicit $x10 ; CHECK-I-NEXT: PseudoRET implicit $x10
; ;
; CHECK-M-LABEL: name: udiv_i32 ; CHECK-M-LABEL: name: udiv_i32
; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295 ; CHECK-M-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]] ; CHECK-M-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295 ; CHECK-M-NEXT: [[UDIV:%[0-9]+]]:_(s32) = G_UDIV [[TRUNC]], [[TRUNC1]]
; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]] ; CHECK-M-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UDIV]](s32)
; CHECK-M-NEXT: [[UDIV:%[0-9]+]]:_(s64) = G_UDIV [[AND]], [[AND1]] ; CHECK-M-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-M-NEXT: $x10 = COPY [[UDIV]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10 ; CHECK-M-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s32) = G_TRUNC %0(s64) %2:_(s32) = G_TRUNC %0(s64)
%3:_(s32) = G_TRUNC %1(s64) %3:_(s32) = G_TRUNC %1(s64)
%4:_(s32) = G_UDIV %2, %3 %4:_(s32) = G_UDIV %2, %3
%5:_(s64) = G_ANYEXT %4(s32) %5:_(s64) = G_ANYEXT %4(s32)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
▲ Show 20 Lines • Show All 145 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-icmp.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
--- ---
name: cmp_sgt_i8 name: cmp_sgt_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sgt_i8 ; CHECK-LABEL: name: cmp_sgt_i8
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 8 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 8 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sgt), [[SEXT_INREG]](s64), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sgt), [[ASHR]](s64), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s64) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s8) = G_TRUNC %0(s64) %2:_(s8) = G_TRUNC %0(s64)
%3:_(s8) = G_TRUNC %1(s64) %3:_(s8) = G_TRUNC %1(s64)
%4:_(s1) = G_ICMP intpred(sgt), %2(s8), %3 %4:_(s1) = G_ICMP intpred(sgt), %2(s8), %3
%5:_(s64) = G_ANYEXT %4(s1) %5:_(s64) = G_ANYEXT %4(s1)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: cmp_sgt_i15 name: cmp_sgt_i15
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sgt_i15 ; CHECK-LABEL: name: cmp_sgt_i15
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 15 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 49
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 15 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sgt), [[SEXT_INREG]](s64), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 49
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sgt), [[ASHR]](s64), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s64) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s15) = G_TRUNC %0(s64) %2:_(s15) = G_TRUNC %0(s64)
%3:_(s15) = G_TRUNC %1(s64) %3:_(s15) = G_TRUNC %1(s64)
%4:_(s1) = G_ICMP intpred(sgt), %2(s15), %3 %4:_(s1) = G_ICMP intpred(sgt), %2(s15), %3
%5:_(s64) = G_ANYEXT %4(s1) %5:_(s64) = G_ANYEXT %4(s1)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: cmp_sgt_i16 name: cmp_sgt_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sgt_i16 ; CHECK-LABEL: name: cmp_sgt_i16
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 16 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 16 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sgt), [[SEXT_INREG]](s64), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sgt), [[ASHR]](s64), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s64) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s16) = G_TRUNC %0(s64) %2:_(s16) = G_TRUNC %0(s64)
%3:_(s16) = G_TRUNC %1(s64) %3:_(s16) = G_TRUNC %1(s64)
%4:_(s1) = G_ICMP intpred(sgt), %2(s16), %3 %4:_(s1) = G_ICMP intpred(sgt), %2(s16), %3
%5:_(s64) = G_ANYEXT %4(s1) %5:_(s64) = G_ANYEXT %4(s1)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: cmp_sgt_i32 name: cmp_sgt_i32
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sgt_i32 ; CHECK-LABEL: name: cmp_sgt_i32
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 32 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 32 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sgt), [[SEXT_INREG]](s64), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sgt), [[ASHR]](s64), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s64) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s32) = G_TRUNC %0(s64) %2:_(s32) = G_TRUNC %0(s64)
%3:_(s32) = G_TRUNC %1(s64) %3:_(s32) = G_TRUNC %1(s64)
%4:_(s1) = G_ICMP intpred(sgt), %2(s32), %3 %4:_(s1) = G_ICMP intpred(sgt), %2(s32), %3
%5:_(s64) = G_ANYEXT %4(s1) %5:_(s64) = G_ANYEXT %4(s1)
Show All 23 Lines
name: cmp_sgt_i72 name: cmp_sgt_i72
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sgt_i72 ; CHECK-LABEL: name: cmp_sgt_i72
; CHECK: %xhi:_(s64) = COPY $x10 ; CHECK: %xhi:_(s64) = COPY $x10
; CHECK-NEXT: %xlo:_(s64) = COPY $x11 ; CHECK-NEXT: %xlo:_(s64) = COPY $x11
; CHECK-NEXT: %yhi:_(s64) = COPY $x12 ; CHECK-NEXT: %yhi:_(s64) = COPY $x12
; CHECK-NEXT: %ylo:_(s64) = COPY $x13 ; CHECK-NEXT: %ylo:_(s64) = COPY $x13
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG %xlo, 8 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG %ylo, 8 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL %xlo, [[C]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sgt), [[SEXT_INREG]](s64), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), [[SEXT_INREG]](s64), [[SEXT_INREG1]] ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL %ylo, [[C1]](s64)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sgt), [[ASHR]](s64), [[ASHR1]]
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), [[ASHR]](s64), [[ASHR1]]
; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s64) = G_ICMP intpred(ugt), %xhi(s64), %yhi ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s64) = G_ICMP intpred(ugt), %xhi(s64), %yhi
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[ICMP1]], [[C]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[ICMP1]], [[C2]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[AND]](s64), [[ICMP2]], [[ICMP]] ; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[AND]](s64), [[ICMP2]], [[ICMP]]
; CHECK-NEXT: $x10 = COPY [[SELECT]](s64) ; CHECK-NEXT: $x10 = COPY [[SELECT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%xhi:_(s64) = COPY $x10 %xhi:_(s64) = COPY $x10
%xlo:_(s64) = COPY $x11 %xlo:_(s64) = COPY $x11
%yhi:_(s64) = COPY $x12 %yhi:_(s64) = COPY $x12
%ylo:_(s64) = COPY $x13 %ylo:_(s64) = COPY $x13
%x0:_(s128) = G_MERGE_VALUES %xhi(s64), %xlo(s64) %x0:_(s128) = G_MERGE_VALUES %xhi(s64), %xlo(s64)
Show All 37 Lines
... ...
--- ---
name: cmp_slt_i8 name: cmp_slt_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_slt_i8 ; CHECK-LABEL: name: cmp_slt_i8
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 8 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 8 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[SEXT_INREG]](s64), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[ASHR]](s64), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s64) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s8) = G_TRUNC %0(s64) %2:_(s8) = G_TRUNC %0(s64)
%3:_(s8) = G_TRUNC %1(s64) %3:_(s8) = G_TRUNC %1(s64)
%4:_(s1) = G_ICMP intpred(slt), %2(s8), %3 %4:_(s1) = G_ICMP intpred(slt), %2(s8), %3
%5:_(s64) = G_ANYEXT %4(s1) %5:_(s64) = G_ANYEXT %4(s1)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: cmp_slt_i15 name: cmp_slt_i15
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_slt_i15 ; CHECK-LABEL: name: cmp_slt_i15
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 15 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 49
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 15 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[SEXT_INREG]](s64), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 49
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[ASHR]](s64), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s64) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s15) = G_TRUNC %0(s64) %2:_(s15) = G_TRUNC %0(s64)
%3:_(s15) = G_TRUNC %1(s64) %3:_(s15) = G_TRUNC %1(s64)
%4:_(s1) = G_ICMP intpred(slt), %2(s15), %3 %4:_(s1) = G_ICMP intpred(slt), %2(s15), %3
%5:_(s64) = G_ANYEXT %4(s1) %5:_(s64) = G_ANYEXT %4(s1)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: cmp_slt_i16 name: cmp_slt_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_slt_i16 ; CHECK-LABEL: name: cmp_slt_i16
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 16 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 16 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[SEXT_INREG]](s64), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[ASHR]](s64), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s64) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s16) = G_TRUNC %0(s64) %2:_(s16) = G_TRUNC %0(s64)
%3:_(s16) = G_TRUNC %1(s64) %3:_(s16) = G_TRUNC %1(s64)
%4:_(s1) = G_ICMP intpred(slt), %2(s16), %3 %4:_(s1) = G_ICMP intpred(slt), %2(s16), %3
%5:_(s64) = G_ANYEXT %4(s1) %5:_(s64) = G_ANYEXT %4(s1)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: cmp_slt_i32 name: cmp_slt_i32
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_slt_i32 ; CHECK-LABEL: name: cmp_slt_i32
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 32 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 32 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[SEXT_INREG]](s64), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(slt), [[ASHR]](s64), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s64) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s32) = G_TRUNC %0(s64) %2:_(s32) = G_TRUNC %0(s64)
%3:_(s32) = G_TRUNC %1(s64) %3:_(s32) = G_TRUNC %1(s64)
%4:_(s1) = G_ICMP intpred(slt), %2(s32), %3 %4:_(s1) = G_ICMP intpred(slt), %2(s32), %3
%5:_(s64) = G_ANYEXT %4(s1) %5:_(s64) = G_ANYEXT %4(s1)
Show All 23 Lines
name: cmp_slt_i72 name: cmp_slt_i72
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_slt_i72 ; CHECK-LABEL: name: cmp_slt_i72
; CHECK: %xhi:_(s64) = COPY $x10 ; CHECK: %xhi:_(s64) = COPY $x10
; CHECK-NEXT: %xlo:_(s64) = COPY $x11 ; CHECK-NEXT: %xlo:_(s64) = COPY $x11
; CHECK-NEXT: %yhi:_(s64) = COPY $x12 ; CHECK-NEXT: %yhi:_(s64) = COPY $x12
; CHECK-NEXT: %ylo:_(s64) = COPY $x13 ; CHECK-NEXT: %ylo:_(s64) = COPY $x13
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG %xlo, 8 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG %ylo, 8 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL %xlo, [[C]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sge), [[SEXT_INREG]](s64), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), [[SEXT_INREG]](s64), [[SEXT_INREG1]] ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL %ylo, [[C1]](s64)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sge), [[ASHR]](s64), [[ASHR1]]
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), [[ASHR]](s64), [[ASHR1]]
; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s64) = G_ICMP intpred(uge), %xhi(s64), %yhi ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s64) = G_ICMP intpred(uge), %xhi(s64), %yhi
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[ICMP1]], [[C]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[ICMP1]], [[C2]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[AND]](s64), [[ICMP2]], [[ICMP]] ; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[AND]](s64), [[ICMP2]], [[ICMP]]
; CHECK-NEXT: $x10 = COPY [[SELECT]](s64) ; CHECK-NEXT: $x10 = COPY [[SELECT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%xhi:_(s64) = COPY $x10 %xhi:_(s64) = COPY $x10
%xlo:_(s64) = COPY $x11 %xlo:_(s64) = COPY $x11
%yhi:_(s64) = COPY $x12 %yhi:_(s64) = COPY $x12
%ylo:_(s64) = COPY $x13 %ylo:_(s64) = COPY $x13
%x0:_(s128) = G_MERGE_VALUES %xhi(s64), %xlo(s64) %x0:_(s128) = G_MERGE_VALUES %xhi(s64), %xlo(s64)
Show All 37 Lines
... ...
--- ---
name: cmp_sge_i8 name: cmp_sge_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sge_i8 ; CHECK-LABEL: name: cmp_sge_i8
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 8 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 8 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sge), [[SEXT_INREG]](s64), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sge), [[ASHR]](s64), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s64) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s8) = G_TRUNC %0(s64) %2:_(s8) = G_TRUNC %0(s64)
%3:_(s8) = G_TRUNC %1(s64) %3:_(s8) = G_TRUNC %1(s64)
%4:_(s1) = G_ICMP intpred(sge), %2(s8), %3 %4:_(s1) = G_ICMP intpred(sge), %2(s8), %3
%5:_(s64) = G_ANYEXT %4(s1) %5:_(s64) = G_ANYEXT %4(s1)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: cmp_sge_i15 name: cmp_sge_i15
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sge_i15 ; CHECK-LABEL: name: cmp_sge_i15
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 15 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 49
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 15 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sge), [[SEXT_INREG]](s64), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 49
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sge), [[ASHR]](s64), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s64) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s15) = G_TRUNC %0(s64) %2:_(s15) = G_TRUNC %0(s64)
%3:_(s15) = G_TRUNC %1(s64) %3:_(s15) = G_TRUNC %1(s64)
%4:_(s1) = G_ICMP intpred(sge), %2(s15), %3 %4:_(s1) = G_ICMP intpred(sge), %2(s15), %3
%5:_(s64) = G_ANYEXT %4(s1) %5:_(s64) = G_ANYEXT %4(s1)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: cmp_sge_i16 name: cmp_sge_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sge_i16 ; CHECK-LABEL: name: cmp_sge_i16
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 16 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 16 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sge), [[SEXT_INREG]](s64), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sge), [[ASHR]](s64), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s64) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s16) = G_TRUNC %0(s64) %2:_(s16) = G_TRUNC %0(s64)
%3:_(s16) = G_TRUNC %1(s64) %3:_(s16) = G_TRUNC %1(s64)
%4:_(s1) = G_ICMP intpred(sge), %2(s16), %3 %4:_(s1) = G_ICMP intpred(sge), %2(s16), %3
%5:_(s64) = G_ANYEXT %4(s1) %5:_(s64) = G_ANYEXT %4(s1)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: cmp_sge_i32 name: cmp_sge_i32
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sge_i32 ; CHECK-LABEL: name: cmp_sge_i32
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 32 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 32 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sge), [[SEXT_INREG]](s64), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sge), [[ASHR]](s64), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s64) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s32) = G_TRUNC %0(s64) %2:_(s32) = G_TRUNC %0(s64)
%3:_(s32) = G_TRUNC %1(s64) %3:_(s32) = G_TRUNC %1(s64)
%4:_(s1) = G_ICMP intpred(sge), %2(s32), %3 %4:_(s1) = G_ICMP intpred(sge), %2(s32), %3
%5:_(s64) = G_ANYEXT %4(s1) %5:_(s64) = G_ANYEXT %4(s1)
Show All 23 Lines
name: cmp_sge_i72 name: cmp_sge_i72
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sge_i72 ; CHECK-LABEL: name: cmp_sge_i72
; CHECK: %xhi:_(s64) = COPY $x10 ; CHECK: %xhi:_(s64) = COPY $x10
; CHECK-NEXT: %xlo:_(s64) = COPY $x11 ; CHECK-NEXT: %xlo:_(s64) = COPY $x11
; CHECK-NEXT: %yhi:_(s64) = COPY $x12 ; CHECK-NEXT: %yhi:_(s64) = COPY $x12
; CHECK-NEXT: %ylo:_(s64) = COPY $x13 ; CHECK-NEXT: %ylo:_(s64) = COPY $x13
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG %xlo, 8 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG %ylo, 8 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL %xlo, [[C]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sge), [[SEXT_INREG]](s64), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), [[SEXT_INREG]](s64), [[SEXT_INREG1]] ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL %ylo, [[C1]](s64)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sge), [[ASHR]](s64), [[ASHR1]]
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), [[ASHR]](s64), [[ASHR1]]
; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s64) = G_ICMP intpred(uge), %xhi(s64), %yhi ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s64) = G_ICMP intpred(uge), %xhi(s64), %yhi
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[ICMP1]], [[C]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[ICMP1]], [[C2]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[AND]](s64), [[ICMP2]], [[ICMP]] ; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[AND]](s64), [[ICMP2]], [[ICMP]]
; CHECK-NEXT: $x10 = COPY [[SELECT]](s64) ; CHECK-NEXT: $x10 = COPY [[SELECT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%xhi:_(s64) = COPY $x10 %xhi:_(s64) = COPY $x10
%xlo:_(s64) = COPY $x11 %xlo:_(s64) = COPY $x11
%yhi:_(s64) = COPY $x12 %yhi:_(s64) = COPY $x12
%ylo:_(s64) = COPY $x13 %ylo:_(s64) = COPY $x13
%x0:_(s128) = G_MERGE_VALUES %xhi(s64), %xlo(s64) %x0:_(s128) = G_MERGE_VALUES %xhi(s64), %xlo(s64)
Show All 37 Lines
... ...
--- ---
name: cmp_sle_i8 name: cmp_sle_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sle_i8 ; CHECK-LABEL: name: cmp_sle_i8
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 8 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 8 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sle), [[SEXT_INREG]](s64), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sle), [[ASHR]](s64), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s64) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s8) = G_TRUNC %0(s64) %2:_(s8) = G_TRUNC %0(s64)
%3:_(s8) = G_TRUNC %1(s64) %3:_(s8) = G_TRUNC %1(s64)
%4:_(s1) = G_ICMP intpred(sle), %2(s8), %3 %4:_(s1) = G_ICMP intpred(sle), %2(s8), %3
%5:_(s64) = G_ANYEXT %4(s1) %5:_(s64) = G_ANYEXT %4(s1)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: cmp_sle_i15 name: cmp_sle_i15
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sle_i15 ; CHECK-LABEL: name: cmp_sle_i15
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 15 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 49
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 15 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sle), [[SEXT_INREG]](s64), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 49
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sle), [[ASHR]](s64), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s64) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s15) = G_TRUNC %0(s64) %2:_(s15) = G_TRUNC %0(s64)
%3:_(s15) = G_TRUNC %1(s64) %3:_(s15) = G_TRUNC %1(s64)
%4:_(s1) = G_ICMP intpred(sle), %2(s15), %3 %4:_(s1) = G_ICMP intpred(sle), %2(s15), %3
%5:_(s64) = G_ANYEXT %4(s1) %5:_(s64) = G_ANYEXT %4(s1)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: cmp_sle_i16 name: cmp_sle_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sle_i16 ; CHECK-LABEL: name: cmp_sle_i16
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 16 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 16 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sle), [[SEXT_INREG]](s64), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sle), [[ASHR]](s64), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s64) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s16) = G_TRUNC %0(s64) %2:_(s16) = G_TRUNC %0(s64)
%3:_(s16) = G_TRUNC %1(s64) %3:_(s16) = G_TRUNC %1(s64)
%4:_(s1) = G_ICMP intpred(sle), %2(s16), %3 %4:_(s1) = G_ICMP intpred(sle), %2(s16), %3
%5:_(s64) = G_ANYEXT %4(s1) %5:_(s64) = G_ANYEXT %4(s1)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: cmp_sle_i32 name: cmp_sle_i32
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sle_i32 ; CHECK-LABEL: name: cmp_sle_i32
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 32 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 32 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sle), [[SEXT_INREG]](s64), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sle), [[ASHR]](s64), [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[ICMP]](s64) ; CHECK-NEXT: $x10 = COPY [[ICMP]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s32) = G_TRUNC %0(s64) %2:_(s32) = G_TRUNC %0(s64)
%3:_(s32) = G_TRUNC %1(s64) %3:_(s32) = G_TRUNC %1(s64)
%4:_(s1) = G_ICMP intpred(sle), %2(s32), %3 %4:_(s1) = G_ICMP intpred(sle), %2(s32), %3
%5:_(s64) = G_ANYEXT %4(s1) %5:_(s64) = G_ANYEXT %4(s1)
Show All 23 Lines
name: cmp_sle_i72 name: cmp_sle_i72
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: cmp_sle_i72 ; CHECK-LABEL: name: cmp_sle_i72
; CHECK: %xhi:_(s64) = COPY $x10 ; CHECK: %xhi:_(s64) = COPY $x10
; CHECK-NEXT: %xlo:_(s64) = COPY $x11 ; CHECK-NEXT: %xlo:_(s64) = COPY $x11
; CHECK-NEXT: %yhi:_(s64) = COPY $x12 ; CHECK-NEXT: %yhi:_(s64) = COPY $x12
; CHECK-NEXT: %ylo:_(s64) = COPY $x13 ; CHECK-NEXT: %ylo:_(s64) = COPY $x13
; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG %xlo, 8 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG %ylo, 8 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL %xlo, [[C]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sle), [[SEXT_INREG]](s64), [[SEXT_INREG1]] ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), [[SEXT_INREG]](s64), [[SEXT_INREG1]] ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL %ylo, [[C1]](s64)
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sle), [[ASHR]](s64), [[ASHR1]]
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), [[ASHR]](s64), [[ASHR1]]
; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s64) = G_ICMP intpred(ule), %xhi(s64), %yhi ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s64) = G_ICMP intpred(ule), %xhi(s64), %yhi
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[ICMP1]], [[C]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[ICMP1]], [[C2]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[AND]](s64), [[ICMP2]], [[ICMP]] ; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[AND]](s64), [[ICMP2]], [[ICMP]]
; CHECK-NEXT: $x10 = COPY [[SELECT]](s64) ; CHECK-NEXT: $x10 = COPY [[SELECT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%xhi:_(s64) = COPY $x10 %xhi:_(s64) = COPY $x10
%xlo:_(s64) = COPY $x11 %xlo:_(s64) = COPY $x11
%yhi:_(s64) = COPY $x12 %yhi:_(s64) = COPY $x12
%ylo:_(s64) = COPY $x13 %ylo:_(s64) = COPY $x13
%x0:_(s128) = G_MERGE_VALUES %xhi(s64), %xlo(s64) %x0:_(s128) = G_MERGE_VALUES %xhi(s64), %xlo(s64)
▲ Show 20 Lines • Show All 1,144 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-load.mir

Show All 17 Lines
body: | body: |
bb.1: bb.1:
liveins: $x10 liveins: $x10
; CHECK-LABEL: name: load_i8 ; CHECK-LABEL: name: load_i8
; CHECK: liveins: $x10 ; CHECK: liveins: $x10
; CHECK-NEXT: {{ $}} ; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p0) :: (load (s8)) ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s8))
; CHECK-NEXT: $x10 = COPY [[LOAD]](s64) ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(p0) = COPY $x10 %0:_(p0) = COPY $x10
%1:_(s8) = G_LOAD %0(p0) :: (load (s8)) %1:_(s8) = G_LOAD %0(p0) :: (load (s8))
%2:_(s64) = G_ANYEXT %1(s8) %2:_(s64) = G_ANYEXT %1(s8)
$x10 = COPY %2(s64) $x10 = COPY %2(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
Show All 13 Lines
body: | body: |
bb.1: bb.1:
liveins: $x10 liveins: $x10
; CHECK-LABEL: name: load_i16 ; CHECK-LABEL: name: load_i16
; CHECK: liveins: $x10 ; CHECK: liveins: $x10
; CHECK-NEXT: {{ $}} ; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p0) :: (load (s16)) ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s16))
; CHECK-NEXT: $x10 = COPY [[LOAD]](s64) ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(p0) = COPY $x10 %0:_(p0) = COPY $x10
%1:_(s16) = G_LOAD %0(p0) :: (load (s16)) %1:_(s16) = G_LOAD %0(p0) :: (load (s16))
%2:_(s64) = G_ANYEXT %1(s16) %2:_(s64) = G_ANYEXT %1(s16)
$x10 = COPY %2(s64) $x10 = COPY %2(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
Show All 13 Lines
body: | body: |
bb.1: bb.1:
liveins: $x10 liveins: $x10
; CHECK-LABEL: name: load_i32 ; CHECK-LABEL: name: load_i32
; CHECK: liveins: $x10 ; CHECK: liveins: $x10
; CHECK-NEXT: {{ $}} ; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p0) :: (load (s32)) ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s32))
; CHECK-NEXT: $x10 = COPY [[LOAD]](s64) ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LOAD]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(p0) = COPY $x10 %0:_(p0) = COPY $x10
%1:_(s32) = G_LOAD %0(p0) :: (load (s32)) %1:_(s32) = G_LOAD %0(p0) :: (load (s32))
%2:_(s64) = G_ANYEXT %1(s32) %2:_(s64) = G_ANYEXT %1(s32)
$x10 = COPY %2(s64) $x10 = COPY %2(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
▲ Show 20 Lines • Show All 108 Lines • ▼ Show 20 Lines
body: | body: |
bb.1: bb.1:
liveins: $x10 liveins: $x10
; CHECK-LABEL: name: load_i16_unaligned ; CHECK-LABEL: name: load_i16_unaligned
; CHECK: liveins: $x10 ; CHECK: liveins: $x10
; CHECK-NEXT: {{ $}} ; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s64) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8)) ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64) ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64)
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p0) :: (load (s8) from unknown-address + 1) ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p0) :: (load (s8) from unknown-address + 1)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[LOAD]], [[C1]](s64) ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LOAD]], [[C1]](s32)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[ZEXTLOAD]] ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SHL]](s32)
; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[ZEXTLOAD]](s32)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[ANYEXT]], [[ANYEXT1]]
; CHECK-NEXT: $x10 = COPY [[OR]](s64) ; CHECK-NEXT: $x10 = COPY [[OR]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(p0) = COPY $x10 %0:_(p0) = COPY $x10
%1:_(s16) = G_LOAD %0(p0) :: (load (s16), align 1) %1:_(s16) = G_LOAD %0(p0) :: (load (s16), align 1)
%2:_(s64) = G_ANYEXT %1(s16) %2:_(s64) = G_ANYEXT %1(s16)
$x10 = COPY %2(s64) $x10 = COPY %2(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
Show All 14 Lines
body: | body: |
bb.1: bb.1:
liveins: $x10 liveins: $x10
; CHECK-LABEL: name: load_i32_unaligned ; CHECK-LABEL: name: load_i32_unaligned
; CHECK: liveins: $x10 ; CHECK: liveins: $x10
; CHECK-NEXT: {{ $}} ; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s64) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8)) ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64) ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64)
; CHECK-NEXT: [[ZEXTLOAD1:%[0-9]+]]:_(s64) = G_ZEXTLOAD [[PTR_ADD]](p0) :: (load (s8) from unknown-address + 1) ; CHECK-NEXT: [[ZEXTLOAD1:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[PTR_ADD]](p0) :: (load (s8) from unknown-address + 1)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXTLOAD1]], [[C1]](s64) ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[ZEXTLOAD1]], [[C1]](s32)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[ZEXTLOAD]] ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SHL]](s32)
; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[ZEXTLOAD]](s32)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[ANYEXT]], [[ANYEXT1]]
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C2]](s64) ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C2]](s64)
; CHECK-NEXT: [[ZEXTLOAD2:%[0-9]+]]:_(s64) = G_ZEXTLOAD [[PTR_ADD1]](p0) :: (load (s8) from unknown-address + 2) ; CHECK-NEXT: [[ZEXTLOAD2:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[PTR_ADD1]](p0) :: (load (s8) from unknown-address + 2)
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD1]], [[C3]](s64) ; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD1]], [[C3]](s64)
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD2]](p0) :: (load (s8) from unknown-address + 3) ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p0) :: (load (s8) from unknown-address + 3)
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 ; CHECK-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[LOAD]], [[C4]](s64) ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[LOAD]], [[C4]](s32)
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[ZEXTLOAD2]] ; CHECK-NEXT: [[ANYEXT2:%[0-9]+]]:_(s64) = G_ANYEXT [[SHL1]](s32)
; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 ; CHECK-NEXT: [[ANYEXT3:%[0-9]+]]:_(s64) = G_ANYEXT [[ZEXTLOAD2]](s32)
; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[OR1]], [[C5]](s64) ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR [[ANYEXT2]], [[ANYEXT3]]
; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s64) = G_OR [[SHL2]], [[OR]] ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[OR1]](s64)
; CHECK-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[TRUNC]], [[C5]](s32)
; CHECK-NEXT: [[ANYEXT4:%[0-9]+]]:_(s64) = G_ANYEXT [[SHL2]](s32)
; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s64) = G_OR [[ANYEXT4]], [[OR]]
; CHECK-NEXT: $x10 = COPY [[OR2]](s64) ; CHECK-NEXT: $x10 = COPY [[OR2]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(p0) = COPY $x10 %0:_(p0) = COPY $x10
%1:_(s32) = G_LOAD %0(p0) :: (load (s32), align 1) %1:_(s32) = G_LOAD %0(p0) :: (load (s32), align 1)
%2:_(s64) = G_ANYEXT %1(s32) %2:_(s64) = G_ANYEXT %1(s32)
$x10 = COPY %2(s64) $x10 = COPY %2(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
Show All 14 Lines
body: | body: |
bb.1: bb.1:
liveins: $x10 liveins: $x10
; CHECK-LABEL: name: load_i32_align2 ; CHECK-LABEL: name: load_i32_align2
; CHECK: liveins: $x10 ; CHECK: liveins: $x10
; CHECK-NEXT: {{ $}} ; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s64) = G_ZEXTLOAD [[COPY]](p0) :: (load (s16)) ; CHECK-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s16))
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64) ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64)
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p0) :: (load (s16) from unknown-address + 2) ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p0) :: (load (s16) from unknown-address + 2)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[LOAD]], [[C1]](s64) ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LOAD]], [[C1]](s32)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[ZEXTLOAD]] ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SHL]](s32)
; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[ZEXTLOAD]](s32)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[ANYEXT]], [[ANYEXT1]]
; CHECK-NEXT: $x10 = COPY [[OR]](s64) ; CHECK-NEXT: $x10 = COPY [[OR]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(p0) = COPY $x10 %0:_(p0) = COPY $x10
%1:_(s32) = G_LOAD %0(p0) :: (load (s32), align 2) %1:_(s32) = G_LOAD %0(p0) :: (load (s32), align 2)
%2:_(s64) = G_ANYEXT %1(s32) %2:_(s64) = G_ANYEXT %1(s32)
$x10 = COPY %2(s64) $x10 = COPY %2(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
▲ Show 20 Lines • Show All 240 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-lshr.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
--- ---
name: lshr_i8 name: lshr_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: lshr_i8 ; CHECK-LABEL: name: lshr_i8
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 255 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]]
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 255 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]] ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[AND1]], [[AND]](s64) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[AND1]](s64)
; CHECK-NEXT: $x10 = COPY [[LSHR]](s64) ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[TRUNC1]], [[TRUNC]](s32)
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LSHR]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s8) = G_TRUNC %0(s64) %2:_(s8) = G_TRUNC %0(s64)
%3:_(s8) = G_TRUNC %1(s64) %3:_(s8) = G_TRUNC %1(s64)
%4:_(s8) = G_LSHR %2, %3 %4:_(s8) = G_LSHR %2, %3
%5:_(s64) = G_ANYEXT %4(s8) %5:_(s64) = G_ANYEXT %4(s8)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: lshr_i15 name: lshr_i15
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: lshr_i15 ; CHECK-LABEL: name: lshr_i15
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32767 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32767
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]]
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32767 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32767
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]] ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[AND1]], [[AND]](s64) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[AND1]](s64)
; CHECK-NEXT: $x10 = COPY [[LSHR]](s64) ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[TRUNC1]], [[TRUNC]](s32)
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LSHR]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s15) = G_TRUNC %0(s64) %2:_(s15) = G_TRUNC %0(s64)
%3:_(s15) = G_TRUNC %1(s64) %3:_(s15) = G_TRUNC %1(s64)
%4:_(s15) = G_LSHR %2, %3 %4:_(s15) = G_LSHR %2, %3
%5:_(s64) = G_ANYEXT %4(s15) %5:_(s64) = G_ANYEXT %4(s15)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: lshr_i16 name: lshr_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: lshr_i16 ; CHECK-LABEL: name: lshr_i16
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]]
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]] ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[AND1]], [[AND]](s64) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[AND1]](s64)
; CHECK-NEXT: $x10 = COPY [[LSHR]](s64) ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[TRUNC1]], [[TRUNC]](s32)
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LSHR]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s16) = G_TRUNC %0(s64) %2:_(s16) = G_TRUNC %0(s64)
%3:_(s16) = G_TRUNC %1(s64) %3:_(s16) = G_TRUNC %1(s64)
%4:_(s16) = G_LSHR %2, %3 %4:_(s16) = G_LSHR %2, %3
%5:_(s64) = G_ANYEXT %4(s16) %5:_(s64) = G_ANYEXT %4(s16)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: lshr_i32 name: lshr_i32
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: lshr_i32 ; CHECK-LABEL: name: lshr_i32
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]] ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[TRUNC]], [[TRUNC1]](s32)
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]] ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LSHR]](s32)
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[AND1]], [[AND]](s64) ; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: $x10 = COPY [[LSHR]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s32) = G_TRUNC %0(s64) %2:_(s32) = G_TRUNC %0(s64)
%3:_(s32) = G_TRUNC %1(s64) %3:_(s32) = G_TRUNC %1(s64)
%4:_(s32) = G_LSHR %2, %3 %4:_(s32) = G_LSHR %2, %3
%5:_(s64) = G_ANYEXT %4(s32) %5:_(s64) = G_ANYEXT %4(s32)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
▲ Show 20 Lines • Show All 250 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-mul-ext.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mattr=+m -mtriple=riscv64 -run-pass=legalizer %s -o - \ # RUN: llc -mattr=+m -mtriple=riscv64 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
# RUN: llc -mattr=+zmmul -mtriple=riscv64 -run-pass=legalizer %s -o - \ # RUN: llc -mattr=+zmmul -mtriple=riscv64 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
--- ---
name: mul_i8 name: mul_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: mul_i8 ; CHECK-LABEL: name: mul_i8
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[COPY]], [[COPY1]] ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: $x10 = COPY [[MUL]](s64) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[TRUNC]], [[TRUNC1]]
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[MUL]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s8) = G_TRUNC %0(s64) %2:_(s8) = G_TRUNC %0(s64)
%3:_(s8) = G_TRUNC %1(s64) %3:_(s8) = G_TRUNC %1(s64)
%4:_(s8) = G_MUL %2, %3 %4:_(s8) = G_MUL %2, %3
%5:_(s64) = G_ANYEXT %4(s8) %5:_(s64) = G_ANYEXT %4(s8)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: mul_i15 name: mul_i15
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: mul_i15 ; CHECK-LABEL: name: mul_i15
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[COPY]], [[COPY1]] ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: $x10 = COPY [[MUL]](s64) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[TRUNC]], [[TRUNC1]]
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[MUL]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s15) = G_TRUNC %0(s64) %2:_(s15) = G_TRUNC %0(s64)
%3:_(s15) = G_TRUNC %1(s64) %3:_(s15) = G_TRUNC %1(s64)
%4:_(s15) = G_MUL %2, %3 %4:_(s15) = G_MUL %2, %3
%5:_(s64) = G_ANYEXT %4(s15) %5:_(s64) = G_ANYEXT %4(s15)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: mul_i16 name: mul_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: mul_i16 ; CHECK-LABEL: name: mul_i16
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[COPY]], [[COPY1]] ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: $x10 = COPY [[MUL]](s64) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[TRUNC]], [[TRUNC1]]
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[MUL]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s16) = G_TRUNC %0(s64) %2:_(s16) = G_TRUNC %0(s64)
%3:_(s16) = G_TRUNC %1(s64) %3:_(s16) = G_TRUNC %1(s64)
%4:_(s16) = G_MUL %2, %3 %4:_(s16) = G_MUL %2, %3
%5:_(s64) = G_ANYEXT %4(s16) %5:_(s64) = G_ANYEXT %4(s16)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: mul_i32 name: mul_i32
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: mul_i32 ; CHECK-LABEL: name: mul_i32
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[COPY]], [[COPY1]] ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: $x10 = COPY [[MUL]](s64) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[TRUNC]], [[TRUNC1]]
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[MUL]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s32) = G_TRUNC %0(s64) %2:_(s32) = G_TRUNC %0(s64)
%3:_(s32) = G_TRUNC %1(s64) %3:_(s32) = G_TRUNC %1(s64)
%4:_(s32) = G_MUL %2, %3 %4:_(s32) = G_MUL %2, %3
%5:_(s64) = G_ANYEXT %4(s32) %5:_(s64) = G_ANYEXT %4(s32)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
▲ Show 20 Lines • Show All 139 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-rem.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s -check-prefix=CHECK-I # RUN: | FileCheck %s -check-prefix=CHECK-I
# RUN: llc -mattr=+m -mtriple=riscv64 -run-pass=legalizer %s -o - \ # RUN: llc -mattr=+m -mtriple=riscv64 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s -check-prefix=CHECK-M # RUN: | FileCheck %s -check-prefix=CHECK-M
--- ---
name: srem_i8 name: srem_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-I-LABEL: name: srem_i8 ; CHECK-I-LABEL: name: srem_i8
; CHECK-I: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-I: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 8 ; CHECK-I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 8 ; CHECK-I-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK-I-NEXT: $x10 = COPY [[SEXT_INREG]](s64) ; CHECK-I-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-I-NEXT: $x11 = COPY [[SEXT_INREG1]](s64) ; CHECK-I-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-I-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
; CHECK-I-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s64)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s64)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64) ; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
; CHECK-I-NEXT: PseudoRET implicit $x10 ; CHECK-I-NEXT: PseudoRET implicit $x10
; ;
; CHECK-M-LABEL: name: srem_i8 ; CHECK-M-LABEL: name: srem_i8
; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 8 ; CHECK-M-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 8 ; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; CHECK-M-NEXT: [[SREM:%[0-9]+]]:_(s64) = G_SREM [[SEXT_INREG]], [[SEXT_INREG1]] ; CHECK-M-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC]], [[C]](s32)
; CHECK-M-NEXT: $x10 = COPY [[SREM]](s64) ; CHECK-M-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-M-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; CHECK-M-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[TRUNC1]], [[C1]](s32)
; CHECK-M-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-M-NEXT: [[SREM:%[0-9]+]]:_(s32) = G_SREM [[ASHR]], [[ASHR1]]
; CHECK-M-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SREM]](s32)
; CHECK-M-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10 ; CHECK-M-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s8) = G_TRUNC %0(s64) %2:_(s8) = G_TRUNC %0(s64)
%3:_(s8) = G_TRUNC %1(s64) %3:_(s8) = G_TRUNC %1(s64)
%4:_(s8) = G_SREM %2, %3 %4:_(s8) = G_SREM %2, %3
%5:_(s64) = G_ANYEXT %4(s8) %5:_(s64) = G_ANYEXT %4(s8)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: srem_i15 name: srem_i15
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-I-LABEL: name: srem_i15 ; CHECK-I-LABEL: name: srem_i15
; CHECK-I: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-I: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 15 ; CHECK-I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 49
; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 15 ; CHECK-I-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK-I-NEXT: $x10 = COPY [[SEXT_INREG]](s64) ; CHECK-I-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-I-NEXT: $x11 = COPY [[SEXT_INREG1]](s64) ; CHECK-I-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 49
; CHECK-I-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
; CHECK-I-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s64)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s64)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64) ; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
; CHECK-I-NEXT: PseudoRET implicit $x10 ; CHECK-I-NEXT: PseudoRET implicit $x10
; ;
; CHECK-M-LABEL: name: srem_i15 ; CHECK-M-LABEL: name: srem_i15
; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 15 ; CHECK-M-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 15 ; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 17
; CHECK-M-NEXT: [[SREM:%[0-9]+]]:_(s64) = G_SREM [[SEXT_INREG]], [[SEXT_INREG1]] ; CHECK-M-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC]], [[C]](s32)
; CHECK-M-NEXT: $x10 = COPY [[SREM]](s64) ; CHECK-M-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-M-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 17
; CHECK-M-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[TRUNC1]], [[C1]](s32)
; CHECK-M-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-M-NEXT: [[SREM:%[0-9]+]]:_(s32) = G_SREM [[ASHR]], [[ASHR1]]
; CHECK-M-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SREM]](s32)
; CHECK-M-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10 ; CHECK-M-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s15) = G_TRUNC %0(s64) %2:_(s15) = G_TRUNC %0(s64)
%3:_(s15) = G_TRUNC %1(s64) %3:_(s15) = G_TRUNC %1(s64)
%4:_(s15) = G_SREM %2, %3 %4:_(s15) = G_SREM %2, %3
%5:_(s64) = G_ANYEXT %4(s15) %5:_(s64) = G_ANYEXT %4(s15)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: srem_i16 name: srem_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-I-LABEL: name: srem_i16 ; CHECK-I-LABEL: name: srem_i16
; CHECK-I: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-I: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 16 ; CHECK-I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 16 ; CHECK-I-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK-I-NEXT: $x10 = COPY [[SEXT_INREG]](s64) ; CHECK-I-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-I-NEXT: $x11 = COPY [[SEXT_INREG1]](s64) ; CHECK-I-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
; CHECK-I-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
; CHECK-I-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s64)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s64)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64) ; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
; CHECK-I-NEXT: PseudoRET implicit $x10 ; CHECK-I-NEXT: PseudoRET implicit $x10
; ;
; CHECK-M-LABEL: name: srem_i16 ; CHECK-M-LABEL: name: srem_i16
; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 16 ; CHECK-M-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 16 ; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-M-NEXT: [[SREM:%[0-9]+]]:_(s64) = G_SREM [[SEXT_INREG]], [[SEXT_INREG1]] ; CHECK-M-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC]], [[C]](s32)
; CHECK-M-NEXT: $x10 = COPY [[SREM]](s64) ; CHECK-M-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
; CHECK-M-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-M-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[TRUNC1]], [[C1]](s32)
; CHECK-M-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C1]](s32)
; CHECK-M-NEXT: [[SREM:%[0-9]+]]:_(s32) = G_SREM [[ASHR]], [[ASHR1]]
; CHECK-M-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SREM]](s32)
; CHECK-M-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10 ; CHECK-M-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s16) = G_TRUNC %0(s64) %2:_(s16) = G_TRUNC %0(s64)
%3:_(s16) = G_TRUNC %1(s64) %3:_(s16) = G_TRUNC %1(s64)
%4:_(s16) = G_SREM %2, %3 %4:_(s16) = G_SREM %2, %3
%5:_(s64) = G_ANYEXT %4(s16) %5:_(s64) = G_ANYEXT %4(s16)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: srem_i32 name: srem_i32
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-I-LABEL: name: srem_i32 ; CHECK-I-LABEL: name: srem_i32
; CHECK-I: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-I: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 32 ; CHECK-I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 32 ; CHECK-I-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK-I-NEXT: $x10 = COPY [[SEXT_INREG]](s64) ; CHECK-I-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-I-NEXT: $x11 = COPY [[SEXT_INREG1]](s64) ; CHECK-I-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; CHECK-I-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C1]](s64)
; CHECK-I-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s64)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s64)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64) ; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
; CHECK-I-NEXT: PseudoRET implicit $x10 ; CHECK-I-NEXT: PseudoRET implicit $x10
; ;
; CHECK-M-LABEL: name: srem_i32 ; CHECK-M-LABEL: name: srem_i32
; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 32 ; CHECK-M-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 32 ; CHECK-M-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-M-NEXT: [[SREM:%[0-9]+]]:_(s64) = G_SREM [[SEXT_INREG]], [[SEXT_INREG1]] ; CHECK-M-NEXT: [[SREM:%[0-9]+]]:_(s32) = G_SREM [[TRUNC]], [[TRUNC1]]
; CHECK-M-NEXT: $x10 = COPY [[SREM]](s64) ; CHECK-M-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SREM]](s32)
; CHECK-M-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10 ; CHECK-M-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s32) = G_TRUNC %0(s64) %2:_(s32) = G_TRUNC %0(s64)
%3:_(s32) = G_TRUNC %1(s64) %3:_(s32) = G_TRUNC %1(s64)
%4:_(s32) = G_SREM %2, %3 %4:_(s32) = G_SREM %2, %3
%5:_(s64) = G_ANYEXT %4(s32) %5:_(s64) = G_ANYEXT %4(s32)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
Show All 31 Lines
name: srem_i72 name: srem_i72
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-I-LABEL: name: srem_i72 ; CHECK-I-LABEL: name: srem_i72
; CHECK-I: %xlo:_(s64) = COPY $x10 ; CHECK-I: %xlo:_(s64) = COPY $x10
; CHECK-I-NEXT: %xhi:_(s64) = COPY $x11 ; CHECK-I-NEXT: %xhi:_(s64) = COPY $x11
; CHECK-I-NEXT: %ylo:_(s64) = COPY $x12 ; CHECK-I-NEXT: %ylo:_(s64) = COPY $x12
; CHECK-I-NEXT: %yhi:_(s64) = COPY $x13 ; CHECK-I-NEXT: %yhi:_(s64) = COPY $x13
; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG %xhi, 8 ; CHECK-I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG %yhi, 8 ; CHECK-I-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL %xhi, [[C]](s64)
; CHECK-I-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-I-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-I-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL %yhi, [[C1]](s64)
; CHECK-I-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-I-NEXT: $x10 = COPY %xlo(s64) ; CHECK-I-NEXT: $x10 = COPY %xlo(s64)
; CHECK-I-NEXT: $x11 = COPY [[SEXT_INREG]](s64) ; CHECK-I-NEXT: $x11 = COPY [[ASHR]](s64)
; CHECK-I-NEXT: $x12 = COPY %ylo(s64) ; CHECK-I-NEXT: $x12 = COPY %ylo(s64)
; CHECK-I-NEXT: $x13 = COPY [[SEXT_INREG1]](s64) ; CHECK-I-NEXT: $x13 = COPY [[ASHR1]](s64)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__modti3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11 ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__modti3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-I-NEXT: $x10 = COPY [[COPY]](s64) ; CHECK-I-NEXT: $x10 = COPY [[COPY]](s64)
; CHECK-I-NEXT: $x11 = COPY [[COPY1]](s64) ; CHECK-I-NEXT: $x11 = COPY [[COPY1]](s64)
; CHECK-I-NEXT: PseudoRET implicit $x10, implicit $x11 ; CHECK-I-NEXT: PseudoRET implicit $x10, implicit $x11
; ;
; CHECK-M-LABEL: name: srem_i72 ; CHECK-M-LABEL: name: srem_i72
; CHECK-M: %xlo:_(s64) = COPY $x10 ; CHECK-M: %xlo:_(s64) = COPY $x10
; CHECK-M-NEXT: %xhi:_(s64) = COPY $x11 ; CHECK-M-NEXT: %xhi:_(s64) = COPY $x11
; CHECK-M-NEXT: %ylo:_(s64) = COPY $x12 ; CHECK-M-NEXT: %ylo:_(s64) = COPY $x12
; CHECK-M-NEXT: %yhi:_(s64) = COPY $x13 ; CHECK-M-NEXT: %yhi:_(s64) = COPY $x13
; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG %xhi, 8 ; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG %yhi, 8 ; CHECK-M-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL %xhi, [[C]](s64)
; CHECK-M-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C]](s64)
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-M-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL %yhi, [[C1]](s64)
; CHECK-M-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[C1]](s64)
; CHECK-M-NEXT: $x10 = COPY %xlo(s64) ; CHECK-M-NEXT: $x10 = COPY %xlo(s64)
; CHECK-M-NEXT: $x11 = COPY [[SEXT_INREG]](s64) ; CHECK-M-NEXT: $x11 = COPY [[ASHR]](s64)
; CHECK-M-NEXT: $x12 = COPY %ylo(s64) ; CHECK-M-NEXT: $x12 = COPY %ylo(s64)
; CHECK-M-NEXT: $x13 = COPY [[SEXT_INREG1]](s64) ; CHECK-M-NEXT: $x13 = COPY [[ASHR1]](s64)
; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__modti3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11 ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__modti3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-M-NEXT: $x10 = COPY [[COPY]](s64) ; CHECK-M-NEXT: $x10 = COPY [[COPY]](s64)
; CHECK-M-NEXT: $x11 = COPY [[COPY1]](s64) ; CHECK-M-NEXT: $x11 = COPY [[COPY1]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10, implicit $x11 ; CHECK-M-NEXT: PseudoRET implicit $x10, implicit $x11
%xlo:_(s64) = COPY $x10 %xlo:_(s64) = COPY $x10
%xhi:_(s64) = COPY $x11 %xhi:_(s64) = COPY $x11
▲ Show 20 Lines • Show All 77 Lines • ▼ Show 20 Lines bb.0.entry:
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64) ; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
; CHECK-I-NEXT: PseudoRET implicit $x10 ; CHECK-I-NEXT: PseudoRET implicit $x10
; ;
; CHECK-M-LABEL: name: urem_i8 ; CHECK-M-LABEL: name: urem_i8
; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 255 ; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]] ; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
; CHECK-M-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 255 ; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]] ; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]]
; CHECK-M-NEXT: [[UREM:%[0-9]+]]:_(s64) = G_UREM [[AND]], [[AND1]] ; CHECK-M-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[AND1]](s64)
; CHECK-M-NEXT: $x10 = COPY [[UREM]](s64) ; CHECK-M-NEXT: [[UREM:%[0-9]+]]:_(s32) = G_UREM [[TRUNC]], [[TRUNC1]]
; CHECK-M-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UREM]](s32)
; CHECK-M-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10 ; CHECK-M-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s8) = G_TRUNC %0(s64) %2:_(s8) = G_TRUNC %0(s64)
%3:_(s8) = G_TRUNC %1(s64) %3:_(s8) = G_TRUNC %1(s64)
%4:_(s8) = G_UREM %2, %3 %4:_(s8) = G_UREM %2, %3
%5:_(s64) = G_ANYEXT %4(s8) %5:_(s64) = G_ANYEXT %4(s8)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
Show All 18 Lines bb.0.entry:
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64) ; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
; CHECK-I-NEXT: PseudoRET implicit $x10 ; CHECK-I-NEXT: PseudoRET implicit $x10
; ;
; CHECK-M-LABEL: name: urem_i15 ; CHECK-M-LABEL: name: urem_i15
; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32767 ; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32767
; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]] ; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
; CHECK-M-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32767 ; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32767
; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]] ; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]]
; CHECK-M-NEXT: [[UREM:%[0-9]+]]:_(s64) = G_UREM [[AND]], [[AND1]] ; CHECK-M-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[AND1]](s64)
; CHECK-M-NEXT: $x10 = COPY [[UREM]](s64) ; CHECK-M-NEXT: [[UREM:%[0-9]+]]:_(s32) = G_UREM [[TRUNC]], [[TRUNC1]]
; CHECK-M-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UREM]](s32)
; CHECK-M-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10 ; CHECK-M-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s15) = G_TRUNC %0(s64) %2:_(s15) = G_TRUNC %0(s64)
%3:_(s15) = G_TRUNC %1(s64) %3:_(s15) = G_TRUNC %1(s64)
%4:_(s15) = G_UREM %2, %3 %4:_(s15) = G_UREM %2, %3
%5:_(s64) = G_ANYEXT %4(s15) %5:_(s64) = G_ANYEXT %4(s15)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
Show All 18 Lines bb.0.entry:
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64) ; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
; CHECK-I-NEXT: PseudoRET implicit $x10 ; CHECK-I-NEXT: PseudoRET implicit $x10
; ;
; CHECK-M-LABEL: name: urem_i16 ; CHECK-M-LABEL: name: urem_i16
; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535 ; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]] ; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
; CHECK-M-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535 ; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]] ; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]]
; CHECK-M-NEXT: [[UREM:%[0-9]+]]:_(s64) = G_UREM [[AND]], [[AND1]] ; CHECK-M-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[AND1]](s64)
; CHECK-M-NEXT: $x10 = COPY [[UREM]](s64) ; CHECK-M-NEXT: [[UREM:%[0-9]+]]:_(s32) = G_UREM [[TRUNC]], [[TRUNC1]]
; CHECK-M-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UREM]](s32)
; CHECK-M-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10 ; CHECK-M-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s16) = G_TRUNC %0(s64) %2:_(s16) = G_TRUNC %0(s64)
%3:_(s16) = G_TRUNC %1(s64) %3:_(s16) = G_TRUNC %1(s64)
%4:_(s16) = G_UREM %2, %3 %4:_(s16) = G_UREM %2, %3
%5:_(s64) = G_ANYEXT %4(s16) %5:_(s64) = G_ANYEXT %4(s16)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
Show All 16 Lines bb.0.entry:
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__umoddi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__umoddi3, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64) ; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
; CHECK-I-NEXT: PseudoRET implicit $x10 ; CHECK-I-NEXT: PseudoRET implicit $x10
; ;
; CHECK-M-LABEL: name: urem_i32 ; CHECK-M-LABEL: name: urem_i32
; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-M: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295 ; CHECK-M-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]] ; CHECK-M-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295 ; CHECK-M-NEXT: [[UREM:%[0-9]+]]:_(s32) = G_UREM [[TRUNC]], [[TRUNC1]]
; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]] ; CHECK-M-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UREM]](s32)
; CHECK-M-NEXT: [[UREM:%[0-9]+]]:_(s64) = G_UREM [[AND]], [[AND1]] ; CHECK-M-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-M-NEXT: $x10 = COPY [[UREM]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10 ; CHECK-M-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s32) = G_TRUNC %0(s64) %2:_(s32) = G_TRUNC %0(s64)
%3:_(s32) = G_TRUNC %1(s64) %3:_(s32) = G_TRUNC %1(s64)
%4:_(s32) = G_UREM %2, %3 %4:_(s32) = G_UREM %2, %3
%5:_(s64) = G_ANYEXT %4(s32) %5:_(s64) = G_ANYEXT %4(s32)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
▲ Show 20 Lines • Show All 145 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-shl.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
--- ---
name: shl_i8 name: shl_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: shl_i8 ; CHECK-LABEL: name: shl_i8
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 255 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]]
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[AND]](s64) ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
; CHECK-NEXT: $x10 = COPY [[SHL]](s64) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC1]], [[TRUNC]](s32)
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SHL]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s8) = G_TRUNC %0(s64) %2:_(s8) = G_TRUNC %0(s64)
%3:_(s8) = G_TRUNC %1(s64) %3:_(s8) = G_TRUNC %1(s64)
%4:_(s8) = G_SHL %2, %3 %4:_(s8) = G_SHL %2, %3
%5:_(s64) = G_ANYEXT %4(s8) %5:_(s64) = G_ANYEXT %4(s8)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: shl_i15 name: shl_i15
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: shl_i15 ; CHECK-LABEL: name: shl_i15
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32767 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32767
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]]
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[AND]](s64) ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
; CHECK-NEXT: $x10 = COPY [[SHL]](s64) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC1]], [[TRUNC]](s32)
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SHL]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s15) = G_TRUNC %0(s64) %2:_(s15) = G_TRUNC %0(s64)
%3:_(s15) = G_TRUNC %1(s64) %3:_(s15) = G_TRUNC %1(s64)
%4:_(s15) = G_SHL %2, %3 %4:_(s15) = G_SHL %2, %3
%5:_(s64) = G_ANYEXT %4(s15) %5:_(s64) = G_ANYEXT %4(s15)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: shl_i16 name: shl_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: shl_i16 ; CHECK-LABEL: name: shl_i16
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]]
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[AND]](s64) ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
; CHECK-NEXT: $x10 = COPY [[SHL]](s64) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC1]], [[TRUNC]](s32)
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SHL]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s16) = G_TRUNC %0(s64) %2:_(s16) = G_TRUNC %0(s64)
%3:_(s16) = G_TRUNC %1(s64) %3:_(s16) = G_TRUNC %1(s64)
%4:_(s16) = G_SHL %2, %3 %4:_(s16) = G_SHL %2, %3
%5:_(s64) = G_ANYEXT %4(s16) %5:_(s64) = G_ANYEXT %4(s16)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: shl_i32 name: shl_i32
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: shl_i32 ; CHECK-LABEL: name: shl_i32
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]] ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[AND]](s64) ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC]], [[TRUNC1]](s32)
; CHECK-NEXT: $x10 = COPY [[SHL]](s64) ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SHL]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s32) = G_TRUNC %0(s64) %2:_(s32) = G_TRUNC %0(s64)
%3:_(s32) = G_TRUNC %1(s64) %3:_(s32) = G_TRUNC %1(s64)
%4:_(s32) = G_SHL %2, %3 %4:_(s32) = G_SHL %2, %3
%5:_(s64) = G_ANYEXT %4(s32) %5:_(s64) = G_ANYEXT %4(s32)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
▲ Show 20 Lines • Show All 214 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-store.mir

Show All 18 Linesbody: |
bb.1: bb.1:
liveins: $x10, $x11 liveins: $x10, $x11
; CHECK-LABEL: name: store_i8 ; CHECK-LABEL: name: store_i8
; CHECK: liveins: $x10, $x11 ; CHECK: liveins: $x10, $x11
; CHECK-NEXT: {{ $}} ; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
; CHECK-NEXT: G_STORE [[COPY]](s64), [[COPY1]](p0) :: (store (s8)) ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: G_STORE [[TRUNC]](s32), [[COPY1]](p0) :: (store (s8))
; CHECK-NEXT: PseudoRET ; CHECK-NEXT: PseudoRET
%2:_(s64) = COPY $x10 %2:_(s64) = COPY $x10
%0:_(s8) = G_TRUNC %2(s64) %0:_(s8) = G_TRUNC %2(s64)
%1:_(p0) = COPY $x11 %1:_(p0) = COPY $x11
G_STORE %0(s8), %1(p0) :: (store (s8)) G_STORE %0(s8), %1(p0) :: (store (s8))
PseudoRET PseudoRET
... ...
Show All 14 Linesbody: |
bb.1: bb.1:
liveins: $x10, $x11 liveins: $x10, $x11
; CHECK-LABEL: name: store_i16 ; CHECK-LABEL: name: store_i16
; CHECK: liveins: $x10, $x11 ; CHECK: liveins: $x10, $x11
; CHECK-NEXT: {{ $}} ; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
; CHECK-NEXT: G_STORE [[COPY]](s64), [[COPY1]](p0) :: (store (s16)) ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: G_STORE [[TRUNC]](s32), [[COPY1]](p0) :: (store (s16))
; CHECK-NEXT: PseudoRET ; CHECK-NEXT: PseudoRET
%2:_(s64) = COPY $x10 %2:_(s64) = COPY $x10
%0:_(s16) = G_TRUNC %2(s64) %0:_(s16) = G_TRUNC %2(s64)
%1:_(p0) = COPY $x11 %1:_(p0) = COPY $x11
G_STORE %0(s16), %1(p0) :: (store (s16)) G_STORE %0(s16), %1(p0) :: (store (s16))
PseudoRET PseudoRET
... ...
Show All 13 Lines
body: | body: |
bb.1: bb.1:
liveins: $x10, $x11 liveins: $x10, $x11
; CHECK-LABEL: name: store_i32 ; CHECK-LABEL: name: store_i32
; CHECK: liveins: $x10, $x11 ; CHECK: liveins: $x10, $x11
; CHECK-NEXT: {{ $}} ; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
; CHECK-NEXT: G_STORE [[COPY]](s64), [[COPY1]](p0) :: (store (s32)) ; CHECK-NEXT: G_STORE [[TRUNC]](s32), [[COPY1]](p0) :: (store (s32))
; CHECK-NEXT: PseudoRET ; CHECK-NEXT: PseudoRET
%2:_(s64) = COPY $x10 %2:_(s64) = COPY $x10
%0:_(s32) = G_TRUNC %2(s64) %0:_(s32) = G_TRUNC %2(s64)
%1:_(p0) = COPY $x11 %1:_(p0) = COPY $x11
G_STORE %0(s32), %1(p0) :: (store (s32)) G_STORE %0(s32), %1(p0) :: (store (s32))
PseudoRET PseudoRET
... ...
▲ Show 20 Lines • Show All 101 Lines • ▼ Show 20 Linesbody: |
bb.1: bb.1:
liveins: $x10, $x11 liveins: $x10, $x11
; CHECK-LABEL: name: store_i16_unaligned ; CHECK-LABEL: name: store_i16_unaligned
; CHECK: liveins: $x10, $x11 ; CHECK: liveins: $x10, $x11
; CHECK-NEXT: {{ $}} ; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[AND]], [[C]](s64) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[TRUNC1]], [[C]](s32)
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY1]], [[C2]](s64) ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY1]], [[C2]](s64)
; CHECK-NEXT: G_STORE [[COPY]](s64), [[COPY1]](p0) :: (store (s8)) ; CHECK-NEXT: G_STORE [[TRUNC]](s32), [[COPY1]](p0) :: (store (s8))
; CHECK-NEXT: G_STORE [[LSHR]](s64), [[PTR_ADD]](p0) :: (store (s8) into unknown-address + 1) ; CHECK-NEXT: G_STORE [[LSHR]](s32), [[PTR_ADD]](p0) :: (store (s8) into unknown-address + 1)
; CHECK-NEXT: PseudoRET ; CHECK-NEXT: PseudoRET
%2:_(s64) = COPY $x10 %2:_(s64) = COPY $x10
%0:_(s16) = G_TRUNC %2(s64) %0:_(s16) = G_TRUNC %2(s64)
%1:_(p0) = COPY $x11 %1:_(p0) = COPY $x11
G_STORE %0(s16), %1(p0) :: (store (s16), align 1) G_STORE %0(s16), %1(p0) :: (store (s16), align 1)
PseudoRET PseudoRET
... ...
Show All 13 Lines
body: | body: |
bb.1: bb.1:
liveins: $x10, $x11 liveins: $x10, $x11
; CHECK-LABEL: name: store_i32_unaligned ; CHECK-LABEL: name: store_i32_unaligned
; CHECK: liveins: $x10, $x11 ; CHECK: liveins: $x10, $x11
; CHECK-NEXT: {{ $}} ; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[TRUNC]](s32)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]] ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY2]], [[C]](s32)
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[AND]], [[C]](s64) ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY1]], [[C1]](s64)
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY1]], [[C2]](s64) ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C3]]
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C4]] ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[AND]](s64)
; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[AND1]], [[C3]](s64) ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[TRUNC1]], [[C2]](s32)
; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 ; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY1]], [[C5]](s64) ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY1]], [[C4]](s64)
; CHECK-NEXT: G_STORE [[COPY]](s64), [[COPY1]](p0) :: (store (s8)) ; CHECK-NEXT: G_STORE [[COPY2]](s32), [[COPY1]](p0) :: (store (s8))
; CHECK-NEXT: G_STORE [[LSHR1]](s64), [[PTR_ADD1]](p0) :: (store (s8) into unknown-address + 1) ; CHECK-NEXT: G_STORE [[LSHR1]](s32), [[PTR_ADD1]](p0) :: (store (s8) into unknown-address + 1)
; CHECK-NEXT: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 ; CHECK-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK-NEXT: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[LSHR]](s32)
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[LSHR]], [[C7]] ; CHECK-NEXT: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[AND2]], [[C6]](s64) ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[ANYEXT]], [[C6]]
; CHECK-NEXT: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[AND1]](s64)
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[C8]](s64) ; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[TRUNC2]], [[C5]](s32)
; CHECK-NEXT: G_STORE [[LSHR]](s64), [[PTR_ADD]](p0) :: (store (s8) into unknown-address + 2) ; CHECK-NEXT: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: G_STORE [[LSHR2]](s64), [[PTR_ADD2]](p0) :: (store (s8) into unknown-address + 3) ; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[C7]](s64)
; CHECK-NEXT: G_STORE [[LSHR]](s32), [[PTR_ADD]](p0) :: (store (s8) into unknown-address + 2)
; CHECK-NEXT: G_STORE [[LSHR2]](s32), [[PTR_ADD2]](p0) :: (store (s8) into unknown-address + 3)
; CHECK-NEXT: PseudoRET ; CHECK-NEXT: PseudoRET
%2:_(s64) = COPY $x10 %2:_(s64) = COPY $x10
%0:_(s32) = G_TRUNC %2(s64) %0:_(s32) = G_TRUNC %2(s64)
%1:_(p0) = COPY $x11 %1:_(p0) = COPY $x11
G_STORE %0(s32), %1(p0) :: (store (s32), align 1) G_STORE %0(s32), %1(p0) :: (store (s32), align 1)
PseudoRET PseudoRET
... ...
Show All 13 Lines
body: | body: |
bb.1: bb.1:
liveins: $x10, $x11 liveins: $x10, $x11
; CHECK-LABEL: name: store_i32_align2 ; CHECK-LABEL: name: store_i32_align2
; CHECK: liveins: $x10, $x11 ; CHECK: liveins: $x10, $x11
; CHECK-NEXT: {{ $}} ; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[TRUNC]](s32)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]] ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY2]], [[C]](s32)
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[AND]], [[C]](s64) ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY1]], [[C1]](s64)
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY1]], [[C2]](s64) ; CHECK-NEXT: G_STORE [[COPY2]](s32), [[COPY1]](p0) :: (store (s16))
; CHECK-NEXT: G_STORE [[COPY]](s64), [[COPY1]](p0) :: (store (s16)) ; CHECK-NEXT: G_STORE [[LSHR]](s32), [[PTR_ADD]](p0) :: (store (s16) into unknown-address + 2)
; CHECK-NEXT: G_STORE [[LSHR]](s64), [[PTR_ADD]](p0) :: (store (s16) into unknown-address + 2)
; CHECK-NEXT: PseudoRET ; CHECK-NEXT: PseudoRET
%2:_(s64) = COPY $x10 %2:_(s64) = COPY $x10
%0:_(s32) = G_TRUNC %2(s64) %0:_(s32) = G_TRUNC %2(s64)
%1:_(p0) = COPY $x11 %1:_(p0) = COPY $x11
G_STORE %0(s32), %1(p0) :: (store (s32), align 2) G_STORE %0(s32), %1(p0) :: (store (s32), align 2)
PseudoRET PseudoRET
... ...
Show All 18 Lines bb.1:
; CHECK-NEXT: {{ $}} ; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY [[COPY]](s64) ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY [[COPY]](s64)
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY2]], [[C]](s64) ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY2]], [[C]](s64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY1]], [[C1]](s64) ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY1]], [[C1]](s64)
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY2]](s64)
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY2]], [[C3]] ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[TRUNC]], [[C2]](s32)
; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[AND]], [[C2]](s64) ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY1]], [[C3]](s64)
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY1]], [[C4]](s64) ; CHECK-NEXT: G_STORE [[TRUNC]](s32), [[COPY1]](p0) :: (store (s16))
; CHECK-NEXT: G_STORE [[COPY2]](s64), [[COPY1]](p0) :: (store (s16)) ; CHECK-NEXT: G_STORE [[LSHR1]](s32), [[PTR_ADD1]](p0) :: (store (s16) into unknown-address + 2)
; CHECK-NEXT: G_STORE [[LSHR1]](s64), [[PTR_ADD1]](p0) :: (store (s16) into unknown-address + 2) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[LSHR]](s64)
; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 ; CHECK-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK-NEXT: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295 ; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[TRUNC1]], [[C4]](s32)
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[LSHR]], [[C6]] ; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[AND1]], [[C5]](s64) ; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[C5]](s64)
; CHECK-NEXT: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 ; CHECK-NEXT: G_STORE [[TRUNC1]](s32), [[PTR_ADD]](p0) :: (store (s16) into unknown-address + 4)
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[C7]](s64) ; CHECK-NEXT: G_STORE [[LSHR2]](s32), [[PTR_ADD2]](p0) :: (store (s16) into unknown-address + 6)
; CHECK-NEXT: G_STORE [[LSHR]](s64), [[PTR_ADD]](p0) :: (store (s16) into unknown-address + 4)
; CHECK-NEXT: G_STORE [[LSHR2]](s64), [[PTR_ADD2]](p0) :: (store (s16) into unknown-address + 6)
; CHECK-NEXT: PseudoRET ; CHECK-NEXT: PseudoRET
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(p0) = COPY $x11 %1:_(p0) = COPY $x11
G_STORE %0(s64), %1(p0) :: (store (s64), align 2) G_STORE %0(s64), %1(p0) :: (store (s64), align 2)
PseudoRET PseudoRET
... ...

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-sub.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
--- ---
name: sub_i8 name: sub_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: sub_i8 ; CHECK-LABEL: name: sub_i8
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[COPY1]] ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: $x10 = COPY [[SUB]](s64) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[TRUNC1]]
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SUB]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s8) = G_TRUNC %0(s64) %2:_(s8) = G_TRUNC %0(s64)
%3:_(s8) = G_TRUNC %1(s64) %3:_(s8) = G_TRUNC %1(s64)
%4:_(s8) = G_SUB %2, %3 %4:_(s8) = G_SUB %2, %3
%5:_(s64) = G_ANYEXT %4(s8) %5:_(s64) = G_ANYEXT %4(s8)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: sub_i15 name: sub_i15
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: sub_i15 ; CHECK-LABEL: name: sub_i15
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[COPY1]] ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: $x10 = COPY [[SUB]](s64) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[TRUNC1]]
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SUB]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s15) = G_TRUNC %0(s64) %2:_(s15) = G_TRUNC %0(s64)
%3:_(s15) = G_TRUNC %1(s64) %3:_(s15) = G_TRUNC %1(s64)
%4:_(s15) = G_SUB %2, %3 %4:_(s15) = G_SUB %2, %3
%5:_(s64) = G_ANYEXT %4(s15) %5:_(s64) = G_ANYEXT %4(s15)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: sub_i16 name: sub_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: sub_i16 ; CHECK-LABEL: name: sub_i16
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[COPY1]] ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: $x10 = COPY [[SUB]](s64) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[TRUNC1]]
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SUB]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s16) = G_TRUNC %0(s64) %2:_(s16) = G_TRUNC %0(s64)
%3:_(s16) = G_TRUNC %1(s64) %3:_(s16) = G_TRUNC %1(s64)
%4:_(s16) = G_SUB %2, %3 %4:_(s16) = G_SUB %2, %3
%5:_(s64) = G_ANYEXT %4(s16) %5:_(s64) = G_ANYEXT %4(s16)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: sub_i32 name: sub_i32
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: sub_i32 ; CHECK-LABEL: name: sub_i32
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[COPY1]] ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: $x10 = COPY [[SUB]](s64) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[TRUNC1]]
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SUB]](s32)
; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s32) = G_TRUNC %0(s64) %2:_(s32) = G_TRUNC %0(s64)
%3:_(s32) = G_TRUNC %1(s64) %3:_(s32) = G_TRUNC %1(s64)
%4:_(s32) = G_SUB %2, %3 %4:_(s32) = G_SUB %2, %3
%5:_(s64) = G_ANYEXT %4(s32) %5:_(s64) = G_ANYEXT %4(s32)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
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