[ELF] - Place RW sections that go after relro to another memory page.

[grimar]

Summary

Ian Lance Taylor writes:
"When the dynamic linker sees a PT_GNU_RELRO segment, it uses mprotect to mark the pages as read-only after the dynamic relocations have been applied. Of course this only works if the segment does in fact cover an entire page. The linker will try to force this to happen." (http://www.airs.com/blog/archives/189).

Before this patch sections that go after relro sequence were placed at the same memory page with relro ones. It caused segmentation fault on freebsd.
This should fix the https://llvm.org/bugs/show_bug.cgi?id=25790 (I have no freebsd to check)

[emaste]

This should fix the https://llvm.org/bugs/show_bug.cgi?id=25790 (I have no freebsd to check)

Confirmed, this fixes PR25790.

(I'm curious what happened on Linux (glibc) though -- does it leave the page RW, effectively disabling (some of) relro?)

[ruiu]

ELF/Writer.cpp

913

What does this condition mean? (Particularly, why do you have to check for PF_W?)

915

What's the meaning of this flag?

980

Can you add new code here?

if (/* Some expression to check if the last section is in RELRO but the current one is not */) {
  VA = RoundUpToAlignment(VA, Target->getPageSize());
  FileOff = RoundUpToAlignment(FileOff, Target->getPageSize());
}

[grimar]

In D15423#307307, @emaste wrote:

This should fix the https://llvm.org/bugs/show_bug.cgi?id=25790 (I have no freebsd to check)

Confirmed, this fixes PR25790.

(I'm curious what happened on Linux (glibc) though -- does it leave the page RW, effectively disabling (some of) relro?)

I am also very curious about that. There are no many choices, so i also think it disables it partially or fully, but I didn`t check.

[grimar]

• Review comments addressed.
• Renamed GnuRelroPhdr to RelroPhdr and GnuRelroAligned to RelroAligned to pacify clang-format.

[grimar]

Renamed GnuRelroPhdr to RelroPhdr in methods signatures (forgot to do that in prev diff).

[grimar]

ELF/Writer.cpp

913

That this condition checks if we already ended proccessing the relro sections or not.
If !Config->ZRelro then we are not anyways. If we are in a writable segment and isRelroSection then we are still processing.
updateRelro() also checks if we are still in a writable segment.
Thats just for additional safety I think. I guess using linkerscript we can place some of them to not writable segment for example (not sure for what), so its just checks that we are still doing what was supposed: preparing sections to be converted from W to R.

915

Flag has same use meaning as it used for in updateRelro(). If p_type is not set then PT_GNU_RELRO header was not "updated" yet. What means we didn`t start to proccess the relro sections sequence. If it is set and we are here then it we are somewhere after relro.

980

Done.

[grimar]

• Rebased.

[ruiu]

ELF/Writer.cpp

911–920

Can you rename this isFirstNonRelroSection? I think it conveys the meaning better.

915

Please add that as a comment.

// p_type is zero if we have not created RELRO PHDR yet.

958

Do you need this boolean variable? Because of the p_type check, I think isRelroEnded returns true only once.

[grimar]

Review comments addressed.

[grimar]

ELF/Writer.cpp

911–920

Method unfortunately does not return is that is first non relro section or not.
"unfortunately" because it seems not to be possible to know here without additional flags outside.
Please see my comment for "bool RelroAligned = false;" below.
I renamed it to isPostRelroSection.

915

Done.

958

It will return true for each section after relro. Thats why I need that flag.
Lets look again on conditions:

if (!Config->ZRelro || ((Cur->p_flags & PF_W) && isRelroSection(Sec)))
  return false;
return RelroPhdr->p_type;

If current section is not relro or not in writable segment it will return p_type, which is here can be:

1. zero - if we did not start proccessing the relro yet. So this flag was never set.
2. non zero - if we had relro and finished with it.

So because of second I need to know if current section is the first section after relro or not, that is for what flag is there,

[• rafael]

I think this can be better expressed my moving the "is in relro" check
out of the method.

What do you think of the attached variation?

Cheers,
Rafael

• t.diff97 KBDownload

[grimar]

In D15423#315938, @rafael wrote:

What do you think of the attached variation?

Works for me. btw, updateRelro() in variation does not need Sec argument then.

template <class ELFT>
void Writer<ELFT>::updateRelro(Elf_Phdr *Cur, Elf_Phdr *GnuRelroPhdr,
                               OutputSectionBase<ELFT> *Sec, uintX_t VA) {
  if (!GnuRelroPhdr->p_type)
    setPhdr(GnuRelroPhdr, PT_GNU_RELRO, PF_R, Cur->p_offset, Cur->p_vaddr,
            VA - Cur->p_vaddr, 1 /*p_align*/);
  GnuRelroPhdr->p_filesz = VA - Cur->p_vaddr;
  GnuRelroPhdr->p_memsz = VA - Cur->p_vaddr;
}

[• rafael]

Thanks!

I also refactored the code so that there is only one point where we do
page alignments.

• t.diff97 KBDownload

[grimar]

In D15423#316125, @rafael wrote:

Thanks!

I also refactored the code so that there is only one point where we do
page alignments.

Nice. Will you commit then ?

[• rafael]

r256334. Thanks!

[grimar]

Accept since commited r256334.
Thanks to Rafael for improvements.

ELF/Writer.cpp

 private:
   void copyLocalSymbols();
   void createSections();
   template <bool isRela>
   void scanRelocs(InputSectionBase<ELFT> &C,
                   iterator_range<const Elf_Rel_Impl<ELFT, isRela> *> Rels);
   void scanRelocs(InputSection<ELFT> &C);
   void scanRelocs(InputSectionBase<ELFT> &S, const Elf_Shdr &RelSec);
-  void updateRelro(Elf_Phdr *Cur, Elf_Phdr *GnuRelroPhdr,
+  void updateRelro(Elf_Phdr *Cur, Elf_Phdr *RelroPhdr,
                    OutputSectionBase<ELFT> *Sec, uintX_t VA);
+  bool isPostRelroSection(Elf_Phdr *Cur, Elf_Phdr *RelroPhdr,
+                          OutputSectionBase<ELFT> *Sec);
   void assignAddresses();
   void buildSectionMap();
   void openFile(StringRef OutputPath);
   void writeHeader();
   void writeSections();
   bool isDiscarded(InputSectionBase<ELFT> *IS) const;
   StringRef getOutputSectionName(StringRef S) const;
   bool needsInterpSection() const {
static uint32_t toPhdrFlags(uint64_t Flags) {
   if (Flags & SHF_WRITE)
     Ret |= PF_W;
   if (Flags & SHF_EXECINSTR)
     Ret |= PF_X;
   return Ret;
 }
 
 template <class ELFT>
-void Writer<ELFT>::updateRelro(Elf_Phdr *Cur, Elf_Phdr *GnuRelroPhdr,
+bool Writer<ELFT>::isPostRelroSection(Elf_Phdr *Cur, Elf_Phdr *RelroPhdr,
+                                      OutputSectionBase<ELFT> *Sec) {
+  if (!Config->ZRelro || ((Cur->p_flags & PF_W) && isRelroSection(Sec)))
+    return false;
+  // p_type is zero if we have not created RELRO PHDR yet.
+  return RelroPhdr->p_type;
+}
+
+template <class ELFT>
+void Writer<ELFT>::updateRelro(Elf_Phdr *Cur, Elf_Phdr *RelroPhdr,
                                OutputSectionBase<ELFT> *Sec, uintX_t VA) {
   if (!Config->ZRelro || !(Cur->p_flags & PF_W) || !isRelroSection(Sec))
     return;
-  if (!GnuRelroPhdr->p_type)
-    setPhdr(GnuRelroPhdr, PT_GNU_RELRO, PF_R, Cur->p_offset, Cur->p_vaddr,
+  if (!RelroPhdr->p_type)
+    setPhdr(RelroPhdr, PT_GNU_RELRO, PF_R, Cur->p_offset, Cur->p_vaddr,
             VA - Cur->p_vaddr, 1 /*p_align*/);
-  GnuRelroPhdr->p_filesz = VA - Cur->p_vaddr;
-  GnuRelroPhdr->p_memsz = VA - Cur->p_vaddr;
+  RelroPhdr->p_filesz = VA - Cur->p_vaddr;
+  RelroPhdr->p_memsz = VA - Cur->p_vaddr;
 }
 
 // Visits all sections to create PHDRs and to assign incremental,
 // non-overlapping addresses to output sections.
 template <class ELFT> void Writer<ELFT>::assignAddresses() {
   uintX_t VA = Target->getVAStart() + sizeof(Elf_Ehdr);
   uintX_t FileOff = sizeof(Elf_Ehdr);
 
template <class ELFT> void Writer<ELFT>::assignAddresses() {
   Elf_Phdr *Interp = nullptr;
   if (needsInterpSection())
     Interp = &Phdrs[++PhdrIdx];
 
   // Add the first PT_LOAD segment for regular output sections.
   setPhdr(&Phdrs[++PhdrIdx], PT_LOAD, PF_R, 0, Target->getVAStart(), FileOff,
           Target->getPageSize());
 
-  Elf_Phdr GnuRelroPhdr = {};
+  Elf_Phdr RelroPhdr = {};
+  bool RelroAligned = false;
   Elf_Phdr TlsPhdr{};
   uintX_t ThreadBSSOffset = 0;
   // Create phdrs as we assign VAs and file offsets to all output sections.
   for (OutputSectionBase<ELFT> *Sec : OutputSections) {
     if (needsPhdr<ELFT>(Sec)) {
       uintX_t Flags = toPhdrFlags(Sec->getFlags());
       if (Phdrs[PhdrIdx].p_flags != Flags) {
         // Flags changed. Create a new PT_LOAD.
         VA = RoundUpToAlignment(VA, Target->getPageSize());
         FileOff = RoundUpToAlignment(FileOff, Target->getPageSize());
         Elf_Phdr *PH = &Phdrs[++PhdrIdx];
         setPhdr(PH, PT_LOAD, Flags, FileOff, VA, 0, Target->getPageSize());
       }
 
+      if (!RelroAligned &&
+          isPostRelroSection(&Phdrs[PhdrIdx], &RelroPhdr, Sec)) {
+        VA = RoundUpToAlignment(VA, Target->getPageSize());
+        FileOff = RoundUpToAlignment(FileOff, Target->getPageSize());
+        RelroAligned = true;
+      }
+
       if (Sec->getFlags() & SHF_TLS) {
         if (!TlsPhdr.p_vaddr)
           setPhdr(&TlsPhdr, PT_TLS, PF_R, FileOff, VA, 0, Sec->getAlign());
         if (Sec->getType() != SHT_NOBITS)
           VA = RoundUpToAlignment(VA, Sec->getAlign());
         uintX_t TVA = RoundUpToAlignment(VA + ThreadBSSOffset, Sec->getAlign());
         Sec->setVA(TVA);
         TlsPhdr.p_memsz += Sec->getSize();
         if (Sec->getType() == SHT_NOBITS) {
           ThreadBSSOffset = TVA - VA + Sec->getSize();
         } else {
           TlsPhdr.p_filesz += Sec->getSize();
           VA += Sec->getSize();
         }
         TlsPhdr.p_align = std::max<uintX_t>(TlsPhdr.p_align, Sec->getAlign());
       } else {
         VA = RoundUpToAlignment(VA, Sec->getAlign());
         Sec->setVA(VA);
         VA += Sec->getSize();
-        updateRelro(&Phdrs[PhdrIdx], &GnuRelroPhdr, Sec, VA);
+        updateRelro(&Phdrs[PhdrIdx], &RelroPhdr, Sec, VA);
       }
     }
 
     FileOff = RoundUpToAlignment(FileOff, Sec->getAlign());
     Sec->setFileOffset(FileOff);
     if (Sec->getType() != SHT_NOBITS)
       FileOff += Sec->getSize();
     if (needsPhdr<ELFT>(Sec)) {
template <class ELFT> void Writer<ELFT>::assignAddresses() {
   if (isOutputDynamic()) {
     Elf_Phdr *PH = &Phdrs[++PhdrIdx];
     PH->p_type = PT_DYNAMIC;
     copyPhdr(PH, Out<ELFT>::Dynamic);
   }
 
   if (HasRelro) {
     Elf_Phdr *PH = &Phdrs[++PhdrIdx];
-    *PH = GnuRelroPhdr;
+    *PH = RelroPhdr;
   }
 
   // PT_GNU_STACK is a special section to tell the loader to make the
   // pages for the stack non-executable.
   if (!Config->ZExecStack) {
     Elf_Phdr *PH = &Phdrs[++PhdrIdx];
     PH->p_type = PT_GNU_STACK;
     PH->p_flags = PF_R | PF_W;

test/ELF/aarch64-copy.s

.data
     .word z
 
 // CHECK:     Name: .bss
 // CHECK-NEXT:     Type: SHT_NOBITS
 // CHECK-NEXT:     Flags [
 // CHECK-NEXT:       SHF_ALLOC
 // CHECK-NEXT:       SHF_WRITE
 // CHECK-NEXT:     ]
-// CHECK-NEXT:     Address: 0x120B0
+// CHECK-NEXT:     Address: 0x13010
 // CHECK-NEXT:     Offset:
 // CHECK-NEXT:     Size: 24
 // CHECK-NEXT:     Link:
 // CHECK-NEXT:     Info:
 // CHECK-NEXT:     AddressAlignment: 16
 
 // CHECK: Relocations [
 // CHECK-NEXT:   Section ({{.*}}) .rela.dyn {
 // CHECK-NEXT:     Relocation {
-// CHECK-NEXT:       Offset: 0x120B0
+// CHECK-NEXT:       Offset: 0x13010
 // CHECK-NEXT:       Type: R_AARCH64_COPY
 // CHECK-NEXT:       Symbol: x
 // CHECK-NEXT:       Addend: 0x0
 // CHECK-NEXT:     }
 // CHECK-NEXT:     Relocation {
-// CHECK-NEXT:       Offset: 0x120C0
+// CHECK-NEXT:       Offset: 0x13020
 // CHECK-NEXT:       Type: R_AARCH64_COPY
 // CHECK-NEXT:       Symbol: y
 // CHECK-NEXT:       Addend: 0x0
 // CHECK-NEXT:     }
 // CHECK-NEXT:     Relocation {
-// CHECK-NEXT:       Offset: 0x120C4
+// CHECK-NEXT:       Offset: 0x13024
 // CHECK-NEXT:       Type: R_AARCH64_COPY
 // CHECK-NEXT:       Symbol: z
 // CHECK-NEXT:       Addend: 0x0
 // CHECK-NEXT:     }
 // CHECK-NEXT:   }
 // CHECK-NEXT: ]
 
 // CHECK: Symbols [
 // CHECK:     Name: x
-// CHECK-NEXT:     Value: 0x120B0
+// CHECK-NEXT:     Value: 0x13010
 // CHECK-NEXT:     Size: 4
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: Object
 // CHECK-NEXT:     Other:
 // CHECK-NEXT:     Section: .bss
 // CHECK:     Name: y
-// CHECK-NEXT:     Value: 0x120C0
+// CHECK-NEXT:     Value: 0x13020
 // CHECK-NEXT:     Size: 4
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: Object
 // CHECK-NEXT:     Other:
 // CHECK-NEXT:     Section: .bss
 // CHECK:     Name: z
-// CHECK-NEXT:     Value: 0x120C4
+// CHECK-NEXT:     Value: 0x13024
 // CHECK-NEXT:     Size: 4
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: Object
 // CHECK-NEXT:     Other:
 // CHECK-NEXT:     Section: .bss
 // CHECK: ]
 
 // CODE: Disassembly of section .text:
 // CODE-NEXT: _start:
-// S(x) = 0x120B0, A = 0, P = 0x11000
-// S + A - P = 0x10B0 = 4272
-// CODE-NEXT:  11000: {{.*}} adr  x1, #4272
-// S(y) = 0x120C0, A = 0, P = 0x11004
-// Page(S + A) - Page(P) = 0x12000 - 0x11000 = 0x1000 - 4096
-// CODE-NEXT:  11004: {{.*}} adrp x2, #4096
-// S(y) = 0x120C0, A = 0
-// (S + A) & 0xFFF = 0xC0 = 192
-// CODE-NEXT:  11008: {{.*}} add  x2, x2, #192
+// S(x) = 0x13010, A = 0, P = 0x11000
+// S + A - P = 0x10B0 = 8208
+// CODE-NEXT:  11000: {{.*}} adr  x1, #8208
+// S(y) = 0x13020, A = 0, P = 0x11004
+// Page(S + A) - Page(P) = 0x13000 - 0x11000 = 0x2000 = 8192
+// CODE-NEXT:  11004: {{.*}} adrp x2, #8192
+// S(y) = 0x13020, A = 0
+// (S + A) & 0xFFF = 0x20 = 32
+// CODE-NEXT:  11008: {{.*}} add  x2, x2, #32
 
 // DATA: Contents of section .data:
-// S(z) = 0x120c4
-// DATA-NEXT:  120a0 c4200100
+// S(z) = 0x13024
+// DATA-NEXT:  13000 24300100

test/ELF/dynamic-reloc-index.s

 // RUN: llvm-mc -filetype=obj -triple=x86_64-unknown-linux %s -o %t.o
 // RUN: llvm-mc -filetype=obj -triple=x86_64-unknown-linux %p/Inputs/shared.s -o %t2.o
 // RUN: ld.lld -shared %t2.o -o %t2.so
 // RUN: ld.lld %t.o %t2.so -o %t
 // RUN: llvm-readobj -r %t | FileCheck %s
 
 // We used to record the wrong symbol index for this test
 
 // CHECK:      Relocations [
 // CHECK-NEXT:   Section ({{.*}}) .rela.plt {
-// CHECK-NEXT:     0x120C8 R_X86_64_JUMP_SLOT bar 0x0
+// CHECK-NEXT:     0x13018 R_X86_64_JUMP_SLOT bar 0x0
 // CHECK-NEXT:   }
 // CHECK-NEXT: ]
 
         .global foobar
 foobar:
         .global zedx
 zedx:
         .global _start
 _start:
 .quad bar

test/ELF/dynamic-reloc.s

 // CHECK-NEXT:   SHF_ALLOC
 // CHECK-NEXT:   SHF_EXECINSTR
 // CHECK-NEXT: ]
 // CHECK-NEXT: Address: 0x11000
 
 // CHECK:      Relocations [
 // CHECK-NEXT:   Section ({{.*}}) .rela.plt {
 // CHECK-NEXT:     Relocation {
-// CHECK-NEXT:       Offset: 0x120C8
+// CHECK-NEXT:       Offset: 0x13018
 // CHECK-NEXT:       Type: R_X86_64_JUMP_SLOT
 // CHECK-NEXT:       Symbol: bar
 // CHECK-NEXT:       Addend: 0x0
 // CHECK-NEXT:     }
 // CHECK-NEXT:   }
 // CHECK-NEXT: ]
 
 // CHECK: DynamicSection [

test/ELF/mips-got-relocs.s

 v1:
   .word 0
 
 # EXE_SYM: Sections:
 # EXE_SYM: .got 0000000c 0000000000030000 DATA
 # EXE_SYM: SYMBOL TABLE:
 # EXE_SYM: 00037ff0         *ABS*    00000000 _gp
 #          ^-- .got + GP offset (0x7ff0)
-# EXE_SYM: 00030010 g       .data    00000004 v1
+# EXE_SYM: 00040000 g       .data    00000004 v1
 
 # EXE_GOT_BE: Contents of section .got:
-# EXE_GOT_BE:  30000 00000000 80000000 00030010
-#                    ^        ^        ^-- v1 (0x30010)
+# EXE_GOT_BE:  30000 00000000 80000000 00040000
+#                    ^        ^        ^-- v1 (0x40000)
 #                    |        +-- Module pointer (0x80000000)
 #                    +-- Lazy resolver (0x0)
 
 # EXE_GOT_EL: Contents of section .got:
-# EXE_GOT_EL:  30000 00000000 00000080 10000300
-#                    ^        ^        ^-- v1 (0x30010)
+# EXE_GOT_EL:  30000 00000000 00000080 00000400
+#                    ^        ^        ^-- v1 (0x40000)
 #                    |        +-- Module pointer (0x80000000)
 #                    +-- Lazy resolver (0x0)
 
 # v1GotAddr (0x3000c) - _gp (0x37ff4) = -0x7fe8 => 0x8018 = 32792
 # EXE_DIS_BE:  20000:  3c 02 80 18  lui $2, 32792
 # EXE_DIS_EL:  20000:  18 80 02 3c  lui $2, 32792
 
 # DSO_SYM: Sections:
 # DSO_SYM: .got 0000000c 0000000000020000 DATA
 # DSO_SYM: SYMBOL TABLE:
 # DSO_SYM: 00027ff0         *ABS*    00000000 _gp
 #          ^-- .got + GP offset (0x7ff0)
-# DSO_SYM: 00020010 g       .data    00000004 v1
+# DSO_SYM: 00030000 g       .data    00000004 v1
 
 # DSO_GOT_BE: Contents of section .got:
-# DSO_GOT_BE:  20000 00000000 80000000 00020010
-#                    ^        ^        ^-- v1 (0x20010)
+# DSO_GOT_BE:  20000 00000000 80000000 00030000
+#                    ^        ^        ^-- v1 (0x30000)
 #                    |        +-- Module pointer (0x80000000)
 #                    +-- Lazy resolver (0x0)
 
 # DSO_GOT_EL: Contents of section .got:
-# DSO_GOT_EL:  20000 00000000 00000080 10000200
-#                    ^        ^        ^-- v1 (0x20010)
+# DSO_GOT_EL:  20000 00000000 00000080 00000300
+#                    ^        ^        ^-- v1 (0x30000)
 #                    |        +-- Module pointer (0x80000000)
 #                    +-- Lazy resolver (0x0)
 
 # v1GotAddr (0x2000c) - _gp (0x27ff4) = -0x7fe8 => 0x8018 = 32792
 # DSO_DIS_BE:  10000:  3c 02 80 18  lui $2, 32792
 # DSO_DIS_EL:  10000:  18 80 02 3c  lui $2, 32792
 
 # NORELOC:      Relocations [
 # NORELOC-NEXT: ]
 
 # SHFLAGS:      Name: .got
 # SHFLAGS-NEXT: Type: SHT_PROGBITS
 # SHFLAGS-NEXT: Flags [ (0x10000003)
 #                        ^-- SHF_MIPS_GPREL | SHF_ALLOC | SHF_WRITE

test/ELF/plt-aarch64.s

 // CHECKDSO-NEXT:     AddressAlignment: 16
 
 // CHECKDSO:     Name: .got.plt
 // CHECKDSO-NEXT:     Type: SHT_PROGBITS
 // CHECKDSO-NEXT:     Flags [
 // CHECKDSO-NEXT:       SHF_ALLOC
 // CHECKDSO-NEXT:       SHF_WRITE
 // CHECKDSO-NEXT:     ]
-// CHECKDSO-NEXT:     Address: 0x20B0
+// CHECKDSO-NEXT:     Address: 0x3000
 // CHECKDSO-NEXT:     Offset:
 // CHECKDSO-NEXT:     Size: 48
 // CHECKDSO-NEXT:     Link:
 // CHECKDSO-NEXT:     Info:
 // CHECKDSO-NEXT:     AddressAlignment: 8
 
 // CHECKDSO: Relocations [
 // CHECKDSO-NEXT:   Section ({{.*}}) .rela.plt {
 
-// &(.got.plt[3]) = 0x20B0 + 3 * 8 = 0x20C8
-// CHECKDSO-NEXT:     0x20C8 R_AARCH64_JUMP_SLOT foo
+// &(.got.plt[3]) = 0x3000 + 3 * 8 = 0x3018
+// CHECKDSO-NEXT:     0x3018 R_AARCH64_JUMP_SLOT foo
 
-// &(.got.plt[4]) = 0x20B0 + 4 * 8 = 0x20D0
-// CHECKDSO-NEXT:     0x20D0 R_AARCH64_JUMP_SLOT bar
+// &(.got.plt[4]) = 0x3000 + 4 * 8 = 0x3020
+// CHECKDSO-NEXT:     0x3020 R_AARCH64_JUMP_SLOT bar
 
-// &(.got.plt[5]) = 0x20B0 + 5 * 8 = 0x20D8
-// CHECKDSO-NEXT:     0x20D8 R_AARCH64_JUMP_SLOT weak
+// &(.got.plt[5]) = 0x3000 + 5 * 8 = 0x3028
+// CHECKDSO-NEXT:     0x3028 R_AARCH64_JUMP_SLOT weak
 // CHECKDSO-NEXT:   }
 // CHECKDSO-NEXT: ]
 
 // DUMPDSO: Contents of section .got.plt:
 // .got.plt[0..2] = 0 (reserved)
 // .got.plt[3..5] = .plt = 0x1010
-// DUMPDSO-NEXT:  20b0 00000000 00000000 00000000 00000000  ................
-// DUMPDSO-NEXT:  20c0 00000000 00000000 10100000 00000000  ................
-// DUMPDSO-NEXT:  20d0 10100000 00000000 10100000 00000000  ................
+// DUMPDSO-NEXT:  3000 00000000 00000000 00000000 00000000  ................
+// DUMPDSO-NEXT:  3010 00000000 00000000 10100000 00000000  ................
+// DUMPDSO-NEXT:  3020 10100000 00000000 10100000 00000000  ................
 
 // DISASMDSO: _start:
 // 0x1030 - 0x1000 = 0x30 = 48
 // DISASMDSO-NEXT:     1000:  0c 00 00 14   b #48
 // 0x1040 - 0x1004 = 0x3c = 60
 // DISASMDSO-NEXT:     1004:  0f 00 00 14   b #60
 // 0x1050 - 0x1008 = 0x48 = 72
 // DISASMDSO-NEXT:     1008:  12 00 00 14   b #72
 
 // DISASMDSO: foo:
 // DISASMDSO-NEXT:     100c:  1f 20 03 d5   nop
 
 // DISASMDSO: Disassembly of section .plt:
 // DISASMDSO-NEXT: .plt:
 // DISASMDSO-NEXT:     1010:  f0 7b bf a9   stp x16, x30, [sp, #-16]!
-// &(.got.plt[2]) = 0x20B0 + 2 * 8 = 0x20C0
-// Page(0x20C0) - Page(0x1014) = 0x2000 - 0x1000 = 0x1000 = 4096
-// DISASMDSO-NEXT:     1014:  10 00 00 b0   adrp  x16, #4096
-// 0x20c0 & 0xFFF = 0xC0 = 192
-// DISASMDSO-NEXT:     1018:  11 62 40 f9   ldr x17, [x16, #192]
-// DISASMDSO-NEXT:     101c:  10 02 03 91   add x16, x16, #192
+// &(.got.plt[2]) = 0x3000 + 2 * 8 = 0x3010
+// Page(0x3010) - Page(0x1014) = 0x3000 - 0x1000 = 0x2000 = 8192
+// DISASMDSO-NEXT:     1014:  10 00 00 d0   adrp  x16, #8192
+// 0x3010 & 0xFFF = 0x10 = 16
+// DISASMDSO-NEXT:     1018:  11 0a 40 f9 ldr x17, [x16, #16]
+// DISASMDSO-NEXT:     101c:  10 42 00 91   add x16, x16, #16
 // DISASMDSO-NEXT:     1020:  20 02 1f d6   br  x17
 // DISASMDSO-NEXT:     1024:  1f 20 03 d5   nop
 // DISASMDSO-NEXT:     1028:  1f 20 03 d5   nop
 // DISASMDSO-NEXT:     102c:  1f 20 03 d5   nop
 
 // foo@plt
-// Page(0x20C8) - Page(0x1030) = 0x2000 - 0x1000 = 0x1000 = 4096
-// DISASMDSO-NEXT:     1030:  10 00 00 b0   adrp  x16, #4096
-// 0x20C8 & 0xFFF = 0xC8 = 200
-// DISASMDSO-NEXT:     1034:  11 66 40 f9   ldr x17, [x16, #200]
-// DISASMDSO-NEXT:     1038:  10 22 03 91   add x16, x16, #200
+// Page(0x3018) - Page(0x1030) = 0x3000 - 0x1000 = 0x2000 = 8192
+// DISASMDSO-NEXT:     1030:  10 00 00 d0   adrp  x16, #8192
+// 0x3018 & 0xFFF = 0x18 = 24
+// DISASMDSO-NEXT:     1034:  11 0e 40 f9   ldr x17, [x16, #24]
+// DISASMDSO-NEXT:     1038:  10 62 00 91   add x16, x16, #24
 // DISASMDSO-NEXT:     103c:  20 02 1f d6   br  x17
 
 // bar@plt
-// Page(0x20D0) - Page(0x1040) = 0x2000 - 0x1000 = 0x1000 = 4096
-// DISASMDSO-NEXT:     1040:  10 00 00 b0   adrp  x16, #4096
-// 0x20D0 & 0xFFF = 0xD0 = 208
-// DISASMDSO-NEXT:     1044:  11 6a 40 f9   ldr x17, [x16, #208]
-// DISASMDSO-NEXT:     1048:  10 42 03 91   add x16, x16, #208
+// Page(0x3020) - Page(0x1040) = 0x3000 - 0x1000 = 0x2000 = 8192
+// DISASMDSO-NEXT:     1040:  10 00 00 d0   adrp  x16, #8192
+// 0x3020 & 0xFFF = 0x20 = 32
+// DISASMDSO-NEXT:     1044:  11 12 40 f9   ldr x17, [x16, #32]
+// DISASMDSO-NEXT:     1048:  10 82 00 91   add x16, x16, #32
 // DISASMDSO-NEXT:     104c:  20 02 1f d6   br  x17
 
 // weak@plt
-// Page(0x20D8) - Page(0x1050) = 0x2000 - 0x1000 = 0x1000 = 4096
-// DISASMDSO-NEXT:     1050:  10 00 00 b0   adrp  x16, #4096
-// 0x20D8 & 0xFFF = 0xD8 = 216
-// DISASMDSO-NEXT:     1054:  11 6e 40 f9   ldr x17, [x16, #216]
-// DISASMDSO-NEXT:     1058:  10 62 03 91   add x16, x16, #216
+// Page(0x3028) - Page(0x1050) = 0x3000 - 0x1000 = 0x2000 = 8192
+// DISASMDSO-NEXT:     1050:  10 00 00 d0   adrp  x16, #8192
+// 0x3028 & 0xFFF = 0x28 = 40
+// DISASMDSO-NEXT:     1054:  11 16 40 f9   ldr x17, [x16, #40]
+// DISASMDSO-NEXT:     1058:  10 a2 00 91   add x16, x16, #40
 // DISASMDSO-NEXT:     105c:  20 02 1f d6   br  x17
 
 // CHECKEXE:     Name: .plt
 // CHECKEXE-NEXT:     Type: SHT_PROGBITS
 // CHECKEXE-NEXT:     Flags [
 // CHECKEXE-NEXT:       SHF_ALLOC
 // CHECKEXE-NEXT:       SHF_EXECINSTR
 // CHECKEXE-NEXT:     ]
 // CHECKEXE-NEXT:     Address: 0x11010
 // CHECKEXE-NEXT:     Offset:
 // CHECKEXE-NEXT:     Size: 64
 // CHECKEXE-NEXT:     Link:
 // CHECKEXE-NEXT:     Info:
 // CHECKEXE-NEXT:     AddressAlignment: 16
 
 // CHECKEXE:     Name: .got.plt
 // CHECKEXE-NEXT:     Type: SHT_PROGBITS
 // CHECKEXE-NEXT:     Flags [
 // CHECKEXE-NEXT:       SHF_ALLOC
 // CHECKEXE-NEXT:       SHF_WRITE
 // CHECKEXE-NEXT:     ]
-// CHECKEXE-NEXT:     Address: 0x120B0
+// CHECKEXE-NEXT:     Address: 0x13000
 // CHECKEXE-NEXT:     Offset:
 // CHECKEXE-NEXT:     Size: 40
 // CHECKEXE-NEXT:     Link:
 // CHECKEXE-NEXT:     Info:
 // CHECKEXE-NEXT:     AddressAlignment: 8
 
 // CHECKEXE: Relocations [
 // CHECKEXE-NEXT:   Section ({{.*}}) .rela.plt {
 
-// &(.got.plt[3]) = 0x120B0 + 3 * 8 = 0x120C8
-// CHECKEXE-NEXT:     0x120C8 R_AARCH64_JUMP_SLOT bar 0x0
+// &(.got.plt[3]) = 0x13000 + 3 * 8 = 0x13018
+// CHECKEXE-NEXT:     0x13018 R_AARCH64_JUMP_SLOT bar 0x0
 
-// &(.got.plt[4]) = 0x120B0 + 4 * 8 = 0x120D0
-// CHECKEXE-NEXT:     0x120D0 R_AARCH64_JUMP_SLOT weak 0x0
+// &(.got.plt[4]) = 0x13000 + 4 * 8 = 0x13020
+// CHECKEXE-NEXT:     0x13020 R_AARCH64_JUMP_SLOT weak 0x0
 // CHECKEXE-NEXT:   }
 // CHECKEXE-NEXT: ]
 
 // DUMPEXE: Contents of section .got.plt:
 // .got.plt[0..2] = 0 (reserved)
 // .got.plt[3..4] = .plt = 0x11010
-// DUMPEXE-NEXT:  120b0 00000000 00000000 00000000 00000000  ................
-// DUMPEXE-NEXT:  120c0 00000000 00000000 10100100 00000000  ................
-// DUMPEXE-NEXT:  120d0 10100100 00000000                    ........
+// DUMPEXE-NEXT:  13000 00000000 00000000 00000000 00000000  ................
+// DUMPEXE-NEXT:  13010 00000000 00000000 10100100 00000000  ................
+// DUMPEXE-NEXT:  13020 10100100 00000000                    ........
 
 // DISASMEXE: _start:
 // 0x1100c - 0x11000 = 0xc = 12
 // DISASMEXE-NEXT:    11000:  03 00 00 14   b #12
 // 0x11030 - 0x11004 = 0x2c = 44
 // DISASMEXE-NEXT:    11004:  0b 00 00 14   b #44
 // 0x11040 - 0x11008 = 0x38 = 56
 // DISASMEXE-NEXT:    11008:  0e 00 00 14   b #56
 
 // DISASMEXE: foo:
 // DISASMEXE-NEXT:    1100c:  1f 20 03 d5   nop
 
 // DISASMEXE: Disassembly of section .plt:
 // DISASMEXE-NEXT: .plt:
 // DISASMEXE-NEXT:    11010:  f0 7b bf a9   stp x16, x30, [sp, #-16]!
 // &(.got.plt[2]) = 0x120B0 + 2 * 8 = 0x120C0
-// Page(0x120C0) - Page(0x11014) = 0x12000 - 0x11000 = 0x1000 = 4096
-// DISASMEXE-NEXT:    11014:  10 00 00 b0   adrp  x16, #4096
+// Page(0x13010) - Page(0x11014) = 0x13000 - 0x11000 = 0x1000 = 8192
+// DISASMEXE-NEXT:    11014:  10 00 00 d0   adrp  x16, #8192
 // 0x120c0 & 0xFFF = 0xC0 = 192
-// DISASMEXE-NEXT:    11018:  11 62 40 f9   ldr x17, [x16, #192]
-// DISASMEXE-NEXT:    1101c:  10 02 03 91   add x16, x16, #192
+// DISASMEXE-NEXT:    11018:  11 0a 40 f9   ldr x17, [x16, #16]
+// DISASMEXE-NEXT:    1101c:  10 42 00 91   add x16, x16, #16
 // DISASMEXE-NEXT:    11020:  20 02 1f d6   br  x17
 // DISASMEXE-NEXT:    11024:  1f 20 03 d5   nop
 // DISASMEXE-NEXT:    11028:  1f 20 03 d5   nop
 // DISASMEXE-NEXT:    1102c:  1f 20 03 d5   nop
 
 // bar@plt
-// Page(0x120C8) - Page(0x11030) = 0x12000 - 0x11000 = 0x1000 = 4096
-// DISASMEXE-NEXT:    11030:  10 00 00 b0   adrp  x16, #4096
+// Page(0x13018) - Page(0x11030) = 0x12000 - 0x11000 = 0x1000 = 8192
+// DISASMEXE-NEXT:    11030:  10 00 00 d0   adrp  x16, #8192
 // 0x120C8 & 0xFFF = 0xC8 = 200
-// DISASMEXE-NEXT:    11034:  11 66 40 f9   ldr x17, [x16, #200]
-// DISASMEXE-NEXT:    11038:  10 22 03 91   add x16, x16, #200
+// DISASMEXE-NEXT:    11034:  11 0e 40 f9   ldr x17, [x16, #24]
+// DISASMEXE-NEXT:    11038:  10 62 00 91   add x16, x16, #24
 // DISASMEXE-NEXT:    1103c:  20 02 1f d6   br  x17
 
 // weak@plt
-// Page(0x120D0) - Page(0x11040) = 0x12000 - 0x11000 = 0x1000 = 4096
-// DISASMEXE-NEXT:    11040:  10 00 00 b0   adrp  x16, #4096
+// Page(0x13020) - Page(0x11040) = 0x12000 - 0x11000 = 0x1000 = 8192
+// DISASMEXE-NEXT:    11040:  10 00 00 d0   adrp  x16, #8192
 // 0x120D0 & 0xFFF = 0xD0 = 208
-// DISASMEXE-NEXT:    11044:  11 6a 40 f9   ldr x17, [x16, #208]
-// DISASMEXE-NEXT:    11048:  10 42 03 91   add x16, x16, #208
+// DISASMEXE-NEXT:    11044:  11 12 40 f9   ldr x17, [x16, #32]
+// DISASMEXE-NEXT:    11048:  10 82 00 91   add x16, x16, #32
 // DISASMEXE-NEXT:    1104c:  20 02 1f d6   br  x17
 
 .global _start,foo,bar
 .weak weak
 _start:
   b foo
   b bar
   b weak
 
 .section .text2,"ax",@progbits
 foo:
   nop

test/ELF/plt-i686.s

 // CHECK-NEXT: AddressAlignment: 16
 
 // CHECK:      Name: .got.plt
 // CHECK-NEXT: Type: SHT_PROGBITS
 // CHECK-NEXT: Flags [
 // CHECK-NEXT:   SHF_ALLOC
 // CHECK-NEXT:   SHF_WRITE
 // CHECK-NEXT: ]
-// CHECK-NEXT: Address: 0x12058
-// CHECK-NEXT: Offset: 0x2058
+// CHECK-NEXT: Address: 0x13000
+// CHECK-NEXT: Offset: 0x3000
 // CHECK-NEXT: Size: 20
 // CHECK-NEXT: Link: 0
 // CHECK-NEXT: Info: 0
 // CHECK-NEXT: AddressAlignment: 4
 // CHECK-NEXT: EntrySize: 0
 
-// 0x12058 + got.plt.reserved(12) = 0x12064
-// 0x12058 + got.plt.reserved(12) + 4 = 0x12068
+// 0x13000 + got.plt.reserved(12) = 0x1300C
+// 0x13000 + got.plt.reserved(12) + 4 = 0x13010
 // CHECK:      Relocations [
 // CHECK-NEXT:   Section ({{.*}}) .rel.plt {
-// CHECK-NEXT:     0x12064 R_386_JUMP_SLOT bar 0x0
-// CHECK-NEXT:     0x12068 R_386_JUMP_SLOT zed 0x0
+// CHECK-NEXT:     0x1300C R_386_JUMP_SLOT bar 0x0
+// CHECK-NEXT:     0x13010 R_386_JUMP_SLOT zed 0x0
 // CHECK-NEXT:   }
 // CHECK-NEXT: ]
 
 // Unfortunately FileCheck can't do math, so we have to check for explicit
 // values:
 
 // 16 is the size of PLT[0]
 // (0x11010 + 16) - (0x11000 + 1) - 4 = 27
 // (0x11010 + 16) - (0x11005 + 1) - 4 = 22
 // (0x11020 + 16) - (0x1100a + 1) - 4 = 33
 
 // DISASM:       local:
 // DISASM-NEXT:  11000: {{.*}}
 // DISASM-NEXT:  11002: {{.*}}
 // DISASM:       _start:
 // 0x11013 + 5 - 24 = 0x11000
 // DISASM-NEXT: 11004: e9 27 00 00 00 jmp 39
 // DISASM-NEXT: 11009: e9 22 00 00 00 jmp 34
 // DISASM-NEXT: 1100e: e9 2d 00 00 00 jmp 45
 // DISASM-NEXT: 11013: e9 e8 ff ff ff jmp -24
 
 // 0x11010 - 0x1102b - 5 = -32
 // 0x11010 - 0x1103b - 5 = -48
-// 73820 = 0x1205C = .got.plt (0x12058) + 4
-// 73824 = 0x12060 = .got.plt (0x12058) + 8
-// 73828 = 0x12064 = .got.plt (0x12058) + got.plt.reserved(12)
-// 73832 = 0x12068 = .got.plt (0x12058) + got.plt.reserved(12) + 4
+// 77828 = 0x13004 = .got.plt (0x13000) + 4
+// 77832 = 0x13008 = .got.plt (0x13000) + 8
+// 77836 = 0x1300C = .got.plt (0x13000) + got.plt.reserved(12)
+// 77840 = 0x13010 = .got.plt (0x13000) + got.plt.reserved(12) + 4
 // DISASM:      Disassembly of section .plt:
 // DISASM-NEXT: .plt:
-// DISASM-NEXT:    11020: ff 35 5c 20 01 00 pushl 73820
-// DISASM-NEXT:    11026: ff 25 60 20 01 00 jmpl *73824
+// DISASM-NEXT:    11020: ff 35 04 30 01 00 pushl 77828
+// DISASM-NEXT:    11026: ff 25 08 30 01 00 jmpl *77832
 // DISASM-NEXT:    1102c: 90 nop
 // DISASM-NEXT:    1102d: 90 nop
 // DISASM-NEXT:    1102e: 90 nop
 // DISASM-NEXT:    1102f: 90 nop
-// DISASM-NEXT:    11030: ff 25 64 20 01 00 jmpl *73828
+// DISASM-NEXT:    11030: ff 25 0c 30 01 00 jmpl *77836
 // DISASM-NEXT:    11036: 68 00 00 00 00 pushl $0
 // DISASM-NEXT:    1103b: e9 e0 ff ff ff jmp -32 <.plt>
-// DISASM-NEXT:    11040: ff 25 68 20 01 00 jmpl *73832
+// DISASM-NEXT:    11040: ff 25 10 30 01 00 jmpl *77840
 // DISASM-NEXT:    11046: 68 08 00 00 00 pushl $8
 // DISASM-NEXT:    1104b: e9 d0 ff ff ff jmp -48 <.plt>
 
 // CHECKSHARED:        Name: .plt
 // CHECKSHARED-NEXT:   Type: SHT_PROGBITS
 // CHECKSHARED-NEXT:   Flags [
 // CHECKSHARED-NEXT:     SHF_ALLOC
 // CHECKSHARED-NEXT:     SHF_EXECINSTR
 // CHECKSHARED-NEXT:   ]
 // CHECKSHARED-NEXT:   Address: 0x1020
 // CHECKSHARED-NEXT:   Offset: 0x1020
 // CHECKSHARED-NEXT:   Size: 48
 // CHECKSHARED-NEXT:   Link: 0
 // CHECKSHARED-NEXT:   Info: 0
 // CHECKSHARED-NEXT:   AddressAlignment: 16
 // CHECKSHARED-NEXT:   EntrySize: 0
 // CHECKSHARED-NEXT:   }
 // CHECKSHARED:        Name: .got.plt
 // CHECKSHARED-NEXT:   Type: SHT_PROGBITS
 // CHECKSHARED-NEXT:   Flags [
 // CHECKSHARED-NEXT:     SHF_ALLOC
 // CHECKSHARED-NEXT:     SHF_WRITE
 // CHECKSHARED-NEXT:   ]
-// CHECKSHARED-NEXT:   Address: 0x2058
-// CHECKSHARED-NEXT:   Offset: 0x2058
+// CHECKSHARED-NEXT:   Address: 0x3000
+// CHECKSHARED-NEXT:   Offset: 0x3000
 // CHECKSHARED-NEXT:   Size: 20
 // CHECKSHARED-NEXT:   Link: 0
 // CHECKSHARED-NEXT:   Info: 0
 // CHECKSHARED-NEXT:   AddressAlignment: 4
 // CHECKSHARED-NEXT:   EntrySize: 0
 // CHECKSHARED-NEXT:   }
 
-// 0x2058 + got.plt.reserved(12) = 0x2064
-// 0x2058 + got.plt.reserved(12) + 4 = 0x2068
+// 0x3000 + got.plt.reserved(12) = 0x300C
+// 0x3000 + got.plt.reserved(12) + 4 = 0x3010
 // CHECKSHARED:        Relocations [
 // CHECKSHARED-NEXT:     Section ({{.*}}) .rel.plt {
-// CHECKSHARED-NEXT:       0x2064 R_386_JUMP_SLOT bar 0x0
-// CHECKSHARED-NEXT:       0x2068 R_386_JUMP_SLOT zed 0x0
+// CHECKSHARED-NEXT:       0x300C R_386_JUMP_SLOT bar 0x0
+// CHECKSHARED-NEXT:       0x3010 R_386_JUMP_SLOT zed 0x0
 // CHECKSHARED-NEXT:     }
 // CHECKSHARED-NEXT:   ]
 
 // DISASMSHARED:       local:
 // DISASMSHARED-NEXT:  1000: {{.*}}
 // DISASMSHARED-NEXT:  1002: {{.*}}
 // DISASMSHARED:       _start:
 // 0x1013 + 5 - 24 = 0x1000

test/ELF/plt.s

 // CHECK-NEXT: Offset:
 // CHECK-NEXT: Size: 64
 // CHECK-NEXT: Link: 0
 // CHECK-NEXT: Info: 0
 // CHECK-NEXT: AddressAlignment: 16
 
 // CHECK:      Relocations [
 // CHECK-NEXT:   Section ({{.*}}) .rela.plt {
-// CHECK-NEXT:     0x20C8 R_X86_64_JUMP_SLOT bar 0x0
-// CHECK-NEXT:     0x20D0 R_X86_64_JUMP_SLOT zed 0x0
-// CHECK-NEXT:     0x20D8 R_X86_64_JUMP_SLOT _start 0x0
+// CHECK-NEXT:     0x3018 R_X86_64_JUMP_SLOT bar 0x0
+// CHECK-NEXT:     0x3020 R_X86_64_JUMP_SLOT zed 0x0
+// CHECK-NEXT:     0x3028 R_X86_64_JUMP_SLOT _start 0x0
 // CHECK-NEXT:   }
 // CHECK-NEXT: ]
 
 // CHECK2:      Name: .plt
 // CHECK2-NEXT: Type: SHT_PROGBITS
 // CHECK2-NEXT: Flags [
 // CHECK2-NEXT:   SHF_ALLOC
 // CHECK2-NEXT:   SHF_EXECINSTR
 // CHECK2-NEXT: ]
 // CHECK2-NEXT: Address: 0x11020
 // CHECK2-NEXT: Offset:
 // CHECK2-NEXT: Size: 48
 // CHECK2-NEXT: Link: 0
 // CHECK2-NEXT: Info: 0
 // CHECK2-NEXT: AddressAlignment: 16
 
 // CHECK2:      Relocations [
 // CHECK2-NEXT:   Section ({{.*}}) .rela.plt {
-// CHECK2-NEXT:     0x120C8 R_X86_64_JUMP_SLOT bar 0x0
-// CHECK2-NEXT:     0x120D0 R_X86_64_JUMP_SLOT zed 0x0
+// CHECK2-NEXT:     0x13018 R_X86_64_JUMP_SLOT bar 0x0
+// CHECK2-NEXT:     0x13020 R_X86_64_JUMP_SLOT zed 0x0
 // CHECK2-NEXT:   }
 // CHECK2-NEXT: ]
 
 // Unfortunately FileCheck can't do math, so we have to check for explicit
 // values:
 
 // 0x1030 - (0x1000 + 5) = 43
 // 0x1030 - (0x1005 + 5) = 38
 // 0x1040 - (0x100a + 5) = 49
 // 0x1048 - (0x100a + 5) = 60
 
 // DISASM:      _start:
 // DISASM-NEXT:   1000:  e9 {{.*}}       jmp  43
 // DISASM-NEXT:   1005:  e9 {{.*}}       jmp  38
 // DISASM-NEXT:   100a:  e9 {{.*}}       jmp  49
 // DISASM-NEXT:   100f:  e9 {{.*}}       jmp  60
 
-// 0x20C8 - 0x1036  = 4242
-// 0x20D0 - 0x1046  = 4234
-// 0x20D8 - 0x1056  = 4226
+// 0x3018 - 0x1036  = 8162
+// 0x3020 - 0x1046  = 4234
+// 0x3028 - 0x1056  = 4226
 
 // DISASM:      Disassembly of section .plt:
 // DISASM-NEXT: .plt:
-// DISASM-NEXT:   1020:  ff 35 92 10 00 00  pushq 4242(%rip)
-// DISASM-NEXT:   1026:  ff 25 94 10 00 00  jmpq *4244(%rip)
+// DISASM-NEXT:   1020:  ff 35 e2 1f 00 00  pushq 8162(%rip)
+// DISASM-NEXT:   1026:  ff 25 e4 1f 00 00  jmpq *8164(%rip)
 // DISASM-NEXT:   102c:  0f 1f 40 00        nopl (%rax)
-// DISASM-NEXT:   1030:  ff 25 92 10 00 00  jmpq *4242(%rip)
+// DISASM-NEXT:   1030:  ff 25 e2 1f 00 00  jmpq *8162(%rip)
 // DISASM-NEXT:   1036:  68 00 00 00 00     pushq $0
 // DISASM-NEXT:   103b:  e9 e0 ff ff ff     jmp -32 <.plt>
-// DISASM-NEXT:   1040:  ff 25 8a 10 00 00  jmpq *4234(%rip)
+// DISASM-NEXT:   1040:  ff 25 da 1f 00 00  jmpq *8154(%rip)
 // DISASM-NEXT:   1046:  68 01 00 00 00     pushq $1
 // DISASM-NEXT:   104b:  e9 d0 ff ff ff     jmp -48 <.plt>
-// DISASM-NEXT:   1050:  ff 25 82 10 00 00  jmpq *4226(%rip)
+// DISASM-NEXT:   1050:  ff 25 d2 1f 00 00  jmpq *8146(%rip)
 // DISASM-NEXT:   1056:  68 02 00 00 00     pushq $2
 // DISASM-NEXT:   105b:  e9 c0 ff ff ff     jmp -64 <.plt>
 
 // 0x11030 - (0x11000 + 1) - 4 = 43
 // 0x11030 - (0x11005 + 1) - 4 = 38
 // 0x11040 - (0x1100a + 1) - 4 = 49
 // 0x11000 - (0x1100f + 1) - 4 = -20
 
 // DISASM2:      _start:
 // DISASM2-NEXT:   11000:  e9 {{.*}}     jmp  43
 // DISASM2-NEXT:   11005:  e9 {{.*}}     jmp  38
 // DISASM2-NEXT:   1100a:  e9 {{.*}}     jmp  49
 // DISASM2-NEXT:   1100f:  e9 {{.*}}     jmp  -20
 
-// 0x120C8 - 0x11036  = 4242
-// 0x120D0 - 0x11046  = 4234
+// 0x13018 - 0x11036  = 4242
+// 0x13020 - 0x11046  = 4234
 
 // DISASM2:      Disassembly of section .plt:
 // DISASM2-NEXT: .plt:
-// DISASM2-NEXT:  11020:  ff 35 92 10 00 00   pushq 4242(%rip)
-// DISASM2-NEXT:  11026:  ff 25 94 10 00 00   jmpq *4244(%rip)
+// DISASM2-NEXT:  11020:  ff 35 e2 1f 00 00   pushq 8162(%rip)
+// DISASM2-NEXT:  11026:  ff 25 e4 1f 00 00   jmpq *8164(%rip)
 // DISASM2-NEXT:  1102c:  0f 1f 40 00         nopl  (%rax)
-// DISASM2-NEXT:  11030:  ff 25 92 10 00 00   jmpq *4242(%rip)
+// DISASM2-NEXT:  11030:  ff 25 e2 1f 00 00   jmpq *8162(%rip)
 // DISASM2-NEXT:  11036:  68 00 00 00 00      pushq $0
 // DISASM2-NEXT:  1103b:  e9 e0 ff ff ff      jmp -32 <.plt>
-// DISASM2-NEXT:  11040:  ff 25 8a 10 00 00   jmpq *4234(%rip)
+// DISASM2-NEXT:  11040:  ff 25 da 1f 00 00   jmpq *8154(%rip)
 // DISASM2-NEXT:  11046:  68 01 00 00 00      pushq $1
 // DISASM2-NEXT:  1104b:  e9 d0 ff ff ff      jmp -48 <.plt>
 // DISASM2-NEXT-NOT: 110C0
 
 .global _start
 _start:
   jmp bar@PLT
   jmp bar@PLT
   jmp zed@PLT
   jmp _start@plt

test/ELF/ppc64-shared-rel-toc.s

foo:                                    # @foo
         .align  3
         .quad   .Lfunc_begin0
         .quad   .TOC.@tocbase
         .quad   0
         .text
 .Lfunc_begin0:
         blr
 
-// CHECK: 0x20090 R_PPC64_RELATIVE - 0x10000
-// CHECK: 0x20098 R_PPC64_RELATIVE - 0x8000
+// CHECK: 0x30000 R_PPC64_RELATIVE - 0x10000
+// CHECK: 0x30008 R_PPC64_RELATIVE - 0x8000
 
 // CHECK: Name: foo
-// CHECK-NEXT: Value: 0x20090
+// CHECK-NEXT: Value: 0x30000
 

test/ELF/relocation-copy-i686.s

 movl $9, z
 
 // CHECK:      Name: .bss
 // CHECK-NEXT:  Type: SHT_NOBITS
 // CHECK-NEXT:  Flags [
 // CHECK-NEXT:   SHF_ALLOC
 // CHECK-NEXT:   SHF_WRITE
 // CHECK-NEXT:  ]
-// CHECK-NEXT:  Address: 0x12050
-// CHECK-NEXT:  Offset: 0x2050
+// CHECK-NEXT:  Address: 0x13000
+// CHECK-NEXT:  Offset: 0x3000
 // CHECK-NEXT:  Size: 24
 // CHECK-NEXT:  Link: 0
 // CHECK-NEXT:  Info: 0
 // CHECK-NEXT:  AddressAlignment: 16
 // CHECK-NEXT:  EntrySize: 0
 
 // CHECK:      Relocations [
 // CHECK-NEXT:   Section ({{.*}}) .rel.dyn {

 // CHECK-NEXT:       Offset:
 // CHECK-NEXT:       Type: R_386_COPY
 // CHECK-NEXT:       Symbol: z
 // CHECK-NEXT:       Addend: 0x0
 // CHECK-NEXT:     }
 // CHECK-NEXT:   }
 // CHECK-NEXT: ]
 
-// 73808 = 0x12050
+// 77824 = 0x13000
 // 16 is alignment here
-// 73824 = 0x12050 + 16
-// 73828 = 0x12050 + 16 + 4
+// 77840 = 0x13000 + 16
+// 77844 = 0x13000 + 16 + 4
 // CODE: Disassembly of section .text:
 // CODE-NEXT: main:
-// CODE-NEXT: 11000: c7 05 50 20 01 00 05 00 00 00 movl $5, 73808
-// CODE-NEXT: 1100a: c7 05 60 20 01 00 07 00 00 00 movl $7, 73824
-// CODE-NEXT: 11014: c7 05 64 20 01 00 09 00 00 00 movl $9, 73828
+// CODE-NEXT: 11000: c7 05 00 30 01 00 05 00 00 00 movl $5, 77824
+// CODE-NEXT: 1100a: c7 05 10 30 01 00 07 00 00 00 movl $7, 77840
+// CODE-NEXT: 11014: c7 05 14 30 01 00 09 00 00 00 movl $9, 77844

test/ELF/relocation-copy.s

 movl $9, z
 
 // CHECK:      Name: .bss
 // CHECK-NEXT:  Type: SHT_NOBITS (0x8)
 // CHECK-NEXT:  Flags [ (0x3)
 // CHECK-NEXT:   SHF_ALLOC (0x2)
 // CHECK-NEXT:   SHF_WRITE (0x1)
 // CHECK-NEXT:  ]
-// CHECK-NEXT:  Address: 0x120A0
-// CHECK-NEXT:  Offset: 0x20A0
+// CHECK-NEXT:  Address: 0x13000
+// CHECK-NEXT:  Offset: 0x3000
 // CHECK-NEXT:  Size: 24
 // CHECK-NEXT:  Link: 0
 // CHECK-NEXT:  Info: 0
 // CHECK-NEXT:  AddressAlignment: 16
 // CHECK-NEXT:  EntrySize: 0
 
 // CHECK:      Relocations [
 // CHECK-NEXT:   Section ({{.*}}) .rela.dyn {

 // CHECK-NEXT:       Offset:
 // CHECK-NEXT:       Type: R_X86_64_COPY
 // CHECK-NEXT:       Symbol: z
 // CHECK-NEXT:       Addend: 0x0
 // CHECK-NEXT:     }
 // CHECK-NEXT:   }
 // CHECK-NEXT: ]
 
-// 73888 = 0x120A0
+// 77824 = 0x13000
 // 16 is alignment here
-// 73904 = 0x120A0 + 16
-// 73908 = 0x120A0 + 16 + 4
+// 77840 = 0x13000 + 16
+// 77844 = 0x13000 + 16 + 4
 // CODE: Disassembly of section .text:
 // CODE-NEXT: main:
-// CODE-NEXT: 11000: c7 04 25 a0 20 01 00 05 00 00 00 movl $5, 73888
-// CODE-NEXT: 1100b: c7 04 25 b0 20 01 00 07 00 00 00 movl $7, 73904
-// CODE-NEXT: 11016: c7 04 25 b4 20 01 00 09 00 00 00 movl $9, 73908
+// CODE-NEXT: 11000: c7 04 25 00 30 01 00 05 00 00 00 movl $5, 77824
+// CODE-NEXT: 1100b: c7 04 25 10 30 01 00 07 00 00 00 movl $7, 77840
+// CODE-NEXT: 11016: c7 04 25 14 30 01 00 09 00 00 00 movl $9, 77844

test/ELF/relocation.s

 // SEC-NEXT: }
 
 // SEC:        Name: .got.plt
 // SEC-NEXT:   Type: SHT_PROGBITS
 // SEC-NEXT:   Flags [
 // SEC-NEXT:     SHF_ALLOC
 // SEC-NEXT:     SHF_WRITE
 // SEC-NEXT:   ]
-// SEC-NEXT:   Address: 0x120E8
-// SEC-NEXT:   Offset: 0x20E8
+// SEC-NEXT:   Address: 0x13000
+// SEC-NEXT:   Offset: 0x3000
 // SEC-NEXT:   Size: 32
 // SEC-NEXT:   Link: 0
 // SEC-NEXT:   Info: 0
 // SEC-NEXT:   AddressAlignment: 8
 // SEC-NEXT:   EntrySize: 0
 // SEC-NEXT:   }
 
 .section       .text,"ax",@progbits,unique,1

test/ELF/relro.s

 // FULLRELRO-NEXT: Section {
 // FULLRELRO-NEXT:   Index: 11
 // FULLRELRO-NEXT:   Name: .data
 // FULLRELRO-NEXT:   Type: SHT_PROGBITS
 // FULLRELRO-NEXT:   Flags [
 // FULLRELRO-NEXT:     SHF_ALLOC
 // FULLRELRO-NEXT:     SHF_WRITE
 // FULLRELRO-NEXT:   ]
-// FULLRELRO-NEXT:   Address: 0x12128
-// FULLRELRO-NEXT:   Offset: 0x2128
+// FULLRELRO-NEXT:   Address: 0x13000
+// FULLRELRO-NEXT:   Offset: 0x3000
 // FULLRELRO-NEXT:   Size: 12
 // FULLRELRO-NEXT:   Link: 0
 // FULLRELRO-NEXT:   Info: 0
 // FULLRELRO-NEXT:   AddressAlignment:
 // FULLRELRO-NEXT:   EntrySize: 0
 // FULLRELRO-NEXT:   SectionData (
 // FULLRELRO-NEXT:     0000:
 // FULLRELRO-NEXT:   )
 // FULLRELRO-NEXT: }
 // FULLRELRO-NEXT: Section {
 // FULLRELRO-NEXT:   Index: 12
 // FULLRELRO-NEXT:   Name: .foo
 // FULLRELRO-NEXT:   Type: SHT_PROGBITS
 // FULLRELRO-NEXT:   Flags [
 // FULLRELRO-NEXT:     SHF_ALLOC
 // FULLRELRO-NEXT:     SHF_WRITE
 // FULLRELRO-NEXT:   ]
-// FULLRELRO-NEXT:   Address: 0x12134
-// FULLRELRO-NEXT:   Offset: 0x2134
+// FULLRELRO-NEXT:   Address: 0x1300C
+// FULLRELRO-NEXT:   Offset: 0x300C
 // FULLRELRO-NEXT:   Size: 0
 // FULLRELRO-NEXT:   Link: 0
 // FULLRELRO-NEXT:   Info: 0
 // FULLRELRO-NEXT:   AddressAlignment:
 // FULLRELRO-NEXT:   EntrySize: 0
 // FULLRELRO-NEXT:   SectionData (
 // FULLRELRO-NEXT:   )
 // FULLRELRO-NEXT: }
 // 308 - sizeof(.data)(12) = 296
 // FULLRELRO:       ProgramHeaders [
 // FULLRELRO:       Type: PT_LOAD
 // FULLRELRO:       Offset: 0x2000
 // FULLRELRO-NEXT:  VirtualAddress: [[RWADDR:.*]]
 // FULLRELRO-NEXT:  PhysicalAddress:
-// FULLRELRO-NEXT:  FileSize: 308
-// FULLRELRO-NEXT:  MemSize: 308
+// FULLRELRO-NEXT:  FileSize: 4108
+// FULLRELRO-NEXT:  MemSize: 4108
 // FULLRELRO-NEXT:  Flags [
 // FULLRELRO-NEXT:    PF_R
 // FULLRELRO-NEXT:    PF_W
 // FULLRELRO-NEXT:  ]
 // FULLRELRO-NEXT:  Alignment: 4096
 // FULLRELRO-NEXT:}
 // FULLRELRO:       Type: PT_GNU_RELRO
 // FULLRELRO-NEXT:  Offset: 0x

 // PARTRELRO-NEXT:  Section {
 // PARTRELRO-NEXT:  Index: 10
 // PARTRELRO-NEXT:  Name: .data
 // PARTRELRO-NEXT:  Type: SHT_PROGBITS
 // PARTRELRO-NEXT:  Flags [
 // PARTRELRO-NEXT:    SHF_ALLOC
 // PARTRELRO-NEXT:    SHF_WRITE
 // PARTRELRO-NEXT:  ]
-// PARTRELRO-NEXT:  Address: 0x120E8
-// PARTRELRO-NEXT:  Offset: 0x20E8
+// PARTRELRO-NEXT:  Address: 0x13000
+// PARTRELRO-NEXT:  Offset: 0x3000
 // PARTRELRO-NEXT:  Size: 12
 // PARTRELRO-NEXT:  Link: 0
 // PARTRELRO-NEXT:  Info: 0
 // PARTRELRO-NEXT:  AddressAlignment: 1
 // PARTRELRO-NEXT:  EntrySize: 0
 // PARTRELRO-NEXT:  SectionData (
 // PARTRELRO-NEXT:    0000:
 // PARTRELRO-NEXT:  )
 // PARTRELRO-NEXT:  }
 // PARTRELRO-NEXT:  Section {
 // PARTRELRO-NEXT:    Index: 11
 // PARTRELRO-NEXT:    Name: .foo
 // PARTRELRO-NEXT:    Type: SHT_PROGBITS
 // PARTRELRO-NEXT:    Flags [
 // PARTRELRO-NEXT:      SHF_ALLOC
 // PARTRELRO-NEXT:      SHF_WRITE
 // PARTRELRO-NEXT:    ]
-// PARTRELRO-NEXT:    Address: 0x120F4
-// PARTRELRO-NEXT:    Offset: 0x20F4
+// PARTRELRO-NEXT:    Address: 0x1300C
+// PARTRELRO-NEXT:    Offset: 0x300C
 // PARTRELRO-NEXT:    Size: 0
 // PARTRELRO-NEXT:    Link: 0
 // PARTRELRO-NEXT:    Info: 0
 // PARTRELRO-NEXT:    AddressAlignment: 1
 // PARTRELRO-NEXT:    EntrySize: 0
 // PARTRELRO-NEXT:    SectionData (
 // PARTRELRO-NEXT:    )
 // PARTRELRO-NEXT:  }
 // PARTRELRO-NEXT:  Section {
 // PARTRELRO-NEXT:    Index: 12
 // PARTRELRO-NEXT:    Name: .got.plt
 // PARTRELRO-NEXT:    Type: SHT_PROGBITS
 // PARTRELRO-NEXT:    Flags [
 // PARTRELRO-NEXT:      SHF_ALLOC
 // PARTRELRO-NEXT:      SHF_WRITE
 // PARTRELRO-NEXT:    ]
-// PARTRELRO-NEXT:    Address: 0x120F8
-// PARTRELRO-NEXT:    Offset: 0x20F8
+// PARTRELRO-NEXT:    Address: 0x13010
+// PARTRELRO-NEXT:    Offset: 0x3010
 // PARTRELRO-NEXT:    Size: 32
 // PARTRELRO-NEXT:    Link: 0
 // PARTRELRO-NEXT:    Info: 0
 // PARTRELRO-NEXT:    AddressAlignment: 8
 // PARTRELRO-NEXT:    EntrySize: 0
 // PARTRELRO-NEXT:    SectionData (
 // PARTRELRO-NEXT:      0000:
 // PARTRELRO-NEXT:      0010:
 // PARTRELRO-NEXT:    )
 // PARTRELRO-NEXT:  }
 // PARTRELRO-NEXT:  Section {
 // PARTRELRO-NEXT:    Index: 13
 // PARTRELRO-NEXT:    Name: .bss
 // PARTRELRO-NEXT:    Type: SHT_NOBITS
 // PARTRELRO-NEXT:    Flags [
 // PARTRELRO-NEXT:      SHF_ALLOC
 // PARTRELRO-NEXT:      SHF_WRITE
 // PARTRELRO-NEXT:    ]
-// PARTRELRO-NEXT:    Address: 0x12118
-// PARTRELRO-NEXT:    Offset: 0x2118
+// PARTRELRO-NEXT:    Address: 0x13030
+// PARTRELRO-NEXT:    Offset: 0x3030
 // PARTRELRO-NEXT:    Size: 0
 // PARTRELRO-NEXT:    Link: 0
 // PARTRELRO-NEXT:    Info: 0
 // PARTRELRO-NEXT:    AddressAlignment: 1
 // PARTRELRO-NEXT:    EntrySize: 0
 // PARTRELRO-NEXT:  }
-// 232 + sizeof(.data)(12) + align(4) + sizeof(.got.plt)(32) = 280
 // PARTRELRO:       ProgramHeader {
 // PARTRELRO:       Type: PT_LOAD
 // PARTRELRO:       Offset: 0x2000
 // PARTRELRO-NEXT:  VirtualAddress: [[RWADDR:.*]]
 // PARTRELRO-NEXT:  PhysicalAddress:
-// PARTRELRO-NEXT:  FileSize: 280
-// PARTRELRO-NEXT:  MemSize: 280
+// PARTRELRO-NEXT:  FileSize: 4144
+// PARTRELRO-NEXT:  MemSize: 4144
 // PARTRELRO-NEXT:  Flags [
 // PARTRELRO-NEXT:    PF_R (0x4)
 // PARTRELRO-NEXT:    PF_W (0x2)
 // PARTRELRO-NEXT:  ]
 // PARTRELRO-NEXT:  Alignment: 4096
 // PARTRELRO:       Type: PT_GNU_RELRO
 // PARTRELRO-NEXT:  Offset: 0x2000
 // PARTRELRO-NEXT:  VirtualAddress: [[RWADDR]]

test/ELF/tls-opt-gdie.s

 //RELOC-NEXT: EntrySize: 0
 //RELOC-NEXT: }
 //RELOC:      Relocations [
 //RELOC-NEXT:   Section (4) .rela.dyn {
 //RELOC-NEXT:     0x120E0 R_X86_64_TPOFF64 tlsshared0 0x0
 //RELOC-NEXT:     0x120E8 R_X86_64_TPOFF64 tlsshared1 0x0
 //RELOC-NEXT:   }
 //RELOC-NEXT:   Section (5) .rela.plt {
-//RELOC-NEXT:     0x12108 R_X86_64_JUMP_SLOT __tls_get_addr 0x0
+//RELOC-NEXT:     0x13018 R_X86_64_JUMP_SLOT __tls_get_addr 0x0
 //RELOC-NEXT:   }
 //RELOC-NEXT: ]
 
 //0x11009 + (4304 + 7) = 0x120E0
 //0x11019 + (4296 + 7) = 0x120E8
 // DISASM:      Disassembly of section .text:
 // DISASM-NEXT: _start:
 // DISASM-NEXT: 11000: 64 48 8b 04 25 00 00 00 00 movq %fs:0, %rax