[DAGCombiner] Vector constant folding for comparisons

[RKSimon]

Summary

This patch adds support for vector constant folding of integer/float comparisons.

This requires FoldConstantVectorArithmetic to support scalar constant operands (in this case ISD::CONDCASE). In future we should be able to support other scalar constant types as necessary (and possibly start calling FoldConstantVectorArithmetic for all node creations).

[qcolombet]

Hi Simon,

LGTM.

Thanks,
-Quentin

llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

if (Opcode >= ISD::BUILTIN_OP_END)
     return SDValue();
 
   // We can only fold vectors - maybe merge with FoldConstantArithmetic someday?
   if (!VT.isVector())
     return SDValue();
 
   unsigned NumElts = VT.getVectorNumElements();
 
-  auto IsSameVectorSize = [&](const SDValue &Op) {
-    return Op.getValueType().isVector() &&
+  auto IsScalarOrSameVectorSize = [&](const SDValue &Op) {
+    return !Op.getValueType().isVector() ||
            Op.getValueType().getVectorNumElements() == NumElts;
   };
 
   auto IsConstantBuildVectorOrUndef = [&](const SDValue &Op) {
     BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Op);
-    return (Op.getOpcode() == ISD::UNDEF) || (BV && BV->isConstant());
+    return (Op.getOpcode() == ISD::UNDEF) ||
+           (Op.getOpcode() == ISD::CONDCODE) || (BV && BV->isConstant());
   };
 
   // All operands must be vector types with the same number of elements as
   // the result type and must be either UNDEF or a build vector of constant
   // or UNDEF scalars.
   if (!std::all_of(Ops.begin(), Ops.end(), IsConstantBuildVectorOrUndef) ||
-      !std::all_of(Ops.begin(), Ops.end(), IsSameVectorSize))
+      !std::all_of(Ops.begin(), Ops.end(), IsScalarOrSameVectorSize))
     return SDValue();
 
   // Find legal integer scalar type for constant promotion and
   // ensure that its scalar size is at least as large as source.
   EVT SVT = VT.getScalarType();
   EVT LegalSVT = SVT;
   if (SVT.isInteger()) {
     LegalSVT = TLI->getTypeToTransformTo(*getContext(), SVT);
     if (LegalSVT.bitsLT(SVT))
       return SDValue();
   }
 
   // Constant fold each scalar lane separately.
   SmallVector<SDValue, 4> ScalarResults;
   for (unsigned i = 0; i != NumElts; i++) {
     SmallVector<SDValue, 4> ScalarOps;
     for (SDValue Op : Ops) {
       EVT InSVT = Op.getValueType().getScalarType();
       BuildVectorSDNode *InBV = dyn_cast<BuildVectorSDNode>(Op);
       if (!InBV) {
-        // We've checked that this is UNDEF above.
+        // We've checked that this is UNDEF or a constant of some kind.
+        if (Op.isUndef())
           ScalarOps.push_back(getUNDEF(InSVT));
+        else
+          ScalarOps.push_back(Op);
         continue;
       }
 
       SDValue ScalarOp = InBV->getOperand(i);
       EVT ScalarVT = ScalarOp.getValueType();
 
       // Build vector (integer) scalar operands may need implicit
       // truncation - do this before constant folding.
if (N1.getOpcode() == ISD::BUILD_VECTOR &&
       Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
       return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
     }
     break;
   case ISD::SETCC: {
     // Use FoldSetCC to simplify SETCC's.
     if (SDValue V = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL))
       return V;
+    // Vector constant folding.
+    SDValue Ops[] = {N1, N2, N3};
+    if (SDValue V = FoldConstantVectorArithmetic(Opcode, DL, VT, Ops))
+      return V;
     break;
   }
   case ISD::SELECT:
     if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1)) {
      if (N1C->getZExtValue())
        return N2;             // select true, X, Y -> X
      return N3;             // select false, X, Y -> Y
     }

llvm/trunk/test/CodeGen/X86/2011-10-21-widen-cmp.ll

entry:
   %1 = select <2 x i1> %0, <2 x double> undef, <2 x double> undef
   store <2 x double> %1, <2 x double>* undef
   ret void
 }
 
 define void @mp_11193(<8 x float> * nocapture %aFOO, <8 x float>* nocapture %RET) nounwind {
 ; CHECK-LABEL: mp_11193:
 ; CHECK:       # BB#0: # %allocas
-; CHECK-NEXT:    movaps {{.*#+}} xmm0 = [3.000000e+00,3.000000e+00,3.000000e+00,3.000000e+00]
-; CHECK-NEXT:    movaps {{.*#+}} xmm1 = [9.000000e+00,1.000000e+00,9.000000e+00,1.000000e+00]
-; CHECK-NEXT:    cmpltps %xmm0, %xmm1
-; CHECK-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
-; CHECK-NEXT:    pshufb %xmm2, %xmm1
-; CHECK-NEXT:    movaps {{.*#+}} xmm3 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
-; CHECK-NEXT:    cmpltps %xmm0, %xmm3
-; CHECK-NEXT:    pshufb %xmm2, %xmm3
-; CHECK-NEXT:    punpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm1[0]
-; CHECK-NEXT:    psllw $15, %xmm3
-; CHECK-NEXT:    psraw $15, %xmm3
-; CHECK-NEXT:    pextrb $0, %xmm3, %eax
-; CHECK-NEXT:    shlb $7, %al
-; CHECK-NEXT:    sarb $7, %al
-; CHECK-NEXT:    movsbl %al, %eax
-; CHECK-NEXT:    xorps %xmm0, %xmm0
-; CHECK-NEXT:    cvtsi2ssl %eax, %xmm0
-; CHECK-NEXT:    movss %xmm0, (%rsi)
+; CHECK-NEXT:    movl $-1082130432, (%rsi) # imm = 0xFFFFFFFFBF800000
 ; CHECK-NEXT:    retq
 allocas:
   %bincmp = fcmp olt <8 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 9.000000e+00, float 1.000000e+00, float 9.000000e+00, float 1.000000e+00> , <float 3.000000e+00, float 3.000000e+00, float 3.000000e+00, float 3.000000e+00, float 3.000000e+00, float 3.000000e+00, float 3.000000e+00, float 3.000000e+00>
   %t = extractelement <8 x i1> %bincmp, i32 0
   %ft = sitofp i1 %t to float
   %pp = bitcast <8 x float>* %RET to float*
   store float %ft, float* %pp
   ret void
 }
 

llvm/trunk/test/CodeGen/X86/2011-20-21-zext-ui2fp.ll

 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s
 
 ; Check that the booleans are converted using zext and not via sext.
 ; 0x1 means that we only look at the first bit.
 
 define void @ui_to_fp_conv(<8 x float> * nocapture %aFOO, <8 x float>* nocapture %RET) nounwind {
-; CHECK: 0x1
 ; CHECK-LABEL: ui_to_fp_conv:
 ; CHECK:       # BB#0: # %allocas
-; CHECK-NEXT:    movaps {{.*#+}} xmm0 = [1.000000e+00,1.000000e+00,3.000000e+00,3.000000e+00]
-; CHECK-NEXT:    cmpltps {{.*}}(%rip), %xmm0
-; CHECK-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
-; CHECK-NEXT:    pxor %xmm1, %xmm1
-; CHECK-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
-; CHECK-NEXT:    psllw $15, %xmm0
-; CHECK-NEXT:    psraw $15, %xmm0
-; CHECK-NEXT:    pmovzxwd {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
-; CHECK-NEXT:    movdqa {{.*#+}} xmm2 = [1,1,1,1]
-; CHECK-NEXT:    pand %xmm2, %xmm1
-; CHECK-NEXT:    movdqa {{.*#+}} xmm3 = [1258291200,1258291200,1258291200,1258291200]
-; CHECK-NEXT:    movdqa %xmm1, %xmm4
-; CHECK-NEXT:    pblendw {{.*#+}} xmm4 = xmm4[0],xmm3[1],xmm4[2],xmm3[3],xmm4[4],xmm3[5],xmm4[6],xmm3[7]
-; CHECK-NEXT:    psrld $16, %xmm1
-; CHECK-NEXT:    movdqa {{.*#+}} xmm5 = [1392508928,1392508928,1392508928,1392508928]
-; CHECK-NEXT:    pblendw {{.*#+}} xmm1 = xmm1[0],xmm5[1],xmm1[2],xmm5[3],xmm1[4],xmm5[5],xmm1[6],xmm5[7]
-; CHECK-NEXT:    movaps {{.*#+}} xmm6 = [-5.497642e+11,-5.497642e+11,-5.497642e+11,-5.497642e+11]
-; CHECK-NEXT:    addps %xmm6, %xmm1
-; CHECK-NEXT:    addps %xmm4, %xmm1
-; CHECK-NEXT:    punpckhwd {{.*#+}} xmm0 = xmm0[4,4,5,5,6,6,7,7]
-; CHECK-NEXT:    pand %xmm2, %xmm0
-; CHECK-NEXT:    pblendw {{.*#+}} xmm3 = xmm0[0],xmm3[1],xmm0[2],xmm3[3],xmm0[4],xmm3[5],xmm0[6],xmm3[7]
-; CHECK-NEXT:    psrld $16, %xmm0
-; CHECK-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0],xmm5[1],xmm0[2],xmm5[3],xmm0[4],xmm5[5],xmm0[6],xmm5[7]
-; CHECK-NEXT:    addps %xmm6, %xmm0
-; CHECK-NEXT:    addps %xmm3, %xmm0
-; CHECK-NEXT:    movups %xmm0, 16(%rsi)
-; CHECK-NEXT:    movups %xmm1, (%rsi)
+; CHECK-NEXT:    movaps {{.*#+}} xmm0 = [1.000000e+00,1.000000e+00,0.000000e+00,0.000000e+00]
+; CHECK-NEXT:    xorps %xmm1, %xmm1
+; CHECK-NEXT:    movups %xmm1, 16(%rsi)
+; CHECK-NEXT:    movups %xmm0, (%rsi)
 ; CHECK-NEXT:    retq
 allocas:
   %bincmp = fcmp olt <8 x float> <float 1.000000e+00, float 1.000000e+00, float 3.000000e+00, float 3.000000e+00, float 3.000000e+00, float 3.000000e+00, float 3.000000e+00, float 3.000000e+00> , <float 3.000000e+00, float 3.000000e+00, float 3.000000e+00, float 3.000000e+00, float 3.000000e+00, float 3.000000e+00, float 3.000000e+00, float 3.000000e+00>
   %bool2float = uitofp <8 x i1> %bincmp to <8 x float>
   store <8 x float> %bool2float, <8 x float>* %RET, align 4
   ret void
 }
 
 
 

llvm/trunk/test/CodeGen/X86/vec_minmax_sint.ll

; AVX512-NEXT:    retq
   ret <32 x i8> %2
 }
 
 ;
 ; Constant Folding
 ;
 
 define <2 x i64> @max_gt_v2i64c() {
-; SSE2-LABEL: max_gt_v2i64c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [18446744073709551609,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551615,1]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE2-NEXT:    movdqa %xmm0, %xmm3
-; SSE2-NEXT:    pxor %xmm2, %xmm3
-; SSE2-NEXT:    pxor %xmm1, %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm4
-; SSE2-NEXT:    pcmpgtd %xmm3, %xmm4
-; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
-; SSE2-NEXT:    pcmpeqd %xmm3, %xmm0
-; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
-; SSE2-NEXT:    pand %xmm5, %xmm3
-; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3]
-; SSE2-NEXT:    por %xmm3, %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm3
-; SSE2-NEXT:    pandn %xmm2, %xmm3
-; SSE2-NEXT:    pand %xmm1, %xmm0
-; SSE2-NEXT:    por %xmm3, %xmm0
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: max_gt_v2i64c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551609,7]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE41-NEXT:    movdqa %xmm0, %xmm3
-; SSE41-NEXT:    pxor %xmm1, %xmm3
-; SSE41-NEXT:    pxor %xmm2, %xmm0
-; SSE41-NEXT:    movdqa %xmm0, %xmm4
-; SSE41-NEXT:    pcmpgtd %xmm3, %xmm4
-; SSE41-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
-; SSE41-NEXT:    pcmpeqd %xmm3, %xmm0
-; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
-; SSE41-NEXT:    pand %xmm5, %xmm3
-; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3]
-; SSE41-NEXT:    por %xmm3, %xmm0
-; SSE41-NEXT:    blendvpd %xmm2, %xmm1
-; SSE41-NEXT:    movapd %xmm1, %xmm0
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: max_gt_v2i64c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551609,7]
-; SSE42-NEXT:    movdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; SSE42-NEXT:    movdqa %xmm2, %xmm0
-; SSE42-NEXT:    pcmpgtq %xmm1, %xmm0
-; SSE42-NEXT:    blendvpd %xmm2, %xmm1
-; SSE42-NEXT:    movapd %xmm1, %xmm0
-; SSE42-NEXT:    retq
+; SSE-LABEL: max_gt_v2i64c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [18446744073709551615,7]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: max_gt_v2i64c:
 ; AVX:       # BB#0:
-; AVX-NEXT:    vmovdqa {{.*#+}} xmm0 = [18446744073709551609,7]
-; AVX-NEXT:    vmovdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; AVX-NEXT:    vpcmpgtq %xmm1, %xmm0, %xmm2
-; AVX-NEXT:    vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
+; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [18446744073709551615,7]
 ; AVX-NEXT:    retq
   %1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0
   %2 = insertelement <2 x i64> <i64 -1, i64 1>, i64 -1, i32 0
   %3 = icmp sgt <2 x i64> %1, %2
   %4 = select <2 x i1> %3, <2 x i64> %1, <2 x i64> %2
   ret <2 x i64> %4
 }
 
 define <4 x i64> @max_gt_v4i64c() {
-; SSE2-LABEL: max_gt_v4i64c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [18446744073709551609,18446744073709551615]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm8 = [1,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm5 = [18446744073709551615,18446744073709551609]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm3 = [7,1]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE2-NEXT:    movdqa %xmm0, %xmm1
-; SSE2-NEXT:    pxor %xmm3, %xmm1
-; SSE2-NEXT:    movdqa %xmm0, %xmm6
-; SSE2-NEXT:    pxor %xmm8, %xmm6
-; SSE2-NEXT:    movdqa %xmm6, %xmm7
-; SSE2-NEXT:    pcmpgtd %xmm1, %xmm7
-; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm7[0,0,2,2]
-; SSE2-NEXT:    pcmpeqd %xmm1, %xmm6
-; SSE2-NEXT:    pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
-; SSE2-NEXT:    pand %xmm2, %xmm6
-; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm7[1,1,3,3]
-; SSE2-NEXT:    por %xmm6, %xmm1
-; SSE2-NEXT:    movdqa %xmm0, %xmm2
-; SSE2-NEXT:    pxor %xmm5, %xmm2
-; SSE2-NEXT:    pxor %xmm4, %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm6
-; SSE2-NEXT:    pcmpgtd %xmm2, %xmm6
-; SSE2-NEXT:    pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
-; SSE2-NEXT:    pcmpeqd %xmm2, %xmm0
-; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
-; SSE2-NEXT:    pand %xmm7, %xmm2
-; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3]
-; SSE2-NEXT:    por %xmm2, %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm2
-; SSE2-NEXT:    pandn %xmm5, %xmm2
-; SSE2-NEXT:    pand %xmm4, %xmm0
-; SSE2-NEXT:    por %xmm2, %xmm0
-; SSE2-NEXT:    movdqa %xmm1, %xmm2
-; SSE2-NEXT:    pandn %xmm3, %xmm2
-; SSE2-NEXT:    pand %xmm8, %xmm1
-; SSE2-NEXT:    por %xmm2, %xmm1
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: max_gt_v4i64c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movdqa {{.*#+}} xmm5 = [18446744073709551609,18446744073709551615]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm8 = [1,7]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm1 = [7,1]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE41-NEXT:    movdqa %xmm0, %xmm3
-; SSE41-NEXT:    pxor %xmm1, %xmm3
-; SSE41-NEXT:    movdqa %xmm0, %xmm6
-; SSE41-NEXT:    pxor %xmm8, %xmm6
-; SSE41-NEXT:    movdqa %xmm6, %xmm7
-; SSE41-NEXT:    pcmpgtd %xmm3, %xmm7
-; SSE41-NEXT:    pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2]
-; SSE41-NEXT:    pcmpeqd %xmm3, %xmm6
-; SSE41-NEXT:    pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
-; SSE41-NEXT:    pand %xmm4, %xmm6
-; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3]
-; SSE41-NEXT:    por %xmm6, %xmm3
-; SSE41-NEXT:    movdqa %xmm0, %xmm4
-; SSE41-NEXT:    pxor %xmm2, %xmm4
-; SSE41-NEXT:    pxor %xmm5, %xmm0
-; SSE41-NEXT:    movdqa %xmm0, %xmm6
-; SSE41-NEXT:    pcmpgtd %xmm4, %xmm6
-; SSE41-NEXT:    pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
-; SSE41-NEXT:    pcmpeqd %xmm4, %xmm0
-; SSE41-NEXT:    pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3]
-; SSE41-NEXT:    pand %xmm7, %xmm4
-; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3]
-; SSE41-NEXT:    por %xmm4, %xmm0
-; SSE41-NEXT:    blendvpd %xmm5, %xmm2
-; SSE41-NEXT:    movdqa %xmm3, %xmm0
-; SSE41-NEXT:    blendvpd %xmm8, %xmm1
-; SSE41-NEXT:    movapd %xmm2, %xmm0
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: max_gt_v4i64c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movdqa {{.*#+}} xmm4 = [18446744073709551609,18446744073709551615]
-; SSE42-NEXT:    movdqa {{.*#+}} xmm5 = [1,7]
-; SSE42-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
-; SSE42-NEXT:    movdqa {{.*#+}} xmm1 = [7,1]
-; SSE42-NEXT:    movdqa %xmm5, %xmm3
-; SSE42-NEXT:    pcmpgtq %xmm1, %xmm3
-; SSE42-NEXT:    movdqa %xmm4, %xmm0
-; SSE42-NEXT:    pcmpgtq %xmm2, %xmm0
-; SSE42-NEXT:    blendvpd %xmm4, %xmm2
-; SSE42-NEXT:    movdqa %xmm3, %xmm0
-; SSE42-NEXT:    blendvpd %xmm5, %xmm1
-; SSE42-NEXT:    movapd %xmm2, %xmm0
-; SSE42-NEXT:    retq
-;
-; AVX1-LABEL: max_gt_v4i64c:
-; AVX1:       # BB#0:
-; AVX1-NEXT:    vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
-; AVX1-NEXT:    vmovdqa {{.*#+}} xmm1 = [18446744073709551609,18446744073709551615]
-; AVX1-NEXT:    vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1
-; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [1,7]
-; AVX1-NEXT:    vpcmpgtq {{.*}}(%rip), %xmm2, %xmm2
-; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm1, %ymm1
-; AVX1-NEXT:    vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
-; AVX1-NEXT:    retq
-;
-; AVX2-LABEL: max_gt_v4i64c:
-; AVX2:       # BB#0:
-; AVX2-NEXT:    vmovdqa {{.*#+}} ymm0 = [18446744073709551609,18446744073709551615,1,7]
-; AVX2-NEXT:    vmovdqa {{.*#+}} ymm1 = [18446744073709551615,18446744073709551609,7,1]
-; AVX2-NEXT:    vpcmpgtq %ymm1, %ymm0, %ymm2
-; AVX2-NEXT:    vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
-; AVX2-NEXT:    retq
+; SSE-LABEL: max_gt_v4i64c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm1 = [7,7]
+; SSE-NEXT:    pcmpeqd %xmm0, %xmm0
+; SSE-NEXT:    retq
 ;
-; AVX512-LABEL: max_gt_v4i64c:
-; AVX512:       # BB#0:
-; AVX512-NEXT:    vmovdqa {{.*#+}} ymm0 = [18446744073709551609,18446744073709551615,1,7]
-; AVX512-NEXT:    vmovdqa {{.*#+}} ymm1 = [18446744073709551615,18446744073709551609,7,1]
-; AVX512-NEXT:    vpcmpgtq %ymm1, %ymm0, %ymm2
-; AVX512-NEXT:    vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
-; AVX512-NEXT:    retq
+; AVX-LABEL: max_gt_v4i64c:
+; AVX:       # BB#0:
+; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [18446744073709551615,18446744073709551615,7,7]
+; AVX-NEXT:    retq
   %1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0
   %2 = insertelement <4 x i64> <i64 -1, i64 -7, i64 7, i64 1>, i64 -1, i32 0
   %3 = icmp sgt <4 x i64> %1, %2
   %4 = select <4 x i1> %3, <4 x i64> %1, <4 x i64> %2
   ret <4 x i64> %4
 }
 
 define <4 x i32> @max_gt_v4i32c() {
-; SSE2-LABEL: max_gt_v4i32c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [4294967289,4294967295,1,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [4294967295,4294967289,7,1]
-; SSE2-NEXT:    movdqa %xmm1, %xmm0
-; SSE2-NEXT:    pcmpgtd %xmm2, %xmm0
-; SSE2-NEXT:    pand %xmm0, %xmm1
-; SSE2-NEXT:    pandn %xmm2, %xmm0
-; SSE2-NEXT:    por %xmm1, %xmm0
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: max_gt_v4i32c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: max_gt_v4i32c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
-; SSE42-NEXT:    retq
+; SSE-LABEL: max_gt_v4i32c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: max_gt_v4i32c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
 ; AVX-NEXT:    retq
   %1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0
   %2 = insertelement <4 x i32> <i32 -1, i32 -7, i32 7, i32 1>, i32 -1, i32 0
   %3 = icmp sgt <4 x i32> %1, %2
   %4 = select <4 x i1> %3, <4 x i32> %1, <4 x i32> %2
   ret <4 x i32> %4
 }
 
 define <8 x i32> @max_gt_v8i32c() {
-; SSE2-LABEL: max_gt_v8i32c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [4294967289,4294967291,4294967293,4294967295]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm3 = [1,3,5,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [4294967295,4294967293,4294967291,4294967289]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm5 = [7,5,3,1]
-; SSE2-NEXT:    movdqa %xmm3, %xmm1
-; SSE2-NEXT:    pcmpgtd %xmm5, %xmm1
-; SSE2-NEXT:    movdqa %xmm2, %xmm0
-; SSE2-NEXT:    pcmpgtd %xmm4, %xmm0
-; SSE2-NEXT:    pand %xmm0, %xmm2
-; SSE2-NEXT:    pandn %xmm4, %xmm0
-; SSE2-NEXT:    por %xmm2, %xmm0
-; SSE2-NEXT:    pand %xmm1, %xmm3
-; SSE2-NEXT:    pandn %xmm5, %xmm1
-; SSE2-NEXT:    por %xmm3, %xmm1
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: max_gt_v8i32c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
-; SSE41-NEXT:    movaps {{.*#+}} xmm1 = [7,5,5,7]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: max_gt_v8i32c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
-; SSE42-NEXT:    movaps {{.*#+}} xmm1 = [7,5,5,7]
-; SSE42-NEXT:    retq
+; SSE-LABEL: max_gt_v8i32c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
+; SSE-NEXT:    movaps {{.*#+}} xmm1 = [7,5,5,7]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: max_gt_v8i32c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [4294967295,4294967293,4294967293,4294967295,7,5,5,7]
 ; AVX-NEXT:    retq
   %1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0
   %2 = insertelement <8 x i32> <i32 -1, i32 -3, i32 -5, i32 -7, i32 7, i32 5, i32 3, i32 1>, i32 -1, i32 0
   %3 = icmp sgt <8 x i32> %1, %2
; AVX-NEXT:    retq
   %1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0
   %2 = insertelement <16 x i16> <i16 -1, i16 -2, i16 -3, i16 -4, i16 -5, i16 -6, i16 -7, i16 0, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, i16 -1, i32 0
   %3 = icmp sgt <16 x i16> %1, %2
   %4 = select <16 x i1> %3, <16 x i16> %1, <16 x i16> %2
   ret <16 x i16> %4
 }
 
 define <16 x i8> @max_gt_v16i8c() {
-; SSE2-LABEL: max_gt_v16i8c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [249,250,251,252,253,254,255,0,1,2,3,4,5,6,7,8]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [255,254,253,252,251,250,249,0,7,6,5,4,3,2,1,0]
-; SSE2-NEXT:    movdqa %xmm1, %xmm0
-; SSE2-NEXT:    pcmpgtb %xmm2, %xmm0
-; SSE2-NEXT:    pand %xmm0, %xmm1
-; SSE2-NEXT:    pandn %xmm2, %xmm0
-; SSE2-NEXT:    por %xmm1, %xmm0
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: max_gt_v16i8c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: max_gt_v16i8c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
-; SSE42-NEXT:    retq
+; SSE-LABEL: max_gt_v16i8c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: max_gt_v16i8c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
 ; AVX-NEXT:    retq
   %1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0
   %2 = insertelement <16 x i8> <i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, i8 -1, i32 0
   %3 = icmp sgt <16 x i8> %1, %2
   %4 = select <16 x i1> %3, <16 x i8> %1, <16 x i8> %2
   ret <16 x i8> %4
 }
 
 define <2 x i64> @max_ge_v2i64c() {
-; SSE2-LABEL: max_ge_v2i64c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [18446744073709551609,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551615,1]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE2-NEXT:    movdqa %xmm0, %xmm3
-; SSE2-NEXT:    pxor %xmm1, %xmm3
-; SSE2-NEXT:    pxor %xmm2, %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm4
-; SSE2-NEXT:    pcmpgtd %xmm3, %xmm4
-; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
-; SSE2-NEXT:    pcmpeqd %xmm3, %xmm0
-; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; SSE2-NEXT:    pand %xmm5, %xmm0
-; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
-; SSE2-NEXT:    por %xmm0, %xmm3
-; SSE2-NEXT:    pcmpeqd %xmm0, %xmm0
-; SSE2-NEXT:    pxor %xmm3, %xmm0
-; SSE2-NEXT:    pandn %xmm1, %xmm3
-; SSE2-NEXT:    pandn %xmm2, %xmm0
-; SSE2-NEXT:    por %xmm3, %xmm0
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: max_ge_v2i64c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551609,7]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE41-NEXT:    movdqa %xmm0, %xmm3
-; SSE41-NEXT:    pxor %xmm2, %xmm3
-; SSE41-NEXT:    pxor %xmm1, %xmm0
-; SSE41-NEXT:    movdqa %xmm0, %xmm4
-; SSE41-NEXT:    pcmpgtd %xmm3, %xmm4
-; SSE41-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
-; SSE41-NEXT:    pcmpeqd %xmm3, %xmm0
-; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; SSE41-NEXT:    pand %xmm5, %xmm0
-; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
-; SSE41-NEXT:    por %xmm0, %xmm3
-; SSE41-NEXT:    pcmpeqd %xmm0, %xmm0
-; SSE41-NEXT:    pxor %xmm3, %xmm0
-; SSE41-NEXT:    blendvpd %xmm2, %xmm1
-; SSE41-NEXT:    movapd %xmm1, %xmm0
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: max_ge_v2i64c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551609,7]
-; SSE42-NEXT:    movdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; SSE42-NEXT:    movdqa %xmm1, %xmm3
-; SSE42-NEXT:    pcmpgtq %xmm2, %xmm3
-; SSE42-NEXT:    pcmpeqd %xmm0, %xmm0
-; SSE42-NEXT:    pxor %xmm3, %xmm0
-; SSE42-NEXT:    blendvpd %xmm2, %xmm1
-; SSE42-NEXT:    movapd %xmm1, %xmm0
-; SSE42-NEXT:    retq
+; SSE-LABEL: max_ge_v2i64c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [18446744073709551615,7]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: max_ge_v2i64c:
 ; AVX:       # BB#0:
-; AVX-NEXT:    vmovdqa {{.*#+}} xmm0 = [18446744073709551609,7]
-; AVX-NEXT:    vmovdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; AVX-NEXT:    vpcmpgtq %xmm0, %xmm1, %xmm2
-; AVX-NEXT:    vpcmpeqd %xmm3, %xmm3, %xmm3
-; AVX-NEXT:    vpxor %xmm3, %xmm2, %xmm2
-; AVX-NEXT:    vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
+; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [18446744073709551615,7]
 ; AVX-NEXT:    retq
   %1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0
   %2 = insertelement <2 x i64> <i64 -1, i64 1>, i64 -1, i32 0
   %3 = icmp sge <2 x i64> %1, %2
   %4 = select <2 x i1> %3, <2 x i64> %1, <2 x i64> %2
   ret <2 x i64> %4
 }
 
 define <4 x i64> @max_ge_v4i64c() {
-; SSE2-LABEL: max_ge_v4i64c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm10 = [18446744073709551609,18446744073709551615]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm8 = [1,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm5 = [18446744073709551615,18446744073709551609]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm9 = [7,1]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm7 = [2147483648,0,2147483648,0]
-; SSE2-NEXT:    movdqa %xmm7, %xmm0
-; SSE2-NEXT:    pxor %xmm8, %xmm0
-; SSE2-NEXT:    movdqa %xmm7, %xmm1
-; SSE2-NEXT:    pxor %xmm9, %xmm1
-; SSE2-NEXT:    movdqa %xmm1, %xmm6
-; SSE2-NEXT:    pcmpgtd %xmm0, %xmm6
-; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm6[0,0,2,2]
-; SSE2-NEXT:    pcmpeqd %xmm0, %xmm1
-; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[1,1,3,3]
-; SSE2-NEXT:    pand %xmm2, %xmm0
-; SSE2-NEXT:    pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
-; SSE2-NEXT:    por %xmm0, %xmm6
-; SSE2-NEXT:    pcmpeqd %xmm0, %xmm0
-; SSE2-NEXT:    movdqa %xmm6, %xmm1
-; SSE2-NEXT:    pxor %xmm0, %xmm1
-; SSE2-NEXT:    movdqa %xmm7, %xmm2
-; SSE2-NEXT:    pxor %xmm10, %xmm2
-; SSE2-NEXT:    pxor %xmm5, %xmm7
-; SSE2-NEXT:    movdqa %xmm7, %xmm3
-; SSE2-NEXT:    pcmpgtd %xmm2, %xmm3
-; SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
-; SSE2-NEXT:    pcmpeqd %xmm2, %xmm7
-; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm7[1,1,3,3]
-; SSE2-NEXT:    pand %xmm4, %xmm2
-; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
-; SSE2-NEXT:    por %xmm2, %xmm3
-; SSE2-NEXT:    pxor %xmm3, %xmm0
-; SSE2-NEXT:    pandn %xmm10, %xmm3
-; SSE2-NEXT:    pandn %xmm5, %xmm0
-; SSE2-NEXT:    por %xmm3, %xmm0
-; SSE2-NEXT:    pandn %xmm8, %xmm6
-; SSE2-NEXT:    pandn %xmm9, %xmm1
-; SSE2-NEXT:    por %xmm6, %xmm1
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: max_ge_v4i64c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movdqa {{.*#+}} xmm9 = [18446744073709551609,18446744073709551615]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm8 = [1,7]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm1 = [7,1]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE41-NEXT:    movdqa %xmm0, %xmm3
-; SSE41-NEXT:    pxor %xmm8, %xmm3
-; SSE41-NEXT:    movdqa %xmm0, %xmm6
-; SSE41-NEXT:    pxor %xmm1, %xmm6
-; SSE41-NEXT:    movdqa %xmm6, %xmm7
-; SSE41-NEXT:    pcmpgtd %xmm3, %xmm7
-; SSE41-NEXT:    pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2]
-; SSE41-NEXT:    pcmpeqd %xmm3, %xmm6
-; SSE41-NEXT:    pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
-; SSE41-NEXT:    pand %xmm4, %xmm6
-; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3]
-; SSE41-NEXT:    por %xmm6, %xmm3
-; SSE41-NEXT:    pcmpeqd %xmm4, %xmm4
-; SSE41-NEXT:    pxor %xmm4, %xmm3
-; SSE41-NEXT:    movdqa %xmm0, %xmm6
-; SSE41-NEXT:    pxor %xmm9, %xmm6
-; SSE41-NEXT:    pxor %xmm2, %xmm0
-; SSE41-NEXT:    movdqa %xmm0, %xmm7
-; SSE41-NEXT:    pcmpgtd %xmm6, %xmm7
-; SSE41-NEXT:    pshufd {{.*#+}} xmm5 = xmm7[0,0,2,2]
-; SSE41-NEXT:    pcmpeqd %xmm6, %xmm0
-; SSE41-NEXT:    pshufd {{.*#+}} xmm6 = xmm0[1,1,3,3]
-; SSE41-NEXT:    pand %xmm5, %xmm6
-; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm7[1,1,3,3]
-; SSE41-NEXT:    por %xmm6, %xmm0
-; SSE41-NEXT:    pxor %xmm4, %xmm0
-; SSE41-NEXT:    blendvpd %xmm9, %xmm2
-; SSE41-NEXT:    movdqa %xmm3, %xmm0
-; SSE41-NEXT:    blendvpd %xmm8, %xmm1
-; SSE41-NEXT:    movapd %xmm2, %xmm0
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: max_ge_v4i64c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movdqa {{.*#+}} xmm4 = [18446744073709551609,18446744073709551615]
-; SSE42-NEXT:    movdqa {{.*#+}} xmm5 = [1,7]
-; SSE42-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
-; SSE42-NEXT:    movdqa {{.*#+}} xmm1 = [7,1]
-; SSE42-NEXT:    movdqa %xmm1, %xmm3
-; SSE42-NEXT:    pcmpgtq %xmm5, %xmm3
-; SSE42-NEXT:    pcmpeqd %xmm6, %xmm6
-; SSE42-NEXT:    pxor %xmm6, %xmm3
-; SSE42-NEXT:    movdqa %xmm2, %xmm0
-; SSE42-NEXT:    pcmpgtq %xmm4, %xmm0
-; SSE42-NEXT:    pxor %xmm6, %xmm0
-; SSE42-NEXT:    blendvpd %xmm4, %xmm2
-; SSE42-NEXT:    movdqa %xmm3, %xmm0
-; SSE42-NEXT:    blendvpd %xmm5, %xmm1
-; SSE42-NEXT:    movapd %xmm2, %xmm0
-; SSE42-NEXT:    retq
-;
-; AVX1-LABEL: max_ge_v4i64c:
-; AVX1:       # BB#0:
-; AVX1-NEXT:    vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
-; AVX1-NEXT:    vmovdqa {{.*#+}} xmm1 = [7,1]
-; AVX1-NEXT:    vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1
-; AVX1-NEXT:    vpcmpeqd %xmm2, %xmm2, %xmm2
-; AVX1-NEXT:    vpxor %xmm2, %xmm1, %xmm1
-; AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 = [18446744073709551615,18446744073709551609]
-; AVX1-NEXT:    vpcmpgtq {{.*}}(%rip), %xmm3, %xmm3
-; AVX1-NEXT:    vpxor %xmm2, %xmm3, %xmm2
-; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm2, %ymm1
-; AVX1-NEXT:    vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
-; AVX1-NEXT:    retq
-;
-; AVX2-LABEL: max_ge_v4i64c:
-; AVX2:       # BB#0:
-; AVX2-NEXT:    vmovdqa {{.*#+}} ymm0 = [18446744073709551609,18446744073709551615,1,7]
-; AVX2-NEXT:    vmovdqa {{.*#+}} ymm1 = [18446744073709551615,18446744073709551609,7,1]
-; AVX2-NEXT:    vpcmpgtq %ymm0, %ymm1, %ymm2
-; AVX2-NEXT:    vpcmpeqd %ymm3, %ymm3, %ymm3
-; AVX2-NEXT:    vpxor %ymm3, %ymm2, %ymm2
-; AVX2-NEXT:    vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
-; AVX2-NEXT:    retq
+; SSE-LABEL: max_ge_v4i64c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm1 = [7,7]
+; SSE-NEXT:    pcmpeqd %xmm0, %xmm0
+; SSE-NEXT:    retq
 ;
-; AVX512-LABEL: max_ge_v4i64c:
-; AVX512:       # BB#0:
-; AVX512-NEXT:    vmovdqa {{.*#+}} ymm0 = [18446744073709551609,18446744073709551615,1,7]
-; AVX512-NEXT:    vmovdqa {{.*#+}} ymm1 = [18446744073709551615,18446744073709551609,7,1]
-; AVX512-NEXT:    vpcmpgtq %ymm0, %ymm1, %ymm2
-; AVX512-NEXT:    vpcmpeqd %ymm3, %ymm3, %ymm3
-; AVX512-NEXT:    vpxor %ymm3, %ymm2, %ymm2
-; AVX512-NEXT:    vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
-; AVX512-NEXT:    retq
+; AVX-LABEL: max_ge_v4i64c:
+; AVX:       # BB#0:
+; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [18446744073709551615,18446744073709551615,7,7]
+; AVX-NEXT:    retq
   %1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0
   %2 = insertelement <4 x i64> <i64 -1, i64 -7, i64 7, i64 1>, i64 -1, i32 0
   %3 = icmp sge <4 x i64> %1, %2
   %4 = select <4 x i1> %3, <4 x i64> %1, <4 x i64> %2
   ret <4 x i64> %4
 }
 
 define <4 x i32> @max_ge_v4i32c() {
-; SSE2-LABEL: max_ge_v4i32c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [4294967289,4294967295,1,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [4294967295,4294967289,7,1]
-; SSE2-NEXT:    movdqa %xmm2, %xmm3
-; SSE2-NEXT:    pcmpgtd %xmm1, %xmm3
-; SSE2-NEXT:    pcmpeqd %xmm0, %xmm0
-; SSE2-NEXT:    pxor %xmm3, %xmm0
-; SSE2-NEXT:    pandn %xmm1, %xmm3
-; SSE2-NEXT:    pandn %xmm2, %xmm0
-; SSE2-NEXT:    por %xmm3, %xmm0
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: max_ge_v4i32c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: max_ge_v4i32c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
-; SSE42-NEXT:    retq
+; SSE-LABEL: max_ge_v4i32c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: max_ge_v4i32c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
 ; AVX-NEXT:    retq
   %1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0
   %2 = insertelement <4 x i32> <i32 -1, i32 -7, i32 7, i32 1>, i32 -1, i32 0
   %3 = icmp sge <4 x i32> %1, %2
   %4 = select <4 x i1> %3, <4 x i32> %1, <4 x i32> %2
   ret <4 x i32> %4
 }
 
 define <8 x i32> @max_ge_v8i32c() {
-; SSE2-LABEL: max_ge_v8i32c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [4294967289,4294967291,4294967293,4294967295]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm3 = [1,3,5,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [4294967295,4294967293,4294967291,4294967289]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm5 = [7,5,3,1]
-; SSE2-NEXT:    movdqa %xmm5, %xmm6
-; SSE2-NEXT:    pcmpgtd %xmm3, %xmm6
-; SSE2-NEXT:    pcmpeqd %xmm0, %xmm0
-; SSE2-NEXT:    movdqa %xmm6, %xmm1
-; SSE2-NEXT:    pxor %xmm0, %xmm1
-; SSE2-NEXT:    movdqa %xmm4, %xmm7
-; SSE2-NEXT:    pcmpgtd %xmm2, %xmm7
-; SSE2-NEXT:    pxor %xmm7, %xmm0
-; SSE2-NEXT:    pandn %xmm2, %xmm7
-; SSE2-NEXT:    pandn %xmm4, %xmm0
-; SSE2-NEXT:    por %xmm7, %xmm0
-; SSE2-NEXT:    pandn %xmm3, %xmm6
-; SSE2-NEXT:    pandn %xmm5, %xmm1
-; SSE2-NEXT:    por %xmm6, %xmm1
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: max_ge_v8i32c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
-; SSE41-NEXT:    movaps {{.*#+}} xmm1 = [7,5,5,7]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: max_ge_v8i32c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
-; SSE42-NEXT:    movaps {{.*#+}} xmm1 = [7,5,5,7]
-; SSE42-NEXT:    retq
+; SSE-LABEL: max_ge_v8i32c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
+; SSE-NEXT:    movaps {{.*#+}} xmm1 = [7,5,5,7]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: max_ge_v8i32c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [4294967295,4294967293,4294967293,4294967295,7,5,5,7]
 ; AVX-NEXT:    retq
   %1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0
   %2 = insertelement <8 x i32> <i32 -1, i32 -3, i32 -5, i32 -7, i32 7, i32 5, i32 3, i32 1>, i32 -1, i32 0
   %3 = icmp sge <8 x i32> %1, %2
; AVX-NEXT:    retq
   %1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0
   %2 = insertelement <16 x i16> <i16 -1, i16 -2, i16 -3, i16 -4, i16 -5, i16 -6, i16 -7, i16 0, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, i16 -1, i32 0
   %3 = icmp sge <16 x i16> %1, %2
   %4 = select <16 x i1> %3, <16 x i16> %1, <16 x i16> %2
   ret <16 x i16> %4
 }
 
 define <16 x i8> @max_ge_v16i8c() {
-; SSE2-LABEL: max_ge_v16i8c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [249,250,251,252,253,254,255,0,1,2,3,4,5,6,7,8]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [255,254,253,252,251,250,249,0,7,6,5,4,3,2,1,0]
-; SSE2-NEXT:    movdqa %xmm2, %xmm3
-; SSE2-NEXT:    pcmpgtb %xmm1, %xmm3
-; SSE2-NEXT:    pcmpeqd %xmm0, %xmm0
-; SSE2-NEXT:    pxor %xmm3, %xmm0
-; SSE2-NEXT:    pandn %xmm1, %xmm3
-; SSE2-NEXT:    pandn %xmm2, %xmm0
-; SSE2-NEXT:    por %xmm3, %xmm0
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: max_ge_v16i8c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: max_ge_v16i8c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
-; SSE42-NEXT:    retq
+; SSE-LABEL: max_ge_v16i8c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: max_ge_v16i8c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
 ; AVX-NEXT:    retq
   %1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0
   %2 = insertelement <16 x i8> <i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, i8 -1, i32 0
   %3 = icmp sge <16 x i8> %1, %2
   %4 = select <16 x i1> %3, <16 x i8> %1, <16 x i8> %2
   ret <16 x i8> %4
 }
 
 define <2 x i64> @min_lt_v2i64c() {
-; SSE2-LABEL: min_lt_v2i64c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [18446744073709551609,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551615,1]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE2-NEXT:    movdqa %xmm0, %xmm3
-; SSE2-NEXT:    pxor %xmm1, %xmm3
-; SSE2-NEXT:    pxor %xmm2, %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm4
-; SSE2-NEXT:    pcmpgtd %xmm3, %xmm4
-; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
-; SSE2-NEXT:    pcmpeqd %xmm3, %xmm0
-; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
-; SSE2-NEXT:    pand %xmm5, %xmm3
-; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3]
-; SSE2-NEXT:    por %xmm3, %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm3
-; SSE2-NEXT:    pandn %xmm2, %xmm3
-; SSE2-NEXT:    pand %xmm1, %xmm0
-; SSE2-NEXT:    por %xmm3, %xmm0
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: min_lt_v2i64c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551609,7]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE41-NEXT:    movdqa %xmm0, %xmm3
-; SSE41-NEXT:    pxor %xmm2, %xmm3
-; SSE41-NEXT:    pxor %xmm1, %xmm0
-; SSE41-NEXT:    movdqa %xmm0, %xmm4
-; SSE41-NEXT:    pcmpgtd %xmm3, %xmm4
-; SSE41-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
-; SSE41-NEXT:    pcmpeqd %xmm3, %xmm0
-; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
-; SSE41-NEXT:    pand %xmm5, %xmm3
-; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3]
-; SSE41-NEXT:    por %xmm3, %xmm0
-; SSE41-NEXT:    blendvpd %xmm2, %xmm1
-; SSE41-NEXT:    movapd %xmm1, %xmm0
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: min_lt_v2i64c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551609,7]
-; SSE42-NEXT:    movdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; SSE42-NEXT:    movdqa %xmm1, %xmm0
-; SSE42-NEXT:    pcmpgtq %xmm2, %xmm0
-; SSE42-NEXT:    blendvpd %xmm2, %xmm1
-; SSE42-NEXT:    movapd %xmm1, %xmm0
-; SSE42-NEXT:    retq
+; SSE-LABEL: min_lt_v2i64c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [18446744073709551609,1]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: min_lt_v2i64c:
 ; AVX:       # BB#0:
-; AVX-NEXT:    vmovdqa {{.*#+}} xmm0 = [18446744073709551609,7]
-; AVX-NEXT:    vmovdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; AVX-NEXT:    vpcmpgtq %xmm0, %xmm1, %xmm2
-; AVX-NEXT:    vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
+; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [18446744073709551609,1]
 ; AVX-NEXT:    retq
   %1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0
   %2 = insertelement <2 x i64> <i64 -1, i64 1>, i64 -1, i32 0
   %3 = icmp slt <2 x i64> %1, %2
   %4 = select <2 x i1> %3, <2 x i64> %1, <2 x i64> %2
   ret <2 x i64> %4
 }
 
 define <4 x i64> @min_lt_v4i64c() {
-; SSE2-LABEL: min_lt_v4i64c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [18446744073709551609,18446744073709551615]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm8 = [1,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm5 = [18446744073709551615,18446744073709551609]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm3 = [7,1]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE2-NEXT:    movdqa %xmm0, %xmm1
-; SSE2-NEXT:    pxor %xmm8, %xmm1
-; SSE2-NEXT:    movdqa %xmm0, %xmm6
-; SSE2-NEXT:    pxor %xmm3, %xmm6
-; SSE2-NEXT:    movdqa %xmm6, %xmm7
-; SSE2-NEXT:    pcmpgtd %xmm1, %xmm7
-; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm7[0,0,2,2]
-; SSE2-NEXT:    pcmpeqd %xmm1, %xmm6
-; SSE2-NEXT:    pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
-; SSE2-NEXT:    pand %xmm2, %xmm6
-; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm7[1,1,3,3]
-; SSE2-NEXT:    por %xmm6, %xmm1
-; SSE2-NEXT:    movdqa %xmm0, %xmm2
-; SSE2-NEXT:    pxor %xmm4, %xmm2
-; SSE2-NEXT:    pxor %xmm5, %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm6
-; SSE2-NEXT:    pcmpgtd %xmm2, %xmm6
-; SSE2-NEXT:    pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
-; SSE2-NEXT:    pcmpeqd %xmm2, %xmm0
-; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
-; SSE2-NEXT:    pand %xmm7, %xmm2
-; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3]
-; SSE2-NEXT:    por %xmm2, %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm2
-; SSE2-NEXT:    pandn %xmm5, %xmm2
-; SSE2-NEXT:    pand %xmm4, %xmm0
-; SSE2-NEXT:    por %xmm2, %xmm0
-; SSE2-NEXT:    movdqa %xmm1, %xmm2
-; SSE2-NEXT:    pandn %xmm3, %xmm2
-; SSE2-NEXT:    pand %xmm8, %xmm1
-; SSE2-NEXT:    por %xmm2, %xmm1
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: min_lt_v4i64c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movdqa {{.*#+}} xmm5 = [18446744073709551609,18446744073709551615]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm8 = [1,7]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm1 = [7,1]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE41-NEXT:    movdqa %xmm0, %xmm3
-; SSE41-NEXT:    pxor %xmm8, %xmm3
-; SSE41-NEXT:    movdqa %xmm0, %xmm6
-; SSE41-NEXT:    pxor %xmm1, %xmm6
-; SSE41-NEXT:    movdqa %xmm6, %xmm7
-; SSE41-NEXT:    pcmpgtd %xmm3, %xmm7
-; SSE41-NEXT:    pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2]
-; SSE41-NEXT:    pcmpeqd %xmm3, %xmm6
-; SSE41-NEXT:    pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
-; SSE41-NEXT:    pand %xmm4, %xmm6
-; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3]
-; SSE41-NEXT:    por %xmm6, %xmm3
-; SSE41-NEXT:    movdqa %xmm0, %xmm4
-; SSE41-NEXT:    pxor %xmm5, %xmm4
-; SSE41-NEXT:    pxor %xmm2, %xmm0
-; SSE41-NEXT:    movdqa %xmm0, %xmm6
-; SSE41-NEXT:    pcmpgtd %xmm4, %xmm6
-; SSE41-NEXT:    pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
-; SSE41-NEXT:    pcmpeqd %xmm4, %xmm0
-; SSE41-NEXT:    pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3]
-; SSE41-NEXT:    pand %xmm7, %xmm4
-; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3]
-; SSE41-NEXT:    por %xmm4, %xmm0
-; SSE41-NEXT:    blendvpd %xmm5, %xmm2
-; SSE41-NEXT:    movdqa %xmm3, %xmm0
-; SSE41-NEXT:    blendvpd %xmm8, %xmm1
-; SSE41-NEXT:    movapd %xmm2, %xmm0
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: min_lt_v4i64c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movdqa {{.*#+}} xmm4 = [18446744073709551609,18446744073709551615]
-; SSE42-NEXT:    movdqa {{.*#+}} xmm5 = [1,7]
-; SSE42-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
-; SSE42-NEXT:    movdqa {{.*#+}} xmm1 = [7,1]
-; SSE42-NEXT:    movdqa %xmm1, %xmm3
-; SSE42-NEXT:    pcmpgtq %xmm5, %xmm3
-; SSE42-NEXT:    movdqa %xmm2, %xmm0
-; SSE42-NEXT:    pcmpgtq %xmm4, %xmm0
-; SSE42-NEXT:    blendvpd %xmm4, %xmm2
-; SSE42-NEXT:    movdqa %xmm3, %xmm0
-; SSE42-NEXT:    blendvpd %xmm5, %xmm1
-; SSE42-NEXT:    movapd %xmm2, %xmm0
-; SSE42-NEXT:    retq
-;
-; AVX1-LABEL: min_lt_v4i64c:
-; AVX1:       # BB#0:
-; AVX1-NEXT:    vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
-; AVX1-NEXT:    vmovdqa {{.*#+}} xmm1 = [18446744073709551615,18446744073709551609]
-; AVX1-NEXT:    vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1
-; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [7,1]
-; AVX1-NEXT:    vpcmpgtq {{.*}}(%rip), %xmm2, %xmm2
-; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm1, %ymm1
-; AVX1-NEXT:    vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
-; AVX1-NEXT:    retq
-;
-; AVX2-LABEL: min_lt_v4i64c:
-; AVX2:       # BB#0:
-; AVX2-NEXT:    vmovdqa {{.*#+}} ymm0 = [18446744073709551609,18446744073709551615,1,7]
-; AVX2-NEXT:    vmovdqa {{.*#+}} ymm1 = [18446744073709551615,18446744073709551609,7,1]
-; AVX2-NEXT:    vpcmpgtq %ymm0, %ymm1, %ymm2
-; AVX2-NEXT:    vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
-; AVX2-NEXT:    retq
+; SSE-LABEL: min_lt_v4i64c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [18446744073709551609,18446744073709551609]
+; SSE-NEXT:    movaps {{.*#+}} xmm1 = [1,1]
+; SSE-NEXT:    retq
 ;
-; AVX512-LABEL: min_lt_v4i64c:
-; AVX512:       # BB#0:
-; AVX512-NEXT:    vmovdqa {{.*#+}} ymm0 = [18446744073709551609,18446744073709551615,1,7]
-; AVX512-NEXT:    vmovdqa {{.*#+}} ymm1 = [18446744073709551615,18446744073709551609,7,1]
-; AVX512-NEXT:    vpcmpgtq %ymm0, %ymm1, %ymm2
-; AVX512-NEXT:    vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
-; AVX512-NEXT:    retq
+; AVX-LABEL: min_lt_v4i64c:
+; AVX:       # BB#0:
+; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [18446744073709551609,18446744073709551609,1,1]
+; AVX-NEXT:    retq
   %1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0
   %2 = insertelement <4 x i64> <i64 -1, i64 -7, i64 7, i64 1>, i64 -1, i32 0
   %3 = icmp slt <4 x i64> %1, %2
   %4 = select <4 x i1> %3, <4 x i64> %1, <4 x i64> %2
   ret <4 x i64> %4
 }
 
 define <4 x i32> @min_lt_v4i32c() {
-; SSE2-LABEL: min_lt_v4i32c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [4294967289,4294967295,1,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [4294967295,4294967289,7,1]
-; SSE2-NEXT:    movdqa %xmm2, %xmm0
-; SSE2-NEXT:    pcmpgtd %xmm1, %xmm0
-; SSE2-NEXT:    pand %xmm0, %xmm1
-; SSE2-NEXT:    pandn %xmm2, %xmm0
-; SSE2-NEXT:    por %xmm1, %xmm0
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: min_lt_v4i32c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: min_lt_v4i32c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
-; SSE42-NEXT:    retq
+; SSE-LABEL: min_lt_v4i32c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: min_lt_v4i32c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
 ; AVX-NEXT:    retq
   %1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0
   %2 = insertelement <4 x i32> <i32 -1, i32 -7, i32 7, i32 1>, i32 -1, i32 0
   %3 = icmp slt <4 x i32> %1, %2
   %4 = select <4 x i1> %3, <4 x i32> %1, <4 x i32> %2
   ret <4 x i32> %4
 }
 
 define <8 x i32> @min_lt_v8i32c() {
-; SSE2-LABEL: min_lt_v8i32c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [4294967289,4294967291,4294967293,4294967295]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm3 = [1,3,5,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [4294967295,4294967293,4294967291,4294967289]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm5 = [7,5,3,1]
-; SSE2-NEXT:    movdqa %xmm5, %xmm1
-; SSE2-NEXT:    pcmpgtd %xmm3, %xmm1
-; SSE2-NEXT:    movdqa %xmm4, %xmm0
-; SSE2-NEXT:    pcmpgtd %xmm2, %xmm0
-; SSE2-NEXT:    pand %xmm0, %xmm2
-; SSE2-NEXT:    pandn %xmm4, %xmm0
-; SSE2-NEXT:    por %xmm2, %xmm0
-; SSE2-NEXT:    pand %xmm1, %xmm3
-; SSE2-NEXT:    pandn %xmm5, %xmm1
-; SSE2-NEXT:    por %xmm3, %xmm1
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: min_lt_v8i32c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
-; SSE41-NEXT:    movaps {{.*#+}} xmm1 = [1,3,3,1]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: min_lt_v8i32c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
-; SSE42-NEXT:    movaps {{.*#+}} xmm1 = [1,3,3,1]
-; SSE42-NEXT:    retq
+; SSE-LABEL: min_lt_v8i32c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
+; SSE-NEXT:    movaps {{.*#+}} xmm1 = [1,3,3,1]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: min_lt_v8i32c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [4294967289,4294967291,4294967291,4294967289,1,3,3,1]
 ; AVX-NEXT:    retq
   %1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0
   %2 = insertelement <8 x i32> <i32 -1, i32 -3, i32 -5, i32 -7, i32 7, i32 5, i32 3, i32 1>, i32 -1, i32 0
   %3 = icmp slt <8 x i32> %1, %2
; AVX-NEXT:    retq
   %1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0
   %2 = insertelement <16 x i16> <i16 -1, i16 -2, i16 -3, i16 -4, i16 -5, i16 -6, i16 -7, i16 0, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, i16 -1, i32 0
   %3 = icmp slt <16 x i16> %1, %2
   %4 = select <16 x i1> %3, <16 x i16> %1, <16 x i16> %2
   ret <16 x i16> %4
 }
 
 define <16 x i8> @min_lt_v16i8c() {
-; SSE2-LABEL: min_lt_v16i8c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [249,250,251,252,253,254,255,0,1,2,3,4,5,6,7,8]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [255,254,253,252,251,250,249,0,7,6,5,4,3,2,1,0]
-; SSE2-NEXT:    movdqa %xmm2, %xmm0
-; SSE2-NEXT:    pcmpgtb %xmm1, %xmm0
-; SSE2-NEXT:    pand %xmm0, %xmm1
-; SSE2-NEXT:    pandn %xmm2, %xmm0
-; SSE2-NEXT:    por %xmm1, %xmm0
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: min_lt_v16i8c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: min_lt_v16i8c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
-; SSE42-NEXT:    retq
+; SSE-LABEL: min_lt_v16i8c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: min_lt_v16i8c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
 ; AVX-NEXT:    retq
   %1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0
   %2 = insertelement <16 x i8> <i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, i8 -1, i32 0
   %3 = icmp slt <16 x i8> %1, %2
   %4 = select <16 x i1> %3, <16 x i8> %1, <16 x i8> %2
   ret <16 x i8> %4
 }
 
 define <2 x i64> @min_le_v2i64c() {
-; SSE2-LABEL: min_le_v2i64c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [18446744073709551609,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551615,1]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE2-NEXT:    movdqa %xmm0, %xmm3
-; SSE2-NEXT:    pxor %xmm2, %xmm3
-; SSE2-NEXT:    pxor %xmm1, %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm4
-; SSE2-NEXT:    pcmpgtd %xmm3, %xmm4
-; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
-; SSE2-NEXT:    pcmpeqd %xmm3, %xmm0
-; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; SSE2-NEXT:    pand %xmm5, %xmm0
-; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
-; SSE2-NEXT:    por %xmm0, %xmm3
-; SSE2-NEXT:    pcmpeqd %xmm0, %xmm0
-; SSE2-NEXT:    pxor %xmm3, %xmm0
-; SSE2-NEXT:    pandn %xmm1, %xmm3
-; SSE2-NEXT:    pandn %xmm2, %xmm0
-; SSE2-NEXT:    por %xmm3, %xmm0
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: min_le_v2i64c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551609,7]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE41-NEXT:    movdqa %xmm0, %xmm3
-; SSE41-NEXT:    pxor %xmm1, %xmm3
-; SSE41-NEXT:    pxor %xmm2, %xmm0
-; SSE41-NEXT:    movdqa %xmm0, %xmm4
-; SSE41-NEXT:    pcmpgtd %xmm3, %xmm4
-; SSE41-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
-; SSE41-NEXT:    pcmpeqd %xmm3, %xmm0
-; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; SSE41-NEXT:    pand %xmm5, %xmm0
-; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
-; SSE41-NEXT:    por %xmm0, %xmm3
-; SSE41-NEXT:    pcmpeqd %xmm0, %xmm0
-; SSE41-NEXT:    pxor %xmm3, %xmm0
-; SSE41-NEXT:    blendvpd %xmm2, %xmm1
-; SSE41-NEXT:    movapd %xmm1, %xmm0
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: min_le_v2i64c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551609,7]
-; SSE42-NEXT:    movdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; SSE42-NEXT:    movdqa %xmm2, %xmm3
-; SSE42-NEXT:    pcmpgtq %xmm1, %xmm3
-; SSE42-NEXT:    pcmpeqd %xmm0, %xmm0
-; SSE42-NEXT:    pxor %xmm3, %xmm0
-; SSE42-NEXT:    blendvpd %xmm2, %xmm1
-; SSE42-NEXT:    movapd %xmm1, %xmm0
-; SSE42-NEXT:    retq
+; SSE-LABEL: min_le_v2i64c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [18446744073709551609,1]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: min_le_v2i64c:
 ; AVX:       # BB#0:
-; AVX-NEXT:    vmovdqa {{.*#+}} xmm0 = [18446744073709551609,7]
-; AVX-NEXT:    vmovdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; AVX-NEXT:    vpcmpgtq %xmm1, %xmm0, %xmm2
-; AVX-NEXT:    vpcmpeqd %xmm3, %xmm3, %xmm3
-; AVX-NEXT:    vpxor %xmm3, %xmm2, %xmm2
-; AVX-NEXT:    vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
+; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [18446744073709551609,1]
 ; AVX-NEXT:    retq
   %1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0
   %2 = insertelement <2 x i64> <i64 -1, i64 1>, i64 -1, i32 0
   %3 = icmp sle <2 x i64> %1, %2
   %4 = select <2 x i1> %3, <2 x i64> %1, <2 x i64> %2
   ret <2 x i64> %4
 }
 
 define <4 x i64> @min_le_v4i64c() {
-; SSE2-LABEL: min_le_v4i64c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm10 = [18446744073709551609,18446744073709551615]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm8 = [1,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm5 = [18446744073709551615,18446744073709551609]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm9 = [7,1]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm7 = [2147483648,0,2147483648,0]
-; SSE2-NEXT:    movdqa %xmm7, %xmm0
-; SSE2-NEXT:    pxor %xmm9, %xmm0
-; SSE2-NEXT:    movdqa %xmm7, %xmm1
-; SSE2-NEXT:    pxor %xmm8, %xmm1
-; SSE2-NEXT:    movdqa %xmm1, %xmm6
-; SSE2-NEXT:    pcmpgtd %xmm0, %xmm6
-; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm6[0,0,2,2]
-; SSE2-NEXT:    pcmpeqd %xmm0, %xmm1
-; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[1,1,3,3]
-; SSE2-NEXT:    pand %xmm2, %xmm0
-; SSE2-NEXT:    pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
-; SSE2-NEXT:    por %xmm0, %xmm6
-; SSE2-NEXT:    pcmpeqd %xmm0, %xmm0
-; SSE2-NEXT:    movdqa %xmm6, %xmm1
-; SSE2-NEXT:    pxor %xmm0, %xmm1
-; SSE2-NEXT:    movdqa %xmm7, %xmm2
-; SSE2-NEXT:    pxor %xmm5, %xmm2
-; SSE2-NEXT:    pxor %xmm10, %xmm7
-; SSE2-NEXT:    movdqa %xmm7, %xmm3
-; SSE2-NEXT:    pcmpgtd %xmm2, %xmm3
-; SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
-; SSE2-NEXT:    pcmpeqd %xmm2, %xmm7
-; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm7[1,1,3,3]
-; SSE2-NEXT:    pand %xmm4, %xmm2
-; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
-; SSE2-NEXT:    por %xmm2, %xmm3
-; SSE2-NEXT:    pxor %xmm3, %xmm0
-; SSE2-NEXT:    pandn %xmm10, %xmm3
-; SSE2-NEXT:    pandn %xmm5, %xmm0
-; SSE2-NEXT:    por %xmm3, %xmm0
-; SSE2-NEXT:    pandn %xmm8, %xmm6
-; SSE2-NEXT:    pandn %xmm9, %xmm1
-; SSE2-NEXT:    por %xmm6, %xmm1
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: min_le_v4i64c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movdqa {{.*#+}} xmm9 = [18446744073709551609,18446744073709551615]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm8 = [1,7]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm1 = [7,1]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE41-NEXT:    movdqa %xmm0, %xmm3
-; SSE41-NEXT:    pxor %xmm1, %xmm3
-; SSE41-NEXT:    movdqa %xmm0, %xmm6
-; SSE41-NEXT:    pxor %xmm8, %xmm6
-; SSE41-NEXT:    movdqa %xmm6, %xmm7
-; SSE41-NEXT:    pcmpgtd %xmm3, %xmm7
-; SSE41-NEXT:    pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2]
-; SSE41-NEXT:    pcmpeqd %xmm3, %xmm6
-; SSE41-NEXT:    pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
-; SSE41-NEXT:    pand %xmm4, %xmm6
-; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3]
-; SSE41-NEXT:    por %xmm6, %xmm3
-; SSE41-NEXT:    pcmpeqd %xmm4, %xmm4
-; SSE41-NEXT:    pxor %xmm4, %xmm3
-; SSE41-NEXT:    movdqa %xmm0, %xmm6
-; SSE41-NEXT:    pxor %xmm2, %xmm6
-; SSE41-NEXT:    pxor %xmm9, %xmm0
-; SSE41-NEXT:    movdqa %xmm0, %xmm7
-; SSE41-NEXT:    pcmpgtd %xmm6, %xmm7
-; SSE41-NEXT:    pshufd {{.*#+}} xmm5 = xmm7[0,0,2,2]
-; SSE41-NEXT:    pcmpeqd %xmm6, %xmm0
-; SSE41-NEXT:    pshufd {{.*#+}} xmm6 = xmm0[1,1,3,3]
-; SSE41-NEXT:    pand %xmm5, %xmm6
-; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm7[1,1,3,3]
-; SSE41-NEXT:    por %xmm6, %xmm0
-; SSE41-NEXT:    pxor %xmm4, %xmm0
-; SSE41-NEXT:    blendvpd %xmm9, %xmm2
-; SSE41-NEXT:    movdqa %xmm3, %xmm0
-; SSE41-NEXT:    blendvpd %xmm8, %xmm1
-; SSE41-NEXT:    movapd %xmm2, %xmm0
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: min_le_v4i64c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movdqa {{.*#+}} xmm4 = [18446744073709551609,18446744073709551615]
-; SSE42-NEXT:    movdqa {{.*#+}} xmm5 = [1,7]
-; SSE42-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
-; SSE42-NEXT:    movdqa {{.*#+}} xmm1 = [7,1]
-; SSE42-NEXT:    movdqa %xmm5, %xmm3
-; SSE42-NEXT:    pcmpgtq %xmm1, %xmm3
-; SSE42-NEXT:    pcmpeqd %xmm6, %xmm6
-; SSE42-NEXT:    pxor %xmm6, %xmm3
-; SSE42-NEXT:    movdqa %xmm4, %xmm0
-; SSE42-NEXT:    pcmpgtq %xmm2, %xmm0
-; SSE42-NEXT:    pxor %xmm6, %xmm0
-; SSE42-NEXT:    blendvpd %xmm4, %xmm2
-; SSE42-NEXT:    movdqa %xmm3, %xmm0
-; SSE42-NEXT:    blendvpd %xmm5, %xmm1
-; SSE42-NEXT:    movapd %xmm2, %xmm0
-; SSE42-NEXT:    retq
-;
-; AVX1-LABEL: min_le_v4i64c:
-; AVX1:       # BB#0:
-; AVX1-NEXT:    vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
-; AVX1-NEXT:    vmovdqa {{.*#+}} xmm1 = [1,7]
-; AVX1-NEXT:    vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1
-; AVX1-NEXT:    vpcmpeqd %xmm2, %xmm2, %xmm2
-; AVX1-NEXT:    vpxor %xmm2, %xmm1, %xmm1
-; AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 = [18446744073709551609,18446744073709551615]
-; AVX1-NEXT:    vpcmpgtq {{.*}}(%rip), %xmm3, %xmm3
-; AVX1-NEXT:    vpxor %xmm2, %xmm3, %xmm2
-; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm2, %ymm1
-; AVX1-NEXT:    vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
-; AVX1-NEXT:    retq
-;
-; AVX2-LABEL: min_le_v4i64c:
-; AVX2:       # BB#0:
-; AVX2-NEXT:    vmovdqa {{.*#+}} ymm0 = [18446744073709551609,18446744073709551615,1,7]
-; AVX2-NEXT:    vmovdqa {{.*#+}} ymm1 = [18446744073709551615,18446744073709551609,7,1]
-; AVX2-NEXT:    vpcmpgtq %ymm1, %ymm0, %ymm2
-; AVX2-NEXT:    vpcmpeqd %ymm3, %ymm3, %ymm3
-; AVX2-NEXT:    vpxor %ymm3, %ymm2, %ymm2
-; AVX2-NEXT:    vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
-; AVX2-NEXT:    retq
+; SSE-LABEL: min_le_v4i64c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [18446744073709551609,18446744073709551609]
+; SSE-NEXT:    movaps {{.*#+}} xmm1 = [1,1]
+; SSE-NEXT:    retq
 ;
-; AVX512-LABEL: min_le_v4i64c:
-; AVX512:       # BB#0:
-; AVX512-NEXT:    vmovdqa {{.*#+}} ymm0 = [18446744073709551609,18446744073709551615,1,7]
-; AVX512-NEXT:    vmovdqa {{.*#+}} ymm1 = [18446744073709551615,18446744073709551609,7,1]
-; AVX512-NEXT:    vpcmpgtq %ymm1, %ymm0, %ymm2
-; AVX512-NEXT:    vpcmpeqd %ymm3, %ymm3, %ymm3
-; AVX512-NEXT:    vpxor %ymm3, %ymm2, %ymm2
-; AVX512-NEXT:    vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
-; AVX512-NEXT:    retq
+; AVX-LABEL: min_le_v4i64c:
+; AVX:       # BB#0:
+; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [18446744073709551609,18446744073709551609,1,1]
+; AVX-NEXT:    retq
   %1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0
   %2 = insertelement <4 x i64> <i64 -1, i64 -7, i64 7, i64 1>, i64 -1, i32 0
   %3 = icmp sle <4 x i64> %1, %2
   %4 = select <4 x i1> %3, <4 x i64> %1, <4 x i64> %2
   ret <4 x i64> %4
 }
 
 define <4 x i32> @min_le_v4i32c() {
-; SSE2-LABEL: min_le_v4i32c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [4294967289,4294967295,1,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [4294967295,4294967289,7,1]
-; SSE2-NEXT:    movdqa %xmm1, %xmm3
-; SSE2-NEXT:    pcmpgtd %xmm2, %xmm3
-; SSE2-NEXT:    pcmpeqd %xmm0, %xmm0
-; SSE2-NEXT:    pxor %xmm3, %xmm0
-; SSE2-NEXT:    pandn %xmm1, %xmm3
-; SSE2-NEXT:    pandn %xmm2, %xmm0
-; SSE2-NEXT:    por %xmm3, %xmm0
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: min_le_v4i32c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: min_le_v4i32c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
-; SSE42-NEXT:    retq
+; SSE-LABEL: min_le_v4i32c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: min_le_v4i32c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
 ; AVX-NEXT:    retq
   %1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0
   %2 = insertelement <4 x i32> <i32 -1, i32 -7, i32 7, i32 1>, i32 -1, i32 0
   %3 = icmp sle <4 x i32> %1, %2
   %4 = select <4 x i1> %3, <4 x i32> %1, <4 x i32> %2
   ret <4 x i32> %4
 }
 
 define <8 x i32> @min_le_v8i32c() {
-; SSE2-LABEL: min_le_v8i32c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [4294967289,4294967291,4294967293,4294967295]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm3 = [1,3,5,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [4294967295,4294967293,4294967291,4294967289]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm5 = [7,5,3,1]
-; SSE2-NEXT:    movdqa %xmm3, %xmm6
-; SSE2-NEXT:    pcmpgtd %xmm5, %xmm6
-; SSE2-NEXT:    pcmpeqd %xmm0, %xmm0
-; SSE2-NEXT:    movdqa %xmm6, %xmm1
-; SSE2-NEXT:    pxor %xmm0, %xmm1
-; SSE2-NEXT:    movdqa %xmm2, %xmm7
-; SSE2-NEXT:    pcmpgtd %xmm4, %xmm7
-; SSE2-NEXT:    pxor %xmm7, %xmm0
-; SSE2-NEXT:    pandn %xmm2, %xmm7
-; SSE2-NEXT:    pandn %xmm4, %xmm0
-; SSE2-NEXT:    por %xmm7, %xmm0
-; SSE2-NEXT:    pandn %xmm3, %xmm6
-; SSE2-NEXT:    pandn %xmm5, %xmm1
-; SSE2-NEXT:    por %xmm6, %xmm1
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: min_le_v8i32c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
-; SSE41-NEXT:    movaps {{.*#+}} xmm1 = [1,3,3,1]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: min_le_v8i32c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
-; SSE42-NEXT:    movaps {{.*#+}} xmm1 = [1,3,3,1]
-; SSE42-NEXT:    retq
+; SSE-LABEL: min_le_v8i32c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
+; SSE-NEXT:    movaps {{.*#+}} xmm1 = [1,3,3,1]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: min_le_v8i32c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [4294967289,4294967291,4294967291,4294967289,1,3,3,1]
 ; AVX-NEXT:    retq
   %1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0
   %2 = insertelement <8 x i32> <i32 -1, i32 -3, i32 -5, i32 -7, i32 7, i32 5, i32 3, i32 1>, i32 -1, i32 0
   %3 = icmp sle <8 x i32> %1, %2
; AVX-NEXT:    retq
   %1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0
   %2 = insertelement <16 x i16> <i16 -1, i16 -2, i16 -3, i16 -4, i16 -5, i16 -6, i16 -7, i16 0, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, i16 -1, i32 0
   %3 = icmp sle <16 x i16> %1, %2
   %4 = select <16 x i1> %3, <16 x i16> %1, <16 x i16> %2
   ret <16 x i16> %4
 }
 
 define <16 x i8> @min_le_v16i8c() {
-; SSE2-LABEL: min_le_v16i8c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [249,250,251,252,253,254,255,0,1,2,3,4,5,6,7,8]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [255,254,253,252,251,250,249,0,7,6,5,4,3,2,1,0]
-; SSE2-NEXT:    movdqa %xmm1, %xmm3
-; SSE2-NEXT:    pcmpgtb %xmm2, %xmm3
-; SSE2-NEXT:    pcmpeqd %xmm0, %xmm0
-; SSE2-NEXT:    pxor %xmm3, %xmm0
-; SSE2-NEXT:    pandn %xmm1, %xmm3
-; SSE2-NEXT:    pandn %xmm2, %xmm0
-; SSE2-NEXT:    por %xmm3, %xmm0
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: min_le_v16i8c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: min_le_v16i8c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
-; SSE42-NEXT:    retq
+; SSE-LABEL: min_le_v16i8c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: min_le_v16i8c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
 ; AVX-NEXT:    retq
   %1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0
   %2 = insertelement <16 x i8> <i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, i8 -1, i32 0
   %3 = icmp sle <16 x i8> %1, %2
   %4 = select <16 x i1> %3, <16 x i8> %1, <16 x i8> %2
   ret <16 x i8> %4
 }

llvm/trunk/test/CodeGen/X86/vec_minmax_uint.ll

; AVX512-NEXT:    retq
   ret <32 x i8> %2
 }
 
 ;
 ; Constant Folding
 ;
 
 define <2 x i64> @max_gt_v2i64c() {
-; SSE2-LABEL: max_gt_v2i64c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [18446744073709551609,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551615,1]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
-; SSE2-NEXT:    movdqa %xmm0, %xmm3
-; SSE2-NEXT:    pxor %xmm2, %xmm3
-; SSE2-NEXT:    pxor %xmm1, %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm4
-; SSE2-NEXT:    pcmpgtd %xmm3, %xmm4
-; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
-; SSE2-NEXT:    pcmpeqd %xmm3, %xmm0
-; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
-; SSE2-NEXT:    pand %xmm5, %xmm3
-; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3]
-; SSE2-NEXT:    por %xmm3, %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm3
-; SSE2-NEXT:    pandn %xmm2, %xmm3
-; SSE2-NEXT:    pand %xmm1, %xmm0
-; SSE2-NEXT:    por %xmm3, %xmm0
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: max_gt_v2i64c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551609,7]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
-; SSE41-NEXT:    movdqa %xmm0, %xmm3
-; SSE41-NEXT:    pxor %xmm1, %xmm3
-; SSE41-NEXT:    pxor %xmm2, %xmm0
-; SSE41-NEXT:    movdqa %xmm0, %xmm4
-; SSE41-NEXT:    pcmpgtd %xmm3, %xmm4
-; SSE41-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
-; SSE41-NEXT:    pcmpeqd %xmm3, %xmm0
-; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
-; SSE41-NEXT:    pand %xmm5, %xmm3
-; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3]
-; SSE41-NEXT:    por %xmm3, %xmm0
-; SSE41-NEXT:    blendvpd %xmm2, %xmm1
-; SSE41-NEXT:    movapd %xmm1, %xmm0
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: max_gt_v2i64c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movapd {{.*#+}} xmm1 = [18446744073709551615,1]
-; SSE42-NEXT:    movdqa {{.*#+}} xmm0 = [9223372036854775801,9223372036854775815]
-; SSE42-NEXT:    pcmpgtq {{.*}}(%rip), %xmm0
-; SSE42-NEXT:    blendvpd {{.*}}(%rip), %xmm1
-; SSE42-NEXT:    movapd %xmm1, %xmm0
-; SSE42-NEXT:    retq
+; SSE-LABEL: max_gt_v2i64c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [18446744073709551615,7]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: max_gt_v2i64c:
 ; AVX:       # BB#0:
-; AVX-NEXT:    vmovapd {{.*#+}} xmm0 = [18446744073709551615,1]
-; AVX-NEXT:    vmovdqa {{.*#+}} xmm1 = [9223372036854775801,9223372036854775815]
-; AVX-NEXT:    vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1
-; AVX-NEXT:    vblendvpd %xmm1, {{.*}}(%rip), %xmm0, %xmm0
+; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [18446744073709551615,7]
 ; AVX-NEXT:    retq
   %1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0
   %2 = insertelement <2 x i64> <i64 -1, i64 1>, i64 -1, i32 0
   %3 = icmp ugt <2 x i64> %1, %2
   %4 = select <2 x i1> %3, <2 x i64> %1, <2 x i64> %2
   ret <2 x i64> %4
 }
 
 define <4 x i64> @max_gt_v4i64c() {
-; SSE2-LABEL: max_gt_v4i64c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [18446744073709551609,18446744073709551615]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm8 = [1,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm5 = [18446744073709551615,18446744073709551609]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm3 = [7,1]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
-; SSE2-NEXT:    movdqa %xmm0, %xmm1
-; SSE2-NEXT:    pxor %xmm3, %xmm1
-; SSE2-NEXT:    movdqa %xmm0, %xmm6
-; SSE2-NEXT:    pxor %xmm8, %xmm6
-; SSE2-NEXT:    movdqa %xmm6, %xmm7
-; SSE2-NEXT:    pcmpgtd %xmm1, %xmm7
-; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm7[0,0,2,2]
-; SSE2-NEXT:    pcmpeqd %xmm1, %xmm6
-; SSE2-NEXT:    pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
-; SSE2-NEXT:    pand %xmm2, %xmm6
-; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm7[1,1,3,3]
-; SSE2-NEXT:    por %xmm6, %xmm1
-; SSE2-NEXT:    movdqa %xmm0, %xmm2
-; SSE2-NEXT:    pxor %xmm5, %xmm2
-; SSE2-NEXT:    pxor %xmm4, %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm6
-; SSE2-NEXT:    pcmpgtd %xmm2, %xmm6
-; SSE2-NEXT:    pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
-; SSE2-NEXT:    pcmpeqd %xmm2, %xmm0
-; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
-; SSE2-NEXT:    pand %xmm7, %xmm2
-; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3]
-; SSE2-NEXT:    por %xmm2, %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm2
-; SSE2-NEXT:    pandn %xmm5, %xmm2
-; SSE2-NEXT:    pand %xmm4, %xmm0
-; SSE2-NEXT:    por %xmm2, %xmm0
-; SSE2-NEXT:    movdqa %xmm1, %xmm2
-; SSE2-NEXT:    pandn %xmm3, %xmm2
-; SSE2-NEXT:    pand %xmm8, %xmm1
-; SSE2-NEXT:    por %xmm2, %xmm1
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: max_gt_v4i64c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movdqa {{.*#+}} xmm5 = [18446744073709551609,18446744073709551615]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm8 = [1,7]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm1 = [7,1]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
-; SSE41-NEXT:    movdqa %xmm0, %xmm3
-; SSE41-NEXT:    pxor %xmm1, %xmm3
-; SSE41-NEXT:    movdqa %xmm0, %xmm6
-; SSE41-NEXT:    pxor %xmm8, %xmm6
-; SSE41-NEXT:    movdqa %xmm6, %xmm7
-; SSE41-NEXT:    pcmpgtd %xmm3, %xmm7
-; SSE41-NEXT:    pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2]
-; SSE41-NEXT:    pcmpeqd %xmm3, %xmm6
-; SSE41-NEXT:    pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
-; SSE41-NEXT:    pand %xmm4, %xmm6
-; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3]
-; SSE41-NEXT:    por %xmm6, %xmm3
-; SSE41-NEXT:    movdqa %xmm0, %xmm4
-; SSE41-NEXT:    pxor %xmm2, %xmm4
-; SSE41-NEXT:    pxor %xmm5, %xmm0
-; SSE41-NEXT:    movdqa %xmm0, %xmm6
-; SSE41-NEXT:    pcmpgtd %xmm4, %xmm6
-; SSE41-NEXT:    pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
-; SSE41-NEXT:    pcmpeqd %xmm4, %xmm0
-; SSE41-NEXT:    pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3]
-; SSE41-NEXT:    pand %xmm7, %xmm4
-; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3]
-; SSE41-NEXT:    por %xmm4, %xmm0
-; SSE41-NEXT:    blendvpd %xmm5, %xmm2
-; SSE41-NEXT:    movdqa %xmm3, %xmm0
-; SSE41-NEXT:    blendvpd %xmm8, %xmm1
-; SSE41-NEXT:    movapd %xmm2, %xmm0
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: max_gt_v4i64c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movapd {{.*#+}} xmm1 = [7,1]
-; SSE42-NEXT:    movapd {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
-; SSE42-NEXT:    movdqa {{.*#+}} xmm3 = [9223372036854775809,9223372036854775815]
-; SSE42-NEXT:    pcmpgtq {{.*}}(%rip), %xmm3
-; SSE42-NEXT:    movdqa {{.*#+}} xmm0 = [9223372036854775801,9223372036854775807]
-; SSE42-NEXT:    pcmpgtq {{.*}}(%rip), %xmm0
-; SSE42-NEXT:    blendvpd {{.*}}(%rip), %xmm2
-; SSE42-NEXT:    movdqa %xmm3, %xmm0
-; SSE42-NEXT:    blendvpd {{.*}}(%rip), %xmm1
-; SSE42-NEXT:    movapd %xmm2, %xmm0
-; SSE42-NEXT:    retq
-;
-; AVX1-LABEL: max_gt_v4i64c:
-; AVX1:       # BB#0:
-; AVX1-NEXT:    vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
-; AVX1-NEXT:    vmovdqa {{.*#+}} xmm1 = [9223372036854775801,9223372036854775807]
-; AVX1-NEXT:    vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1
-; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [9223372036854775809,9223372036854775815]
-; AVX1-NEXT:    vpcmpgtq {{.*}}(%rip), %xmm2, %xmm2
-; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm1, %ymm1
-; AVX1-NEXT:    vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
-; AVX1-NEXT:    retq
-;
-; AVX2-LABEL: max_gt_v4i64c:
-; AVX2:       # BB#0:
-; AVX2-NEXT:    vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
-; AVX2-NEXT:    vmovdqa {{.*#+}} ymm1 = [9223372036854775801,9223372036854775807,9223372036854775809,9223372036854775815]
-; AVX2-NEXT:    vpcmpgtq {{.*}}(%rip), %ymm1, %ymm1
-; AVX2-NEXT:    vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
-; AVX2-NEXT:    retq
+; SSE-LABEL: max_gt_v4i64c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm1 = [7,7]
+; SSE-NEXT:    pcmpeqd %xmm0, %xmm0
+; SSE-NEXT:    retq
 ;
-; AVX512-LABEL: max_gt_v4i64c:
-; AVX512:       # BB#0:
-; AVX512-NEXT:    vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
-; AVX512-NEXT:    vmovdqa {{.*#+}} ymm1 = [9223372036854775801,9223372036854775807,9223372036854775809,9223372036854775815]
-; AVX512-NEXT:    vpcmpgtq {{.*}}(%rip), %ymm1, %ymm1
-; AVX512-NEXT:    vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
-; AVX512-NEXT:    retq
+; AVX-LABEL: max_gt_v4i64c:
+; AVX:       # BB#0:
+; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [18446744073709551615,18446744073709551615,7,7]
+; AVX-NEXT:    retq
   %1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0
   %2 = insertelement <4 x i64> <i64 -1, i64 -7, i64 7, i64 1>, i64 -1, i32 0
   %3 = icmp ugt <4 x i64> %1, %2
   %4 = select <4 x i1> %3, <4 x i64> %1, <4 x i64> %2
   ret <4 x i64> %4
 }
 
 define <4 x i32> @max_gt_v4i32c() {
-; SSE2-LABEL: max_gt_v4i32c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [2147483641,2147483647,2147483649,2147483655]
-; SSE2-NEXT:    pcmpgtd {{.*}}(%rip), %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm1
-; SSE2-NEXT:    pandn {{.*}}(%rip), %xmm1
-; SSE2-NEXT:    pand {{.*}}(%rip), %xmm0
-; SSE2-NEXT:    por %xmm1, %xmm0
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: max_gt_v4i32c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: max_gt_v4i32c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
-; SSE42-NEXT:    retq
+; SSE-LABEL: max_gt_v4i32c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: max_gt_v4i32c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
 ; AVX-NEXT:    retq
   %1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0
   %2 = insertelement <4 x i32> <i32 -1, i32 -7, i32 7, i32 1>, i32 -1, i32 0
   %3 = icmp ugt <4 x i32> %1, %2
   %4 = select <4 x i1> %3, <4 x i32> %1, <4 x i32> %2
   ret <4 x i32> %4
 }
 
 define <8 x i32> @max_gt_v8i32c() {
-; SSE2-LABEL: max_gt_v8i32c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [2147483649,2147483651,2147483653,2147483655]
-; SSE2-NEXT:    pcmpgtd {{.*}}(%rip), %xmm1
-; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [2147483641,2147483643,2147483645,2147483647]
-; SSE2-NEXT:    pcmpgtd {{.*}}(%rip), %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm2
-; SSE2-NEXT:    pandn {{.*}}(%rip), %xmm2
-; SSE2-NEXT:    pand {{.*}}(%rip), %xmm0
-; SSE2-NEXT:    por %xmm2, %xmm0
-; SSE2-NEXT:    movdqa %xmm1, %xmm2
-; SSE2-NEXT:    pandn {{.*}}(%rip), %xmm2
-; SSE2-NEXT:    pand {{.*}}(%rip), %xmm1
-; SSE2-NEXT:    por %xmm2, %xmm1
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: max_gt_v8i32c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
-; SSE41-NEXT:    movaps {{.*#+}} xmm1 = [7,5,5,7]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: max_gt_v8i32c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
-; SSE42-NEXT:    movaps {{.*#+}} xmm1 = [7,5,5,7]
-; SSE42-NEXT:    retq
+; SSE-LABEL: max_gt_v8i32c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
+; SSE-NEXT:    movaps {{.*#+}} xmm1 = [7,5,5,7]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: max_gt_v8i32c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [4294967295,4294967293,4294967293,4294967295,7,5,5,7]
 ; AVX-NEXT:    retq
   %1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0
   %2 = insertelement <8 x i32> <i32 -1, i32 -3, i32 -5, i32 -7, i32 7, i32 5, i32 3, i32 1>, i32 -1, i32 0
   %3 = icmp ugt <8 x i32> %1, %2
   %4 = select <8 x i1> %3, <8 x i32> %1, <8 x i32> %2
   ret <8 x i32> %4
 }
 
 define <8 x i16> @max_gt_v8i16c() {
-; SSE2-LABEL: max_gt_v8i16c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [32761,32763,32765,32767,32769,32771,32773,32775]
-; SSE2-NEXT:    pcmpgtw {{.*}}(%rip), %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm1
-; SSE2-NEXT:    pandn {{.*}}(%rip), %xmm1
-; SSE2-NEXT:    pand {{.*}}(%rip), %xmm0
-; SSE2-NEXT:    por %xmm1, %xmm0
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: max_gt_v8i16c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: max_gt_v8i16c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7]
-; SSE42-NEXT:    retq
+; SSE-LABEL: max_gt_v8i16c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: max_gt_v8i16c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7]
 ; AVX-NEXT:    retq
   %1 = insertelement <8 x i16> <i16 -7, i16 -5, i16 -3, i16 -1, i16 1, i16 3, i16 5, i16 7>, i16 -7, i32 0
   %2 = insertelement <8 x i16> <i16 -1, i16 -3, i16 -5, i16 -7, i16 7, i16 5, i16 3, i16 1>, i16 -1, i32 0
   %3 = icmp ugt <8 x i16> %1, %2
   %4 = select <8 x i1> %3, <8 x i16> %1, <8 x i16> %2
   ret <8 x i16> %4
 }
 
 define <16 x i16> @max_gt_v16i16c() {
-; SSE2-LABEL: max_gt_v16i16c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [32769,32770,32771,32772,32773,32774,32775,32776]
-; SSE2-NEXT:    pcmpgtw {{.*}}(%rip), %xmm1
-; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [32761,32762,32763,32764,32765,32766,32767,32768]
-; SSE2-NEXT:    pcmpgtw {{.*}}(%rip), %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm2
-; SSE2-NEXT:    pandn {{.*}}(%rip), %xmm2
-; SSE2-NEXT:    pand {{.*}}(%rip), %xmm0
-; SSE2-NEXT:    por %xmm2, %xmm0
-; SSE2-NEXT:    movdqa %xmm1, %xmm2
-; SSE2-NEXT:    pandn {{.*}}(%rip), %xmm2
-; SSE2-NEXT:    pand {{.*}}(%rip), %xmm1
-; SSE2-NEXT:    por %xmm2, %xmm1
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: max_gt_v16i16c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0]
-; SSE41-NEXT:    movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: max_gt_v16i16c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0]
-; SSE42-NEXT:    movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8]
-; SSE42-NEXT:    retq
+; SSE-LABEL: max_gt_v16i16c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0]
+; SSE-NEXT:    movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: max_gt_v16i16c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [65535,65534,65533,65532,65533,65534,65535,0,7,6,5,4,5,6,7,8]
 ; AVX-NEXT:    retq
   %1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0
   %2 = insertelement <16 x i16> <i16 -1, i16 -2, i16 -3, i16 -4, i16 -5, i16 -6, i16 -7, i16 0, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, i16 -1, i32 0
   %3 = icmp ugt <16 x i16> %1, %2
; AVX-NEXT:    retq
   %1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0
   %2 = insertelement <16 x i8> <i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, i8 -1, i32 0
   %3 = icmp ugt <16 x i8> %1, %2
   %4 = select <16 x i1> %3, <16 x i8> %1, <16 x i8> %2
   ret <16 x i8> %4
 }
 
 define <2 x i64> @max_ge_v2i64c() {
-; SSE2-LABEL: max_ge_v2i64c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [18446744073709551609,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551615,1]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
-; SSE2-NEXT:    movdqa %xmm0, %xmm3
-; SSE2-NEXT:    pxor %xmm1, %xmm3
-; SSE2-NEXT:    pxor %xmm2, %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm4
-; SSE2-NEXT:    pcmpgtd %xmm3, %xmm4
-; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
-; SSE2-NEXT:    pcmpeqd %xmm3, %xmm0
-; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; SSE2-NEXT:    pand %xmm5, %xmm0
-; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
-; SSE2-NEXT:    por %xmm0, %xmm3
-; SSE2-NEXT:    pcmpeqd %xmm0, %xmm0
-; SSE2-NEXT:    pxor %xmm3, %xmm0
-; SSE2-NEXT:    pandn %xmm1, %xmm3
-; SSE2-NEXT:    pandn %xmm2, %xmm0
-; SSE2-NEXT:    por %xmm3, %xmm0
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: max_ge_v2i64c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551609,7]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
-; SSE41-NEXT:    movdqa %xmm0, %xmm3
-; SSE41-NEXT:    pxor %xmm2, %xmm3
-; SSE41-NEXT:    pxor %xmm1, %xmm0
-; SSE41-NEXT:    movdqa %xmm0, %xmm4
-; SSE41-NEXT:    pcmpgtd %xmm3, %xmm4
-; SSE41-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
-; SSE41-NEXT:    pcmpeqd %xmm3, %xmm0
-; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; SSE41-NEXT:    pand %xmm5, %xmm0
-; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
-; SSE41-NEXT:    por %xmm0, %xmm3
-; SSE41-NEXT:    pcmpeqd %xmm0, %xmm0
-; SSE41-NEXT:    pxor %xmm3, %xmm0
-; SSE41-NEXT:    blendvpd %xmm2, %xmm1
-; SSE41-NEXT:    movapd %xmm1, %xmm0
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: max_ge_v2i64c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movapd {{.*#+}} xmm1 = [18446744073709551615,1]
-; SSE42-NEXT:    movdqa {{.*#+}} xmm2 = [9223372036854775807,9223372036854775809]
-; SSE42-NEXT:    pcmpgtq {{.*}}(%rip), %xmm2
-; SSE42-NEXT:    pcmpeqd %xmm0, %xmm0
-; SSE42-NEXT:    pxor %xmm2, %xmm0
-; SSE42-NEXT:    blendvpd {{.*}}(%rip), %xmm1
-; SSE42-NEXT:    movapd %xmm1, %xmm0
-; SSE42-NEXT:    retq
+; SSE-LABEL: max_ge_v2i64c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [18446744073709551615,7]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: max_ge_v2i64c:
 ; AVX:       # BB#0:
-; AVX-NEXT:    vmovapd {{.*#+}} xmm0 = [18446744073709551615,1]
-; AVX-NEXT:    vmovdqa {{.*#+}} xmm1 = [9223372036854775807,9223372036854775809]
-; AVX-NEXT:    vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1
-; AVX-NEXT:    vpcmpeqd %xmm2, %xmm2, %xmm2
-; AVX-NEXT:    vpxor %xmm2, %xmm1, %xmm1
-; AVX-NEXT:    vblendvpd %xmm1, {{.*}}(%rip), %xmm0, %xmm0
+; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [18446744073709551615,7]
 ; AVX-NEXT:    retq
   %1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0
   %2 = insertelement <2 x i64> <i64 -1, i64 1>, i64 -1, i32 0
   %3 = icmp uge <2 x i64> %1, %2
   %4 = select <2 x i1> %3, <2 x i64> %1, <2 x i64> %2
   ret <2 x i64> %4
 }
 
 define <4 x i64> @max_ge_v4i64c() {
-; SSE2-LABEL: max_ge_v4i64c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm10 = [18446744073709551609,18446744073709551615]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm8 = [1,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm5 = [18446744073709551615,18446744073709551609]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm9 = [7,1]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm7 = [2147483648,2147483648,2147483648,2147483648]
-; SSE2-NEXT:    movdqa %xmm7, %xmm0
-; SSE2-NEXT:    pxor %xmm8, %xmm0
-; SSE2-NEXT:    movdqa %xmm7, %xmm1
-; SSE2-NEXT:    pxor %xmm9, %xmm1
-; SSE2-NEXT:    movdqa %xmm1, %xmm6
-; SSE2-NEXT:    pcmpgtd %xmm0, %xmm6
-; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm6[0,0,2,2]
-; SSE2-NEXT:    pcmpeqd %xmm0, %xmm1
-; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[1,1,3,3]
-; SSE2-NEXT:    pand %xmm2, %xmm0
-; SSE2-NEXT:    pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
-; SSE2-NEXT:    por %xmm0, %xmm6
-; SSE2-NEXT:    pcmpeqd %xmm0, %xmm0
-; SSE2-NEXT:    movdqa %xmm6, %xmm1
-; SSE2-NEXT:    pxor %xmm0, %xmm1
-; SSE2-NEXT:    movdqa %xmm7, %xmm2
-; SSE2-NEXT:    pxor %xmm10, %xmm2
-; SSE2-NEXT:    pxor %xmm5, %xmm7
-; SSE2-NEXT:    movdqa %xmm7, %xmm3
-; SSE2-NEXT:    pcmpgtd %xmm2, %xmm3
-; SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
-; SSE2-NEXT:    pcmpeqd %xmm2, %xmm7
-; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm7[1,1,3,3]
-; SSE2-NEXT:    pand %xmm4, %xmm2
-; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
-; SSE2-NEXT:    por %xmm2, %xmm3
-; SSE2-NEXT:    pxor %xmm3, %xmm0
-; SSE2-NEXT:    pandn %xmm10, %xmm3
-; SSE2-NEXT:    pandn %xmm5, %xmm0
-; SSE2-NEXT:    por %xmm3, %xmm0
-; SSE2-NEXT:    pandn %xmm8, %xmm6
-; SSE2-NEXT:    pandn %xmm9, %xmm1
-; SSE2-NEXT:    por %xmm6, %xmm1
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: max_ge_v4i64c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movdqa {{.*#+}} xmm9 = [18446744073709551609,18446744073709551615]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm8 = [1,7]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm1 = [7,1]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
-; SSE41-NEXT:    movdqa %xmm0, %xmm3
-; SSE41-NEXT:    pxor %xmm8, %xmm3
-; SSE41-NEXT:    movdqa %xmm0, %xmm6
-; SSE41-NEXT:    pxor %xmm1, %xmm6
-; SSE41-NEXT:    movdqa %xmm6, %xmm7
-; SSE41-NEXT:    pcmpgtd %xmm3, %xmm7
-; SSE41-NEXT:    pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2]
-; SSE41-NEXT:    pcmpeqd %xmm3, %xmm6
-; SSE41-NEXT:    pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
-; SSE41-NEXT:    pand %xmm4, %xmm6
-; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3]
-; SSE41-NEXT:    por %xmm6, %xmm3
-; SSE41-NEXT:    pcmpeqd %xmm4, %xmm4
-; SSE41-NEXT:    pxor %xmm4, %xmm3
-; SSE41-NEXT:    movdqa %xmm0, %xmm6
-; SSE41-NEXT:    pxor %xmm9, %xmm6
-; SSE41-NEXT:    pxor %xmm2, %xmm0
-; SSE41-NEXT:    movdqa %xmm0, %xmm7
-; SSE41-NEXT:    pcmpgtd %xmm6, %xmm7
-; SSE41-NEXT:    pshufd {{.*#+}} xmm5 = xmm7[0,0,2,2]
-; SSE41-NEXT:    pcmpeqd %xmm6, %xmm0
-; SSE41-NEXT:    pshufd {{.*#+}} xmm6 = xmm0[1,1,3,3]
-; SSE41-NEXT:    pand %xmm5, %xmm6
-; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm7[1,1,3,3]
-; SSE41-NEXT:    por %xmm6, %xmm0
-; SSE41-NEXT:    pxor %xmm4, %xmm0
-; SSE41-NEXT:    blendvpd %xmm9, %xmm2
-; SSE41-NEXT:    movdqa %xmm3, %xmm0
-; SSE41-NEXT:    blendvpd %xmm8, %xmm1
-; SSE41-NEXT:    movapd %xmm2, %xmm0
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: max_ge_v4i64c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movapd {{.*#+}} xmm1 = [7,1]
-; SSE42-NEXT:    movapd {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
-; SSE42-NEXT:    movdqa {{.*#+}} xmm3 = [9223372036854775815,9223372036854775809]
-; SSE42-NEXT:    pcmpgtq {{.*}}(%rip), %xmm3
-; SSE42-NEXT:    pcmpeqd %xmm4, %xmm4
-; SSE42-NEXT:    pxor %xmm4, %xmm3
-; SSE42-NEXT:    movdqa {{.*#+}} xmm0 = [9223372036854775807,9223372036854775801]
-; SSE42-NEXT:    pcmpgtq {{.*}}(%rip), %xmm0
-; SSE42-NEXT:    pxor %xmm4, %xmm0
-; SSE42-NEXT:    blendvpd {{.*}}(%rip), %xmm2
-; SSE42-NEXT:    movdqa %xmm3, %xmm0
-; SSE42-NEXT:    blendvpd {{.*}}(%rip), %xmm1
-; SSE42-NEXT:    movapd %xmm2, %xmm0
-; SSE42-NEXT:    retq
-;
-; AVX1-LABEL: max_ge_v4i64c:
-; AVX1:       # BB#0:
-; AVX1-NEXT:    vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
-; AVX1-NEXT:    vmovdqa {{.*#+}} xmm1 = [9223372036854775815,9223372036854775809]
-; AVX1-NEXT:    vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1
-; AVX1-NEXT:    vpcmpeqd %xmm2, %xmm2, %xmm2
-; AVX1-NEXT:    vpxor %xmm2, %xmm1, %xmm1
-; AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 = [9223372036854775807,9223372036854775801]
-; AVX1-NEXT:    vpcmpgtq {{.*}}(%rip), %xmm3, %xmm3
-; AVX1-NEXT:    vpxor %xmm2, %xmm3, %xmm2
-; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm2, %ymm1
-; AVX1-NEXT:    vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
-; AVX1-NEXT:    retq
-;
-; AVX2-LABEL: max_ge_v4i64c:
-; AVX2:       # BB#0:
-; AVX2-NEXT:    vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
-; AVX2-NEXT:    vmovdqa {{.*#+}} ymm1 = [9223372036854775807,9223372036854775801,9223372036854775815,9223372036854775809]
-; AVX2-NEXT:    vpcmpgtq {{.*}}(%rip), %ymm1, %ymm1
-; AVX2-NEXT:    vpcmpeqd %ymm2, %ymm2, %ymm2
-; AVX2-NEXT:    vpxor %ymm2, %ymm1, %ymm1
-; AVX2-NEXT:    vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
-; AVX2-NEXT:    retq
+; SSE-LABEL: max_ge_v4i64c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm1 = [7,7]
+; SSE-NEXT:    pcmpeqd %xmm0, %xmm0
+; SSE-NEXT:    retq
 ;
-; AVX512-LABEL: max_ge_v4i64c:
-; AVX512:       # BB#0:
-; AVX512-NEXT:    vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
-; AVX512-NEXT:    vmovdqa {{.*#+}} ymm1 = [9223372036854775807,9223372036854775801,9223372036854775815,9223372036854775809]
-; AVX512-NEXT:    vpcmpgtq {{.*}}(%rip), %ymm1, %ymm1
-; AVX512-NEXT:    vpcmpeqd %ymm2, %ymm2, %ymm2
-; AVX512-NEXT:    vpxor %ymm2, %ymm1, %ymm1
-; AVX512-NEXT:    vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
-; AVX512-NEXT:    retq
+; AVX-LABEL: max_ge_v4i64c:
+; AVX:       # BB#0:
+; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [18446744073709551615,18446744073709551615,7,7]
+; AVX-NEXT:    retq
   %1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0
   %2 = insertelement <4 x i64> <i64 -1, i64 -7, i64 7, i64 1>, i64 -1, i32 0
   %3 = icmp uge <4 x i64> %1, %2
   %4 = select <4 x i1> %3, <4 x i64> %1, <4 x i64> %2
   ret <4 x i64> %4
 }
 
 define <4 x i32> @max_ge_v4i32c() {
-; SSE2-LABEL: max_ge_v4i32c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [2147483647,2147483641,2147483655,2147483649]
-; SSE2-NEXT:    pcmpgtd {{.*}}(%rip), %xmm0
-; SSE2-NEXT:    pcmpeqd %xmm1, %xmm1
-; SSE2-NEXT:    pxor %xmm0, %xmm1
-; SSE2-NEXT:    pandn {{.*}}(%rip), %xmm1
-; SSE2-NEXT:    pandn {{.*}}(%rip), %xmm0
-; SSE2-NEXT:    por %xmm1, %xmm0
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: max_ge_v4i32c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: max_ge_v4i32c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
-; SSE42-NEXT:    retq
+; SSE-LABEL: max_ge_v4i32c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: max_ge_v4i32c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
 ; AVX-NEXT:    retq
   %1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0
   %2 = insertelement <4 x i32> <i32 -1, i32 -7, i32 7, i32 1>, i32 -1, i32 0
   %3 = icmp uge <4 x i32> %1, %2
   %4 = select <4 x i1> %3, <4 x i32> %1, <4 x i32> %2
   ret <4 x i32> %4
 }
 
 define <8 x i32> @max_ge_v8i32c() {
-; SSE2-LABEL: max_ge_v8i32c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [2147483655,2147483653,2147483651,2147483649]
-; SSE2-NEXT:    pcmpgtd {{.*}}(%rip), %xmm1
-; SSE2-NEXT:    pcmpeqd %xmm2, %xmm2
-; SSE2-NEXT:    movdqa %xmm1, %xmm3
-; SSE2-NEXT:    pxor %xmm2, %xmm3
-; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [2147483647,2147483645,2147483643,2147483641]
-; SSE2-NEXT:    pcmpgtd {{.*}}(%rip), %xmm0
-; SSE2-NEXT:    pxor %xmm0, %xmm2
-; SSE2-NEXT:    pandn {{.*}}(%rip), %xmm2
-; SSE2-NEXT:    pandn {{.*}}(%rip), %xmm0
-; SSE2-NEXT:    por %xmm2, %xmm0
-; SSE2-NEXT:    pandn {{.*}}(%rip), %xmm3
-; SSE2-NEXT:    pandn {{.*}}(%rip), %xmm1
-; SSE2-NEXT:    por %xmm3, %xmm1
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: max_ge_v8i32c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
-; SSE41-NEXT:    movaps {{.*#+}} xmm1 = [7,5,5,7]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: max_ge_v8i32c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
-; SSE42-NEXT:    movaps {{.*#+}} xmm1 = [7,5,5,7]
-; SSE42-NEXT:    retq
+; SSE-LABEL: max_ge_v8i32c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
+; SSE-NEXT:    movaps {{.*#+}} xmm1 = [7,5,5,7]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: max_ge_v8i32c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [4294967295,4294967293,4294967293,4294967295,7,5,5,7]
 ; AVX-NEXT:    retq
   %1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0
   %2 = insertelement <8 x i32> <i32 -1, i32 -3, i32 -5, i32 -7, i32 7, i32 5, i32 3, i32 1>, i32 -1, i32 0
   %3 = icmp uge <8 x i32> %1, %2
   %4 = select <8 x i1> %3, <8 x i32> %1, <8 x i32> %2
   ret <8 x i32> %4
 }
 
 define <8 x i16> @max_ge_v8i16c() {
-; SSE2-LABEL: max_ge_v8i16c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [65529,65531,65533,65535,1,3,5,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [65535,65533,65531,65529,7,5,3,1]
-; SSE2-NEXT:    movdqa %xmm2, %xmm3
-; SSE2-NEXT:    psubusw %xmm1, %xmm3
-; SSE2-NEXT:    pxor %xmm0, %xmm0
-; SSE2-NEXT:    pcmpeqw %xmm3, %xmm0
-; SSE2-NEXT:    pand %xmm0, %xmm1
-; SSE2-NEXT:    pandn %xmm2, %xmm0
-; SSE2-NEXT:    por %xmm1, %xmm0
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: max_ge_v8i16c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: max_ge_v8i16c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7]
-; SSE42-NEXT:    retq
+; SSE-LABEL: max_ge_v8i16c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: max_ge_v8i16c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7]
 ; AVX-NEXT:    retq
   %1 = insertelement <8 x i16> <i16 -7, i16 -5, i16 -3, i16 -1, i16 1, i16 3, i16 5, i16 7>, i16 -7, i32 0
   %2 = insertelement <8 x i16> <i16 -1, i16 -3, i16 -5, i16 -7, i16 7, i16 5, i16 3, i16 1>, i16 -1, i32 0
   %3 = icmp uge <8 x i16> %1, %2
   %4 = select <8 x i1> %3, <8 x i16> %1, <8 x i16> %2
   ret <8 x i16> %4
 }
 
 define <16 x i16> @max_ge_v16i16c() {
-; SSE2-LABEL: max_ge_v16i16c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [65529,65530,65531,65532,65533,65534,65535,0]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm3 = [1,2,3,4,5,6,7,8]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [65535,65534,65533,65532,65531,65530,65529,0]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm5 = [7,6,5,4,3,2,1,0]
-; SSE2-NEXT:    movdqa %xmm5, %xmm1
-; SSE2-NEXT:    psubusw %xmm3, %xmm1
-; SSE2-NEXT:    pxor %xmm6, %xmm6
-; SSE2-NEXT:    pcmpeqw %xmm6, %xmm1
-; SSE2-NEXT:    movdqa %xmm4, %xmm0
-; SSE2-NEXT:    psubusw %xmm2, %xmm0
-; SSE2-NEXT:    pcmpeqw %xmm6, %xmm0
-; SSE2-NEXT:    pand %xmm0, %xmm2
-; SSE2-NEXT:    pandn %xmm4, %xmm0
-; SSE2-NEXT:    por %xmm2, %xmm0
-; SSE2-NEXT:    pand %xmm1, %xmm3
-; SSE2-NEXT:    pandn %xmm5, %xmm1
-; SSE2-NEXT:    por %xmm3, %xmm1
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: max_ge_v16i16c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0]
-; SSE41-NEXT:    movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: max_ge_v16i16c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0]
-; SSE42-NEXT:    movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8]
-; SSE42-NEXT:    retq
+; SSE-LABEL: max_ge_v16i16c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0]
+; SSE-NEXT:    movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: max_ge_v16i16c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [65535,65534,65533,65532,65533,65534,65535,0,7,6,5,4,5,6,7,8]
 ; AVX-NEXT:    retq
   %1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0
   %2 = insertelement <16 x i16> <i16 -1, i16 -2, i16 -3, i16 -4, i16 -5, i16 -6, i16 -7, i16 0, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, i16 -1, i32 0
   %3 = icmp uge <16 x i16> %1, %2
; AVX-NEXT:    retq
   %1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0
   %2 = insertelement <16 x i8> <i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, i8 -1, i32 0
   %3 = icmp uge <16 x i8> %1, %2
   %4 = select <16 x i1> %3, <16 x i8> %1, <16 x i8> %2
   ret <16 x i8> %4
 }
 
 define <2 x i64> @min_lt_v2i64c() {
-; SSE2-LABEL: min_lt_v2i64c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [18446744073709551609,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551615,1]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
-; SSE2-NEXT:    movdqa %xmm0, %xmm3
-; SSE2-NEXT:    pxor %xmm1, %xmm3
-; SSE2-NEXT:    pxor %xmm2, %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm4
-; SSE2-NEXT:    pcmpgtd %xmm3, %xmm4
-; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
-; SSE2-NEXT:    pcmpeqd %xmm3, %xmm0
-; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
-; SSE2-NEXT:    pand %xmm5, %xmm3
-; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3]
-; SSE2-NEXT:    por %xmm3, %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm3
-; SSE2-NEXT:    pandn %xmm2, %xmm3
-; SSE2-NEXT:    pand %xmm1, %xmm0
-; SSE2-NEXT:    por %xmm3, %xmm0
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: min_lt_v2i64c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551609,7]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
-; SSE41-NEXT:    movdqa %xmm0, %xmm3
-; SSE41-NEXT:    pxor %xmm2, %xmm3
-; SSE41-NEXT:    pxor %xmm1, %xmm0
-; SSE41-NEXT:    movdqa %xmm0, %xmm4
-; SSE41-NEXT:    pcmpgtd %xmm3, %xmm4
-; SSE41-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
-; SSE41-NEXT:    pcmpeqd %xmm3, %xmm0
-; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
-; SSE41-NEXT:    pand %xmm5, %xmm3
-; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3]
-; SSE41-NEXT:    por %xmm3, %xmm0
-; SSE41-NEXT:    blendvpd %xmm2, %xmm1
-; SSE41-NEXT:    movapd %xmm1, %xmm0
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: min_lt_v2i64c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movapd {{.*#+}} xmm1 = [18446744073709551615,1]
-; SSE42-NEXT:    movdqa {{.*#+}} xmm0 = [9223372036854775807,9223372036854775809]
-; SSE42-NEXT:    pcmpgtq {{.*}}(%rip), %xmm0
-; SSE42-NEXT:    blendvpd {{.*}}(%rip), %xmm1
-; SSE42-NEXT:    movapd %xmm1, %xmm0
-; SSE42-NEXT:    retq
+; SSE-LABEL: min_lt_v2i64c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [18446744073709551609,1]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: min_lt_v2i64c:
 ; AVX:       # BB#0:
-; AVX-NEXT:    vmovapd {{.*#+}} xmm0 = [18446744073709551615,1]
-; AVX-NEXT:    vmovdqa {{.*#+}} xmm1 = [9223372036854775807,9223372036854775809]
-; AVX-NEXT:    vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1
-; AVX-NEXT:    vblendvpd %xmm1, {{.*}}(%rip), %xmm0, %xmm0
+; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [18446744073709551609,1]
 ; AVX-NEXT:    retq
   %1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0
   %2 = insertelement <2 x i64> <i64 -1, i64 1>, i64 -1, i32 0
   %3 = icmp ult <2 x i64> %1, %2
   %4 = select <2 x i1> %3, <2 x i64> %1, <2 x i64> %2
   ret <2 x i64> %4
 }
 
 define <4 x i64> @min_lt_v4i64c() {
-; SSE2-LABEL: min_lt_v4i64c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [18446744073709551609,18446744073709551615]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm8 = [1,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm5 = [18446744073709551615,18446744073709551609]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm3 = [7,1]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
-; SSE2-NEXT:    movdqa %xmm0, %xmm1
-; SSE2-NEXT:    pxor %xmm8, %xmm1
-; SSE2-NEXT:    movdqa %xmm0, %xmm6
-; SSE2-NEXT:    pxor %xmm3, %xmm6
-; SSE2-NEXT:    movdqa %xmm6, %xmm7
-; SSE2-NEXT:    pcmpgtd %xmm1, %xmm7
-; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm7[0,0,2,2]
-; SSE2-NEXT:    pcmpeqd %xmm1, %xmm6
-; SSE2-NEXT:    pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
-; SSE2-NEXT:    pand %xmm2, %xmm6
-; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm7[1,1,3,3]
-; SSE2-NEXT:    por %xmm6, %xmm1
-; SSE2-NEXT:    movdqa %xmm0, %xmm2
-; SSE2-NEXT:    pxor %xmm4, %xmm2
-; SSE2-NEXT:    pxor %xmm5, %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm6
-; SSE2-NEXT:    pcmpgtd %xmm2, %xmm6
-; SSE2-NEXT:    pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
-; SSE2-NEXT:    pcmpeqd %xmm2, %xmm0
-; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
-; SSE2-NEXT:    pand %xmm7, %xmm2
-; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3]
-; SSE2-NEXT:    por %xmm2, %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm2
-; SSE2-NEXT:    pandn %xmm5, %xmm2
-; SSE2-NEXT:    pand %xmm4, %xmm0
-; SSE2-NEXT:    por %xmm2, %xmm0
-; SSE2-NEXT:    movdqa %xmm1, %xmm2
-; SSE2-NEXT:    pandn %xmm3, %xmm2
-; SSE2-NEXT:    pand %xmm8, %xmm1
-; SSE2-NEXT:    por %xmm2, %xmm1
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: min_lt_v4i64c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movdqa {{.*#+}} xmm5 = [18446744073709551609,18446744073709551615]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm8 = [1,7]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm1 = [7,1]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
-; SSE41-NEXT:    movdqa %xmm0, %xmm3
-; SSE41-NEXT:    pxor %xmm8, %xmm3
-; SSE41-NEXT:    movdqa %xmm0, %xmm6
-; SSE41-NEXT:    pxor %xmm1, %xmm6
-; SSE41-NEXT:    movdqa %xmm6, %xmm7
-; SSE41-NEXT:    pcmpgtd %xmm3, %xmm7
-; SSE41-NEXT:    pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2]
-; SSE41-NEXT:    pcmpeqd %xmm3, %xmm6
-; SSE41-NEXT:    pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
-; SSE41-NEXT:    pand %xmm4, %xmm6
-; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3]
-; SSE41-NEXT:    por %xmm6, %xmm3
-; SSE41-NEXT:    movdqa %xmm0, %xmm4
-; SSE41-NEXT:    pxor %xmm5, %xmm4
-; SSE41-NEXT:    pxor %xmm2, %xmm0
-; SSE41-NEXT:    movdqa %xmm0, %xmm6
-; SSE41-NEXT:    pcmpgtd %xmm4, %xmm6
-; SSE41-NEXT:    pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
-; SSE41-NEXT:    pcmpeqd %xmm4, %xmm0
-; SSE41-NEXT:    pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3]
-; SSE41-NEXT:    pand %xmm7, %xmm4
-; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3]
-; SSE41-NEXT:    por %xmm4, %xmm0
-; SSE41-NEXT:    blendvpd %xmm5, %xmm2
-; SSE41-NEXT:    movdqa %xmm3, %xmm0
-; SSE41-NEXT:    blendvpd %xmm8, %xmm1
-; SSE41-NEXT:    movapd %xmm2, %xmm0
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: min_lt_v4i64c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movapd {{.*#+}} xmm1 = [7,1]
-; SSE42-NEXT:    movapd {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
-; SSE42-NEXT:    movdqa {{.*#+}} xmm3 = [9223372036854775815,9223372036854775809]
-; SSE42-NEXT:    pcmpgtq {{.*}}(%rip), %xmm3
-; SSE42-NEXT:    movdqa {{.*#+}} xmm0 = [9223372036854775807,9223372036854775801]
-; SSE42-NEXT:    pcmpgtq {{.*}}(%rip), %xmm0
-; SSE42-NEXT:    blendvpd {{.*}}(%rip), %xmm2
-; SSE42-NEXT:    movdqa %xmm3, %xmm0
-; SSE42-NEXT:    blendvpd {{.*}}(%rip), %xmm1
-; SSE42-NEXT:    movapd %xmm2, %xmm0
-; SSE42-NEXT:    retq
-;
-; AVX1-LABEL: min_lt_v4i64c:
-; AVX1:       # BB#0:
-; AVX1-NEXT:    vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
-; AVX1-NEXT:    vmovdqa {{.*#+}} xmm1 = [9223372036854775807,9223372036854775801]
-; AVX1-NEXT:    vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1
-; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [9223372036854775815,9223372036854775809]
-; AVX1-NEXT:    vpcmpgtq {{.*}}(%rip), %xmm2, %xmm2
-; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm1, %ymm1
-; AVX1-NEXT:    vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
-; AVX1-NEXT:    retq
-;
-; AVX2-LABEL: min_lt_v4i64c:
-; AVX2:       # BB#0:
-; AVX2-NEXT:    vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
-; AVX2-NEXT:    vmovdqa {{.*#+}} ymm1 = [9223372036854775807,9223372036854775801,9223372036854775815,9223372036854775809]
-; AVX2-NEXT:    vpcmpgtq {{.*}}(%rip), %ymm1, %ymm1
-; AVX2-NEXT:    vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
-; AVX2-NEXT:    retq
+; SSE-LABEL: min_lt_v4i64c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [18446744073709551609,18446744073709551609]
+; SSE-NEXT:    movaps {{.*#+}} xmm1 = [1,1]
+; SSE-NEXT:    retq
 ;
-; AVX512-LABEL: min_lt_v4i64c:
-; AVX512:       # BB#0:
-; AVX512-NEXT:    vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
-; AVX512-NEXT:    vmovdqa {{.*#+}} ymm1 = [9223372036854775807,9223372036854775801,9223372036854775815,9223372036854775809]
-; AVX512-NEXT:    vpcmpgtq {{.*}}(%rip), %ymm1, %ymm1
-; AVX512-NEXT:    vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
-; AVX512-NEXT:    retq
+; AVX-LABEL: min_lt_v4i64c:
+; AVX:       # BB#0:
+; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [18446744073709551609,18446744073709551609,1,1]
+; AVX-NEXT:    retq
   %1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0
   %2 = insertelement <4 x i64> <i64 -1, i64 -7, i64 7, i64 1>, i64 -1, i32 0
   %3 = icmp ult <4 x i64> %1, %2
   %4 = select <4 x i1> %3, <4 x i64> %1, <4 x i64> %2
   ret <4 x i64> %4
 }
 
 define <4 x i32> @min_lt_v4i32c() {
-; SSE2-LABEL: min_lt_v4i32c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [2147483647,2147483641,2147483655,2147483649]
-; SSE2-NEXT:    pcmpgtd {{.*}}(%rip), %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm1
-; SSE2-NEXT:    pandn {{.*}}(%rip), %xmm1
-; SSE2-NEXT:    pand {{.*}}(%rip), %xmm0
-; SSE2-NEXT:    por %xmm1, %xmm0
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: min_lt_v4i32c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: min_lt_v4i32c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
-; SSE42-NEXT:    retq
+; SSE-LABEL: min_lt_v4i32c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: min_lt_v4i32c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
 ; AVX-NEXT:    retq
   %1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0
   %2 = insertelement <4 x i32> <i32 -1, i32 -7, i32 7, i32 1>, i32 -1, i32 0
   %3 = icmp ult <4 x i32> %1, %2
   %4 = select <4 x i1> %3, <4 x i32> %1, <4 x i32> %2
   ret <4 x i32> %4
 }
 
 define <8 x i32> @min_lt_v8i32c() {
-; SSE2-LABEL: min_lt_v8i32c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [2147483655,2147483653,2147483651,2147483649]
-; SSE2-NEXT:    pcmpgtd {{.*}}(%rip), %xmm1
-; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [2147483647,2147483645,2147483643,2147483641]
-; SSE2-NEXT:    pcmpgtd {{.*}}(%rip), %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm2
-; SSE2-NEXT:    pandn {{.*}}(%rip), %xmm2
-; SSE2-NEXT:    pand {{.*}}(%rip), %xmm0
-; SSE2-NEXT:    por %xmm2, %xmm0
-; SSE2-NEXT:    movdqa %xmm1, %xmm2
-; SSE2-NEXT:    pandn {{.*}}(%rip), %xmm2
-; SSE2-NEXT:    pand {{.*}}(%rip), %xmm1
-; SSE2-NEXT:    por %xmm2, %xmm1
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: min_lt_v8i32c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
-; SSE41-NEXT:    movaps {{.*#+}} xmm1 = [1,3,3,1]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: min_lt_v8i32c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
-; SSE42-NEXT:    movaps {{.*#+}} xmm1 = [1,3,3,1]
-; SSE42-NEXT:    retq
+; SSE-LABEL: min_lt_v8i32c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
+; SSE-NEXT:    movaps {{.*#+}} xmm1 = [1,3,3,1]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: min_lt_v8i32c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [4294967289,4294967291,4294967291,4294967289,1,3,3,1]
 ; AVX-NEXT:    retq
   %1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0
   %2 = insertelement <8 x i32> <i32 -1, i32 -3, i32 -5, i32 -7, i32 7, i32 5, i32 3, i32 1>, i32 -1, i32 0
   %3 = icmp ult <8 x i32> %1, %2
   %4 = select <8 x i1> %3, <8 x i32> %1, <8 x i32> %2
   ret <8 x i32> %4
 }
 
 define <8 x i16> @min_lt_v8i16c() {
-; SSE2-LABEL: min_lt_v8i16c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [65529,65531,65533,65535,1,3,5,7]
-; SSE2-NEXT:    movdqa %xmm1, %xmm2
-; SSE2-NEXT:    psubusw {{.*}}(%rip), %xmm2
-; SSE2-NEXT:    pxor %xmm0, %xmm0
-; SSE2-NEXT:    pcmpeqw %xmm2, %xmm0
-; SSE2-NEXT:    pand %xmm0, %xmm1
-; SSE2-NEXT:    pandn {{.*}}(%rip), %xmm0
-; SSE2-NEXT:    por %xmm1, %xmm0
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: min_lt_v8i16c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [1,65531,65531,65529,1,3,3,1]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: min_lt_v8i16c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [1,65531,65531,65529,1,3,3,1]
-; SSE42-NEXT:    retq
+; SSE-LABEL: min_lt_v8i16c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [1,65531,65531,65529,1,3,3,1]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: min_lt_v8i16c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [1,65531,65531,65529,1,3,3,1]
 ; AVX-NEXT:    retq
   %1 = insertelement <8 x i16> <i16 -7, i16 -5, i16 -3, i16 -1, i16 1, i16 3, i16 5, i16 7>, i16 -7, i32 0
   %2 = insertelement <8 x i16> <i16 -1, i16 -3, i16 -5, i16 -7, i16 7, i16 5, i16 3, i16 1>, i16  1, i32 0
   %3 = icmp ult <8 x i16> %1, %2
   %4 = select <8 x i1> %3, <8 x i16> %1, <8 x i16> %2
   ret <8 x i16> %4
 }
 
 define <16 x i16> @min_lt_v16i16c() {
-; SSE2-LABEL: min_lt_v16i16c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [32775,32774,32773,32772,32771,32770,32769,32768]
-; SSE2-NEXT:    pcmpgtw {{.*}}(%rip), %xmm1
-; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [32769,32766,32765,32764,32763,32762,32761,32768]
-; SSE2-NEXT:    pcmpgtw {{.*}}(%rip), %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm2
-; SSE2-NEXT:    pandn {{.*}}(%rip), %xmm2
-; SSE2-NEXT:    pand {{.*}}(%rip), %xmm0
-; SSE2-NEXT:    por %xmm2, %xmm0
-; SSE2-NEXT:    movdqa %xmm1, %xmm2
-; SSE2-NEXT:    pandn {{.*}}(%rip), %xmm2
-; SSE2-NEXT:    pand {{.*}}(%rip), %xmm1
-; SSE2-NEXT:    por %xmm2, %xmm1
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: min_lt_v16i16c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [1,65530,65531,65532,65531,65530,65529,0]
-; SSE41-NEXT:    movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: min_lt_v16i16c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [1,65530,65531,65532,65531,65530,65529,0]
-; SSE42-NEXT:    movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0]
-; SSE42-NEXT:    retq
+; SSE-LABEL: min_lt_v16i16c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [1,65530,65531,65532,65531,65530,65529,0]
+; SSE-NEXT:    movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: min_lt_v16i16c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [1,65530,65531,65532,65531,65530,65529,0,1,2,3,4,3,2,1,0]
 ; AVX-NEXT:    retq
   %1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0
   %2 = insertelement <16 x i16> <i16 -1, i16 -2, i16 -3, i16 -4, i16 -5, i16 -6, i16 -7, i16 0, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, i16  1, i32 0
   %3 = icmp ult <16 x i16> %1, %2
; AVX-NEXT:    retq
   %1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0
   %2 = insertelement <16 x i8> <i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, i8  1, i32 0
   %3 = icmp ult <16 x i8> %1, %2
   %4 = select <16 x i1> %3, <16 x i8> %1, <16 x i8> %2
   ret <16 x i8> %4
 }
 
 define <2 x i64> @min_le_v2i64c() {
-; SSE2-LABEL: min_le_v2i64c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [18446744073709551609,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551615,1]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
-; SSE2-NEXT:    movdqa %xmm0, %xmm3
-; SSE2-NEXT:    pxor %xmm2, %xmm3
-; SSE2-NEXT:    pxor %xmm1, %xmm0
-; SSE2-NEXT:    movdqa %xmm0, %xmm4
-; SSE2-NEXT:    pcmpgtd %xmm3, %xmm4
-; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
-; SSE2-NEXT:    pcmpeqd %xmm3, %xmm0
-; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; SSE2-NEXT:    pand %xmm5, %xmm0
-; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
-; SSE2-NEXT:    por %xmm0, %xmm3
-; SSE2-NEXT:    pcmpeqd %xmm0, %xmm0
-; SSE2-NEXT:    pxor %xmm3, %xmm0
-; SSE2-NEXT:    pandn %xmm1, %xmm3
-; SSE2-NEXT:    pandn %xmm2, %xmm0
-; SSE2-NEXT:    por %xmm3, %xmm0
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: min_le_v2i64c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551609,7]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
-; SSE41-NEXT:    movdqa %xmm0, %xmm3
-; SSE41-NEXT:    pxor %xmm1, %xmm3
-; SSE41-NEXT:    pxor %xmm2, %xmm0
-; SSE41-NEXT:    movdqa %xmm0, %xmm4
-; SSE41-NEXT:    pcmpgtd %xmm3, %xmm4
-; SSE41-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
-; SSE41-NEXT:    pcmpeqd %xmm3, %xmm0
-; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; SSE41-NEXT:    pand %xmm5, %xmm0
-; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
-; SSE41-NEXT:    por %xmm0, %xmm3
-; SSE41-NEXT:    pcmpeqd %xmm0, %xmm0
-; SSE41-NEXT:    pxor %xmm3, %xmm0
-; SSE41-NEXT:    blendvpd %xmm2, %xmm1
-; SSE41-NEXT:    movapd %xmm1, %xmm0
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: min_le_v2i64c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movapd {{.*#+}} xmm1 = [18446744073709551615,1]
-; SSE42-NEXT:    movdqa {{.*#+}} xmm2 = [9223372036854775801,9223372036854775815]
-; SSE42-NEXT:    pcmpgtq {{.*}}(%rip), %xmm2
-; SSE42-NEXT:    pcmpeqd %xmm0, %xmm0
-; SSE42-NEXT:    pxor %xmm2, %xmm0
-; SSE42-NEXT:    blendvpd {{.*}}(%rip), %xmm1
-; SSE42-NEXT:    movapd %xmm1, %xmm0
-; SSE42-NEXT:    retq
+; SSE-LABEL: min_le_v2i64c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [18446744073709551609,1]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: min_le_v2i64c:
 ; AVX:       # BB#0:
-; AVX-NEXT:    vmovapd {{.*#+}} xmm0 = [18446744073709551615,1]
-; AVX-NEXT:    vmovdqa {{.*#+}} xmm1 = [9223372036854775801,9223372036854775815]
-; AVX-NEXT:    vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1
-; AVX-NEXT:    vpcmpeqd %xmm2, %xmm2, %xmm2
-; AVX-NEXT:    vpxor %xmm2, %xmm1, %xmm1
-; AVX-NEXT:    vblendvpd %xmm1, {{.*}}(%rip), %xmm0, %xmm0
+; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [18446744073709551609,1]
 ; AVX-NEXT:    retq
   %1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0
   %2 = insertelement <2 x i64> <i64 -1, i64 1>, i64 -1, i32 0
   %3 = icmp ule <2 x i64> %1, %2
   %4 = select <2 x i1> %3, <2 x i64> %1, <2 x i64> %2
   ret <2 x i64> %4
 }
 
 define <4 x i64> @min_le_v4i64c() {
-; SSE2-LABEL: min_le_v4i64c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm10 = [18446744073709551609,18446744073709551615]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm8 = [1,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm5 = [18446744073709551615,18446744073709551609]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm9 = [7,1]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm7 = [2147483648,2147483648,2147483648,2147483648]
-; SSE2-NEXT:    movdqa %xmm7, %xmm0
-; SSE2-NEXT:    pxor %xmm9, %xmm0
-; SSE2-NEXT:    movdqa %xmm7, %xmm1
-; SSE2-NEXT:    pxor %xmm8, %xmm1
-; SSE2-NEXT:    movdqa %xmm1, %xmm6
-; SSE2-NEXT:    pcmpgtd %xmm0, %xmm6
-; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm6[0,0,2,2]
-; SSE2-NEXT:    pcmpeqd %xmm0, %xmm1
-; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[1,1,3,3]
-; SSE2-NEXT:    pand %xmm2, %xmm0
-; SSE2-NEXT:    pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
-; SSE2-NEXT:    por %xmm0, %xmm6
-; SSE2-NEXT:    pcmpeqd %xmm0, %xmm0
-; SSE2-NEXT:    movdqa %xmm6, %xmm1
-; SSE2-NEXT:    pxor %xmm0, %xmm1
-; SSE2-NEXT:    movdqa %xmm7, %xmm2
-; SSE2-NEXT:    pxor %xmm5, %xmm2
-; SSE2-NEXT:    pxor %xmm10, %xmm7
-; SSE2-NEXT:    movdqa %xmm7, %xmm3
-; SSE2-NEXT:    pcmpgtd %xmm2, %xmm3
-; SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
-; SSE2-NEXT:    pcmpeqd %xmm2, %xmm7
-; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm7[1,1,3,3]
-; SSE2-NEXT:    pand %xmm4, %xmm2
-; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
-; SSE2-NEXT:    por %xmm2, %xmm3
-; SSE2-NEXT:    pxor %xmm3, %xmm0
-; SSE2-NEXT:    pandn %xmm10, %xmm3
-; SSE2-NEXT:    pandn %xmm5, %xmm0
-; SSE2-NEXT:    por %xmm3, %xmm0
-; SSE2-NEXT:    pandn %xmm8, %xmm6
-; SSE2-NEXT:    pandn %xmm9, %xmm1
-; SSE2-NEXT:    por %xmm6, %xmm1
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: min_le_v4i64c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movdqa {{.*#+}} xmm9 = [18446744073709551609,18446744073709551615]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm8 = [1,7]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm1 = [7,1]
-; SSE41-NEXT:    movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]
-; SSE41-NEXT:    movdqa %xmm0, %xmm3
-; SSE41-NEXT:    pxor %xmm1, %xmm3
-; SSE41-NEXT:    movdqa %xmm0, %xmm6
-; SSE41-NEXT:    pxor %xmm8, %xmm6
-; SSE41-NEXT:    movdqa %xmm6, %xmm7
-; SSE41-NEXT:    pcmpgtd %xmm3, %xmm7
-; SSE41-NEXT:    pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2]
-; SSE41-NEXT:    pcmpeqd %xmm3, %xmm6
-; SSE41-NEXT:    pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
-; SSE41-NEXT:    pand %xmm4, %xmm6
-; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3]
-; SSE41-NEXT:    por %xmm6, %xmm3
-; SSE41-NEXT:    pcmpeqd %xmm4, %xmm4
-; SSE41-NEXT:    pxor %xmm4, %xmm3
-; SSE41-NEXT:    movdqa %xmm0, %xmm6
-; SSE41-NEXT:    pxor %xmm2, %xmm6
-; SSE41-NEXT:    pxor %xmm9, %xmm0
-; SSE41-NEXT:    movdqa %xmm0, %xmm7
-; SSE41-NEXT:    pcmpgtd %xmm6, %xmm7
-; SSE41-NEXT:    pshufd {{.*#+}} xmm5 = xmm7[0,0,2,2]
-; SSE41-NEXT:    pcmpeqd %xmm6, %xmm0
-; SSE41-NEXT:    pshufd {{.*#+}} xmm6 = xmm0[1,1,3,3]
-; SSE41-NEXT:    pand %xmm5, %xmm6
-; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm7[1,1,3,3]
-; SSE41-NEXT:    por %xmm6, %xmm0
-; SSE41-NEXT:    pxor %xmm4, %xmm0
-; SSE41-NEXT:    blendvpd %xmm9, %xmm2
-; SSE41-NEXT:    movdqa %xmm3, %xmm0
-; SSE41-NEXT:    blendvpd %xmm8, %xmm1
-; SSE41-NEXT:    movapd %xmm2, %xmm0
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: min_le_v4i64c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movapd {{.*#+}} xmm1 = [7,1]
-; SSE42-NEXT:    movapd {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
-; SSE42-NEXT:    movdqa {{.*#+}} xmm3 = [9223372036854775809,9223372036854775815]
-; SSE42-NEXT:    pcmpgtq {{.*}}(%rip), %xmm3
-; SSE42-NEXT:    pcmpeqd %xmm4, %xmm4
-; SSE42-NEXT:    pxor %xmm4, %xmm3
-; SSE42-NEXT:    movdqa {{.*#+}} xmm0 = [9223372036854775801,9223372036854775807]
-; SSE42-NEXT:    pcmpgtq {{.*}}(%rip), %xmm0
-; SSE42-NEXT:    pxor %xmm4, %xmm0
-; SSE42-NEXT:    blendvpd {{.*}}(%rip), %xmm2
-; SSE42-NEXT:    movdqa %xmm3, %xmm0
-; SSE42-NEXT:    blendvpd {{.*}}(%rip), %xmm1
-; SSE42-NEXT:    movapd %xmm2, %xmm0
-; SSE42-NEXT:    retq
-;
-; AVX1-LABEL: min_le_v4i64c:
-; AVX1:       # BB#0:
-; AVX1-NEXT:    vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
-; AVX1-NEXT:    vmovdqa {{.*#+}} xmm1 = [9223372036854775809,9223372036854775815]
-; AVX1-NEXT:    vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1
-; AVX1-NEXT:    vpcmpeqd %xmm2, %xmm2, %xmm2
-; AVX1-NEXT:    vpxor %xmm2, %xmm1, %xmm1
-; AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 = [9223372036854775801,9223372036854775807]
-; AVX1-NEXT:    vpcmpgtq {{.*}}(%rip), %xmm3, %xmm3
-; AVX1-NEXT:    vpxor %xmm2, %xmm3, %xmm2
-; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm2, %ymm1
-; AVX1-NEXT:    vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
-; AVX1-NEXT:    retq
-;
-; AVX2-LABEL: min_le_v4i64c:
-; AVX2:       # BB#0:
-; AVX2-NEXT:    vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
-; AVX2-NEXT:    vmovdqa {{.*#+}} ymm1 = [9223372036854775801,9223372036854775807,9223372036854775809,9223372036854775815]
-; AVX2-NEXT:    vpcmpgtq {{.*}}(%rip), %ymm1, %ymm1
-; AVX2-NEXT:    vpcmpeqd %ymm2, %ymm2, %ymm2
-; AVX2-NEXT:    vpxor %ymm2, %ymm1, %ymm1
-; AVX2-NEXT:    vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
-; AVX2-NEXT:    retq
+; SSE-LABEL: min_le_v4i64c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [18446744073709551609,18446744073709551609]
+; SSE-NEXT:    movaps {{.*#+}} xmm1 = [1,1]
+; SSE-NEXT:    retq
 ;
-; AVX512-LABEL: min_le_v4i64c:
-; AVX512:       # BB#0:
-; AVX512-NEXT:    vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
-; AVX512-NEXT:    vmovdqa {{.*#+}} ymm1 = [9223372036854775801,9223372036854775807,9223372036854775809,9223372036854775815]
-; AVX512-NEXT:    vpcmpgtq {{.*}}(%rip), %ymm1, %ymm1
-; AVX512-NEXT:    vpcmpeqd %ymm2, %ymm2, %ymm2
-; AVX512-NEXT:    vpxor %ymm2, %ymm1, %ymm1
-; AVX512-NEXT:    vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
-; AVX512-NEXT:    retq
+; AVX-LABEL: min_le_v4i64c:
+; AVX:       # BB#0:
+; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [18446744073709551609,18446744073709551609,1,1]
+; AVX-NEXT:    retq
   %1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0
   %2 = insertelement <4 x i64> <i64 -1, i64 -7, i64 7, i64 1>, i64 -1, i32 0
   %3 = icmp ule <4 x i64> %1, %2
   %4 = select <4 x i1> %3, <4 x i64> %1, <4 x i64> %2
   ret <4 x i64> %4
 }
 
 define <4 x i32> @min_le_v4i32c() {
-; SSE2-LABEL: min_le_v4i32c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [2147483641,2147483647,2147483649,2147483655]
-; SSE2-NEXT:    pcmpgtd {{.*}}(%rip), %xmm0
-; SSE2-NEXT:    pcmpeqd %xmm1, %xmm1
-; SSE2-NEXT:    pxor %xmm0, %xmm1
-; SSE2-NEXT:    pandn {{.*}}(%rip), %xmm1
-; SSE2-NEXT:    pandn {{.*}}(%rip), %xmm0
-; SSE2-NEXT:    por %xmm1, %xmm0
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: min_le_v4i32c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: min_le_v4i32c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
-; SSE42-NEXT:    retq
+; SSE-LABEL: min_le_v4i32c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: min_le_v4i32c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
 ; AVX-NEXT:    retq
   %1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0
   %2 = insertelement <4 x i32> <i32 -1, i32 -7, i32 7, i32 1>, i32 -1, i32 0
   %3 = icmp ule <4 x i32> %1, %2
   %4 = select <4 x i1> %3, <4 x i32> %1, <4 x i32> %2
   ret <4 x i32> %4
 }
 
 define <8 x i32> @min_le_v8i32c() {
-; SSE2-LABEL: min_le_v8i32c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [2147483649,2147483651,2147483653,2147483655]
-; SSE2-NEXT:    pcmpgtd {{.*}}(%rip), %xmm1
-; SSE2-NEXT:    pcmpeqd %xmm2, %xmm2
-; SSE2-NEXT:    movdqa %xmm1, %xmm3
-; SSE2-NEXT:    pxor %xmm2, %xmm3
-; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [2147483641,2147483643,2147483645,2147483647]
-; SSE2-NEXT:    pcmpgtd {{.*}}(%rip), %xmm0
-; SSE2-NEXT:    pxor %xmm0, %xmm2
-; SSE2-NEXT:    pandn {{.*}}(%rip), %xmm2
-; SSE2-NEXT:    pandn {{.*}}(%rip), %xmm0
-; SSE2-NEXT:    por %xmm2, %xmm0
-; SSE2-NEXT:    pandn {{.*}}(%rip), %xmm3
-; SSE2-NEXT:    pandn {{.*}}(%rip), %xmm1
-; SSE2-NEXT:    por %xmm3, %xmm1
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: min_le_v8i32c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
-; SSE41-NEXT:    movaps {{.*#+}} xmm1 = [1,3,3,1]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: min_le_v8i32c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
-; SSE42-NEXT:    movaps {{.*#+}} xmm1 = [1,3,3,1]
-; SSE42-NEXT:    retq
+; SSE-LABEL: min_le_v8i32c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
+; SSE-NEXT:    movaps {{.*#+}} xmm1 = [1,3,3,1]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: min_le_v8i32c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [4294967289,4294967291,4294967291,4294967289,1,3,3,1]
 ; AVX-NEXT:    retq
   %1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0
   %2 = insertelement <8 x i32> <i32 -1, i32 -3, i32 -5, i32 -7, i32 7, i32 5, i32 3, i32 1>, i32 -1, i32 0
   %3 = icmp ule <8 x i32> %1, %2
   %4 = select <8 x i1> %3, <8 x i32> %1, <8 x i32> %2
   ret <8 x i32> %4
 }
 
 define <8 x i16> @min_le_v8i16c() {
-; SSE2-LABEL: min_le_v8i16c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [65529,65531,65533,65535,1,3,5,7]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [65535,65533,65531,65529,7,5,3,1]
-; SSE2-NEXT:    movdqa %xmm1, %xmm3
-; SSE2-NEXT:    psubusw %xmm2, %xmm3
-; SSE2-NEXT:    pxor %xmm0, %xmm0
-; SSE2-NEXT:    pcmpeqw %xmm3, %xmm0
-; SSE2-NEXT:    pand %xmm0, %xmm1
-; SSE2-NEXT:    pandn %xmm2, %xmm0
-; SSE2-NEXT:    por %xmm1, %xmm0
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: min_le_v8i16c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [65529,65531,65531,65529,1,3,3,1]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: min_le_v8i16c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [65529,65531,65531,65529,1,3,3,1]
-; SSE42-NEXT:    retq
+; SSE-LABEL: min_le_v8i16c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [65529,65531,65531,65529,1,3,3,1]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: min_le_v8i16c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [65529,65531,65531,65529,1,3,3,1]
 ; AVX-NEXT:    retq
   %1 = insertelement <8 x i16> <i16 -7, i16 -5, i16 -3, i16 -1, i16 1, i16 3, i16 5, i16 7>, i16 -7, i32 0
   %2 = insertelement <8 x i16> <i16 -1, i16 -3, i16 -5, i16 -7, i16 7, i16 5, i16 3, i16 1>, i16 -1, i32 0
   %3 = icmp ule <8 x i16> %1, %2
   %4 = select <8 x i1> %3, <8 x i16> %1, <8 x i16> %2
   ret <8 x i16> %4
 }
 
 define <16 x i16> @min_le_v16i16c() {
-; SSE2-LABEL: min_le_v16i16c:
-; SSE2:       # BB#0:
-; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [65529,65530,65531,65532,65533,65534,65535,0]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm3 = [1,2,3,4,5,6,7,8]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [65535,65534,65533,65532,65531,65530,65529,0]
-; SSE2-NEXT:    movdqa {{.*#+}} xmm5 = [7,6,5,4,3,2,1,0]
-; SSE2-NEXT:    movdqa %xmm3, %xmm1
-; SSE2-NEXT:    psubusw %xmm5, %xmm1
-; SSE2-NEXT:    pxor %xmm6, %xmm6
-; SSE2-NEXT:    pcmpeqw %xmm6, %xmm1
-; SSE2-NEXT:    movdqa %xmm2, %xmm0
-; SSE2-NEXT:    psubusw %xmm4, %xmm0
-; SSE2-NEXT:    pcmpeqw %xmm6, %xmm0
-; SSE2-NEXT:    pand %xmm0, %xmm2
-; SSE2-NEXT:    pandn %xmm4, %xmm0
-; SSE2-NEXT:    por %xmm2, %xmm0
-; SSE2-NEXT:    pand %xmm1, %xmm3
-; SSE2-NEXT:    pandn %xmm5, %xmm1
-; SSE2-NEXT:    por %xmm3, %xmm1
-; SSE2-NEXT:    retq
-;
-; SSE41-LABEL: min_le_v16i16c:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [65529,65530,65531,65532,65531,65530,65529,0]
-; SSE41-NEXT:    movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0]
-; SSE41-NEXT:    retq
-;
-; SSE42-LABEL: min_le_v16i16c:
-; SSE42:       # BB#0:
-; SSE42-NEXT:    movaps {{.*#+}} xmm0 = [65529,65530,65531,65532,65531,65530,65529,0]
-; SSE42-NEXT:    movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0]
-; SSE42-NEXT:    retq
+; SSE-LABEL: min_le_v16i16c:
+; SSE:       # BB#0:
+; SSE-NEXT:    movaps {{.*#+}} xmm0 = [65529,65530,65531,65532,65531,65530,65529,0]
+; SSE-NEXT:    movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0]
+; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: min_le_v16i16c:
 ; AVX:       # BB#0:
 ; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [65529,65530,65531,65532,65531,65530,65529,0,1,2,3,4,3,2,1,0]
 ; AVX-NEXT:    retq
   %1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0
   %2 = insertelement <16 x i16> <i16 -1, i16 -2, i16 -3, i16 -4, i16 -5, i16 -6, i16 -7, i16 0, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, i16 -1, i32 0
   %3 = icmp ule <16 x i16> %1, %2