[ARM] Allow TargetParser to accurately target architectures

[bsmith]

Summary

This patch changes the TargetParser to properly handle the generic CPU.

Currently generic is handled by having a row in the CPU lists mapping it to ARMv8.1-A since this is the only architecture without a supported CPU. There are two problems with this. Firstly, it stops us from properly targeting architectures, we would ideally like -mcpu=generic to mean target the specified architecture, rather than ARMv8.1-A. Secondly, it prevents us from having more than one architecture in the TargetParser without a supported CPU, whilst the CPU list will allow multiple 'generic' entries, the TargetParser iterates through the list finding only a first one, never a second.

To achieve this change we add a default FPU for each architecture, so that we can fall back to it when the CPU is generic. We also change the API such that an architecture is specified for fetching of defaults for extensions and FPU, for use when a generic CPU is specified.

To co-inside with the generic support improved in D14660 we also default to 'generic' instead of an empty string in the cases of no valid default CPU being found but the architecture is valid.

[rengolin]

LGTM, thanks!

[bsmith]

Thanks, committed as r253198.

include/llvm/Support/ARMTargetParser.def

 #undef ARM_FPU
 
 #ifndef ARM_ARCH
-#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_BASE_EXT)
+#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT)
 #endif
 ARM_ARCH("invalid", AK_INVALID, nullptr, nullptr,
-          ARMBuildAttrs::CPUArch::Pre_v4, AEK_NONE)
+          ARMBuildAttrs::CPUArch::Pre_v4, FK_NONE, AEK_NONE)
 ARM_ARCH("armv2", AK_ARMV2, "2", "v2", ARMBuildAttrs::CPUArch::Pre_v4,
-          AEK_NONE)
+          FK_NONE, AEK_NONE)
 ARM_ARCH("armv2a", AK_ARMV2A, "2A", "v2a", ARMBuildAttrs::CPUArch::Pre_v4,
-          AEK_NONE)
+          FK_NONE, AEK_NONE)
 ARM_ARCH("armv3", AK_ARMV3, "3", "v3", ARMBuildAttrs::CPUArch::Pre_v4,
-          AEK_NONE)
+          FK_NONE, AEK_NONE)
 ARM_ARCH("armv3m", AK_ARMV3M, "3M", "v3m", ARMBuildAttrs::CPUArch::Pre_v4,
-          AEK_NONE)
+          FK_NONE, AEK_NONE)
 ARM_ARCH("armv4", AK_ARMV4, "4", "v4", ARMBuildAttrs::CPUArch::v4,
-          AEK_NONE)
+          FK_NONE, AEK_NONE)
 ARM_ARCH("armv4t", AK_ARMV4T, "4T", "v4t", ARMBuildAttrs::CPUArch::v4T,
-          AEK_NONE)
+          FK_NONE, AEK_NONE)
 ARM_ARCH("armv5t", AK_ARMV5T, "5T", "v5", ARMBuildAttrs::CPUArch::v5T,
-          AEK_NONE)
+          FK_NONE, AEK_NONE)
 ARM_ARCH("armv5te", AK_ARMV5TE, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE,
-          AEK_DSP)
+          FK_NONE, AEK_DSP)
 ARM_ARCH("armv5tej", AK_ARMV5TEJ, "5TEJ", "v5e", ARMBuildAttrs::CPUArch::v5TEJ,
-          AEK_DSP)
+          FK_NONE, AEK_DSP)
 ARM_ARCH("armv6", AK_ARMV6, "6", "v6", ARMBuildAttrs::CPUArch::v6,
-          AEK_DSP)
+          FK_VFPV2, AEK_DSP)
 ARM_ARCH("armv6k", AK_ARMV6K, "6K", "v6k", ARMBuildAttrs::CPUArch::v6K,
-          AEK_DSP)
+          FK_VFPV2, AEK_DSP)
 ARM_ARCH("armv6t2", AK_ARMV6T2, "6T2", "v6t2", ARMBuildAttrs::CPUArch::v6T2,
-          AEK_DSP)
+          FK_NONE, AEK_DSP)
 ARM_ARCH("armv6z", AK_ARMV6Z, "6Z", "v6z", ARMBuildAttrs::CPUArch::v6KZ,
-          (AEK_SEC | AEK_DSP))
+          FK_VFPV2, (AEK_SEC | AEK_DSP))
 ARM_ARCH("armv6zk", AK_ARMV6ZK, "6ZK", "v6zk", ARMBuildAttrs::CPUArch::v6KZ,
-          (AEK_SEC | AEK_DSP))
+          FK_VFPV2, (AEK_SEC | AEK_DSP))
 ARM_ARCH("armv6-m", AK_ARMV6M, "6-M", "v6m", ARMBuildAttrs::CPUArch::v6_M,
-          AEK_NONE)
+          FK_NONE, AEK_NONE)
 ARM_ARCH("armv7-a", AK_ARMV7A, "7-A", "v7", ARMBuildAttrs::CPUArch::v7,
-          AEK_DSP)
+          FK_NEON, AEK_DSP)
 ARM_ARCH("armv7-r", AK_ARMV7R, "7-R", "v7r", ARMBuildAttrs::CPUArch::v7,
-          (AEK_HWDIV | AEK_DSP))
+          FK_NONE, (AEK_HWDIV | AEK_DSP))
 ARM_ARCH("armv7-m", AK_ARMV7M, "7-M", "v7m", ARMBuildAttrs::CPUArch::v7,
-          AEK_HWDIV)
+          FK_NONE, AEK_HWDIV)
 ARM_ARCH("armv7e-m", AK_ARMV7EM, "7E-M", "v7em", ARMBuildAttrs::CPUArch::v7E_M,
-          (AEK_HWDIV | AEK_DSP))
+          FK_NONE, (AEK_HWDIV | AEK_DSP))
 ARM_ARCH("armv8-a", AK_ARMV8A, "8-A", "v8", ARMBuildAttrs::CPUArch::v8,
-         (AEK_SEC | AEK_MP | AEK_VIRT | AEK_HWDIVARM | AEK_HWDIV | AEK_DSP))
+          FK_CRYPTO_NEON_FP_ARMV8, (AEK_SEC | AEK_MP | AEK_VIRT | AEK_HWDIVARM |
+                             AEK_HWDIV | AEK_DSP | AEK_CRC))
 ARM_ARCH("armv8.1-a", AK_ARMV8_1A, "8.1-A", "v8.1a", ARMBuildAttrs::CPUArch::v8,
-         (AEK_SEC | AEK_MP | AEK_VIRT | AEK_HWDIVARM | AEK_HWDIV | AEK_DSP))
+          FK_CRYPTO_NEON_FP_ARMV8, (AEK_SEC | AEK_MP | AEK_VIRT | AEK_HWDIVARM |
+                             AEK_HWDIV | AEK_DSP | AEK_CRC))
 // Non-standard Arch names.
 ARM_ARCH("iwmmxt", AK_IWMMXT, "iwmmxt", "", ARMBuildAttrs::CPUArch::v5TE,
-          AEK_NONE)
+          FK_NONE, AEK_NONE)
 ARM_ARCH("iwmmxt2", AK_IWMMXT2, "iwmmxt2", "", ARMBuildAttrs::CPUArch::v5TE,
-          AEK_NONE)
+          FK_NONE, AEK_NONE)
 ARM_ARCH("xscale", AK_XSCALE, "xscale", "", ARMBuildAttrs::CPUArch::v5TE,
-          AEK_NONE)
+          FK_NONE, AEK_NONE)
 ARM_ARCH("armv6j", AK_ARMV6J, "6J", "v6", ARMBuildAttrs::CPUArch::v6,
-          AEK_DSP)
+          FK_NONE, AEK_DSP)
 ARM_ARCH("armv7s", AK_ARMV7S, "7-S", "v7s", ARMBuildAttrs::CPUArch::v7,
-          AEK_DSP)
+          FK_NEON_VFPV4, AEK_DSP)
 ARM_ARCH("armv7k", AK_ARMV7K, "7-K", "v7k", ARMBuildAttrs::CPUArch::v7,
-          AEK_DSP)
+          FK_NONE, AEK_DSP)
 #undef ARM_ARCH
 
 #ifndef ARM_ARCH_EXT_NAME

 ARM_CPU_NAME("cortex-a57", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, AEK_CRC)
 ARM_CPU_NAME("cortex-a72", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, AEK_CRC)
 ARM_CPU_NAME("cyclone", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, AEK_CRC)
-ARM_CPU_NAME("generic", AK_ARMV8_1A, FK_NEON_FP_ARMV8, true, AEK_NONE)
 // Non-standard Arch names.
 ARM_CPU_NAME("iwmmxt", AK_IWMMXT, FK_NONE, true, AEK_NONE)
 ARM_CPU_NAME("xscale", AK_XSCALE, FK_NONE, true, AEK_NONE)

include/llvm/Support/TargetParser.h

 
 // Arch names.
 enum ArchKind {
-#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_BASE_EXT) ID,
+#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) ID,
 #include "ARMTargetParser.def"
   AK_LAST
 };

 StringRef getHWDivName(unsigned HWDivKind);
 
 // Information by Name
-unsigned  getDefaultFPU(StringRef CPU);
-unsigned  getDefaultExtensions(StringRef CPU);
+unsigned  getDefaultFPU(StringRef CPU, unsigned ArchKind);
+unsigned  getDefaultExtensions(StringRef CPU, unsigned ArchKind);
 StringRef getDefaultCPU(StringRef Arch);
 
 // Parser

lib/Support/TargetParser.cpp

   const char *SubArchCStr;
   size_t SubArchLength;
   ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes.
+  unsigned DefaultFPU;
   unsigned ArchBaseExtensions;
 
   StringRef getName() const { return StringRef(NameCStr, NameLength); }

   // Sub-Arch name.
   StringRef getSubArch() const { return StringRef(SubArchCStr, SubArchLength); }
 } ARCHNames[] = {
-#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_BASE_EXT)       \
+#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT)       \
   {NAME, sizeof(NAME) - 1, ID, CPU_ATTR, sizeof(CPU_ATTR) - 1, SUB_ARCH,       \
-   sizeof(SUB_ARCH) - 1, ARCH_ATTR, ARCH_BASE_EXT},
+   sizeof(SUB_ARCH) - 1, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT},
 #include "llvm/Support/ARMTargetParser.def"
 };
 

   return FPUNames[FPUKind].Restriction;
 }
 
-unsigned llvm::ARM::getDefaultFPU(StringRef CPU) {
+unsigned llvm::ARM::getDefaultFPU(StringRef CPU, unsigned ArchKind) {
+  if (CPU == "generic")
+    return ARCHNames[ArchKind].DefaultFPU;
+
   return StringSwitch<unsigned>(CPU)
 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
     .Case(NAME, DEFAULT_FPU)

   return StringRef();
 }
 
-unsigned llvm::ARM::getDefaultExtensions(StringRef CPU) {
+unsigned llvm::ARM::getDefaultExtensions(StringRef CPU, unsigned ArchKind) {
+  if (CPU == "generic")
+    return ARCHNames[ArchKind].ArchBaseExtensions;
+
   for (const auto C : CPUNames) {
     if (CPU == C.getName())
       return (ARCHNames[C.ArchID].ArchBaseExtensions | C.DefaultExtensions);

     if (CPU.ArchID == AK && CPU.Default)
       return CPU.getName();
   }
-  return StringRef();
+
+  // If we can't find a default then target the architecture instead
+  return "generic";
 }
 
 // ======================================================= //