Error checking correction in AArch64 hardware watchpoint code

[omjavaid]

Summary

This patch fixes a few areas where AArch64 hardware watchpoints were not emitting errors correctly.

This makes sure any ptrace failures are reflected in any packet responses from the server.

[tberghammer]

source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp

469 ↗

(On Diff #33099)

This should be "return false"

490 ↗

(On Diff #33099)

This should be "return false"

618 ↗

(On Diff #33099)

This should be "return false"

[clayborg]

Fix the incorrect bool return values and this will be good to go.

lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp

 uint32_t
 NativeRegisterContextLinux_arm64::SetHardwareBreakpoint (lldb::addr_t addr, size_t size)
 {
     Log *log(lldb_private::GetLogIfAllCategoriesSet (LIBLLDB_LOG_WATCHPOINTS));
 
     if (log)
         log->Printf ("NativeRegisterContextLinux_arm64::%s()", __FUNCTION__);
 
+    Error error;
+
     // Read hardware breakpoint and watchpoint information.
-    ReadHardwareDebugInfo ();
+    error = ReadHardwareDebugInfo ();
+
+    if (error.Fail())
+        return LLDB_INVALID_INDEX32;
 
-    uint32_t control_value, bp_index;
+    uint32_t control_value = 0, bp_index = 0;
 
     // Check if size has a valid hardware breakpoint length.
     if (size != 4)
         return LLDB_INVALID_INDEX32;  // Invalid size for a AArch64 hardware breakpoint
 
     // Check 4-byte alignment for hardware breakpoint target address.
     if (addr & 0x03)
         return LLDB_INVALID_INDEX32; // Invalid address, should be 4-byte aligned.
NativeRegisterContextLinux_arm64::SetHardwareBreakpoint (lldb::addr_t addr, size_t size)
     // Add new or update existing watchpoint
     if ((m_hbr_regs[bp_index].control & 1) == 0)
     {
         m_hbr_regs[bp_index].address = addr;
         m_hbr_regs[bp_index].control = control_value;
         m_hbr_regs[bp_index].refcount = 1;
 
         // PTRACE call to set corresponding hardware breakpoint register.
-        WriteHardwareDebugRegs(eDREGTypeBREAK);
+        error = WriteHardwareDebugRegs(eDREGTypeBREAK);
+
+        if (error.Fail())
+            return LLDB_INVALID_INDEX32;
     }
     else
         m_hbr_regs[bp_index].refcount++;
 
     return bp_index;
 }
 
 bool
 NativeRegisterContextLinux_arm64::ClearHardwareBreakpoint (uint32_t hw_idx)
 {
     Log *log(lldb_private::GetLogIfAllCategoriesSet (LIBLLDB_LOG_WATCHPOINTS));
 
     if (log)
         log->Printf ("NativeRegisterContextLinux_arm64::%s()", __FUNCTION__);
 
+    Error error;
+
     // Read hardware breakpoint and watchpoint information.
-    ReadHardwareDebugInfo ();
+    error = ReadHardwareDebugInfo ();
+
+    if (error.Fail())
+        return false;
 
     if (hw_idx >= m_max_hbp_supported)
         return false;
 
     // Update reference count if multiple references.
     if (m_hbr_regs[hw_idx].refcount > 1)
     {
         m_hbr_regs[hw_idx].refcount--;
         return true;
     }
     else if (m_hbr_regs[hw_idx].refcount == 1)
     {
         m_hbr_regs[hw_idx].control &= ~1;
         m_hbr_regs[hw_idx].address = 0;
         m_hbr_regs[hw_idx].refcount = 0;
 
         // PTRACE call to clear corresponding hardware breakpoint register.
         WriteHardwareDebugRegs(eDREGTypeBREAK);
+
+        if (error.Fail())
+            return false;
+
+        return true;
     }
 
     return false;
 }
 
 uint32_t
 NativeRegisterContextLinux_arm64::NumSupportedHardwareWatchpoints ()
 {
     Log *log(lldb_private::GetLogIfAllCategoriesSet (LIBLLDB_LOG_WATCHPOINTS));
 
     if (log)
         log->Printf ("NativeRegisterContextLinux_arm64::%s()", __FUNCTION__);
 
+    Error error;
+
     // Read hardware breakpoint and watchpoint information.
-    ReadHardwareDebugInfo ();
+    error = ReadHardwareDebugInfo ();
+
+    if (error.Fail())
+        return LLDB_INVALID_INDEX32;
 
     return m_max_hwp_supported;
 }
 
 uint32_t
 NativeRegisterContextLinux_arm64::SetHardwareWatchpoint (lldb::addr_t addr, size_t size, uint32_t watch_flags)
 {
     Log *log(lldb_private::GetLogIfAllCategoriesSet (LIBLLDB_LOG_WATCHPOINTS));
 
     if (log)
         log->Printf ("NativeRegisterContextLinux_arm64::%s()", __FUNCTION__);
     
+    Error error;
+
     // Read hardware breakpoint and watchpoint information.
-    ReadHardwareDebugInfo ();
+    error = ReadHardwareDebugInfo ();
+
+    if (error.Fail())
+        return LLDB_INVALID_INDEX32;
     
-    uint32_t control_value, wp_index;
+    uint32_t control_value = 0, wp_index = 0;
 
     // Check if we are setting watchpoint other than read/write/access
     // Also update watchpoint flag to match AArch64 write-read bit configuration.
     switch (watch_flags)
     {
         case 1:
             watch_flags = 2;
             break;
NativeRegisterContextLinux_arm64::SetHardwareWatchpoint (lldb::addr_t addr, size_t size, uint32_t watch_flags)
     if ((m_hwp_regs[wp_index].control & 1) == 0)
     {
         // Update watchpoint in local cache
         m_hwp_regs[wp_index].address = addr;
         m_hwp_regs[wp_index].control = control_value;
         m_hwp_regs[wp_index].refcount = 1;
 
         // PTRACE call to set corresponding watchpoint register.
-        WriteHardwareDebugRegs(eDREGTypeWATCH);
+        error = WriteHardwareDebugRegs(eDREGTypeWATCH);
+
+        if (error.Fail())
+            return LLDB_INVALID_INDEX32;
     }
     else
         m_hwp_regs[wp_index].refcount++;
 
     return wp_index;
 }
 
 bool
 NativeRegisterContextLinux_arm64::ClearHardwareWatchpoint (uint32_t wp_index)
 {
     Log *log(lldb_private::GetLogIfAllCategoriesSet (LIBLLDB_LOG_WATCHPOINTS));
 
     if (log)
         log->Printf ("NativeRegisterContextLinux_arm64::%s()", __FUNCTION__);
 
+    Error error;
+
     // Read hardware breakpoint and watchpoint information.
-    ReadHardwareDebugInfo ();
+    error = ReadHardwareDebugInfo ();
+
+    if (error.Fail())
+        return false;
 
     if (wp_index >= m_max_hwp_supported)
         return false;
 
     // Update reference count if multiple references.
     if (m_hwp_regs[wp_index].refcount > 1)
     {
         m_hwp_regs[wp_index].refcount--;
         return true;
     }
     else if (m_hwp_regs[wp_index].refcount == 1)
     {
         // Update watchpoint in local cache
         m_hwp_regs[wp_index].control &= ~1;
         m_hwp_regs[wp_index].address = 0;
         m_hwp_regs[wp_index].refcount = 0;
 
         // Ptrace call to update hardware debug registers
-        WriteHardwareDebugRegs(eDREGTypeWATCH);
+        error = WriteHardwareDebugRegs(eDREGTypeWATCH);
+
+        if (error.Fail())
+            return false;
+
         return true;
     }
 
     return false;
 }
 
 Error
 NativeRegisterContextLinux_arm64::ClearAllHardwareWatchpoints ()
 {
     Log *log(lldb_private::GetLogIfAllCategoriesSet (LIBLLDB_LOG_WATCHPOINTS));
 
     if (log)
         log->Printf ("NativeRegisterContextLinux_arm64::%s()", __FUNCTION__);
 
+    Error error;
+
     // Read hardware breakpoint and watchpoint information.
-    ReadHardwareDebugInfo ();
+    error = ReadHardwareDebugInfo ();
+
+    if (error.Fail())
+        return error;
 
     for (uint32_t i = 0; i < m_max_hwp_supported; i++)
     {
         if (m_hwp_regs[i].control & 0x01)
         {
             // Clear watchpoints in local cache
             m_hwp_regs[i].control &= ~1;
             m_hwp_regs[i].address = 0;
             m_hwp_regs[i].refcount = 0;
 
             // Ptrace call to update hardware debug registers
-            WriteHardwareDebugRegs(eDREGTypeWATCH);
+            error = WriteHardwareDebugRegs(eDREGTypeWATCH);
+
+            if (error.Fail())
+                return error;
         }
     }
 
     return Error();
 }
 
 uint32_t
 NativeRegisterContextLinux_arm64::GetWatchpointSize(uint32_t wp_index)
NativeRegisterContextLinux_arm64::ReadHardwareDebugInfo()
     int regset = NT_ARM_HW_WATCH;
     struct iovec ioVec;
     struct user_hwdebug_state dreg_state;
     Error error;
 
     ioVec.iov_base = &dreg_state;
     ioVec.iov_len = sizeof (dreg_state);
     error = NativeProcessLinux::PtraceWrapper(PTRACE_GETREGSET, tid, &regset, &ioVec, ioVec.iov_len);
+
+    if (error.Fail())
+        return error;
+
     m_max_hwp_supported = dreg_state.dbg_info & 0xff;
 
     regset = NT_ARM_HW_BREAK;
     error = NativeProcessLinux::PtraceWrapper(PTRACE_GETREGSET, tid, &regset, &ioVec, ioVec.iov_len);
-    m_max_hbp_supported = dreg_state.dbg_info & 0xff;
 
+    if (error.Fail())
+        return error;
+  
+    m_max_hbp_supported = dreg_state.dbg_info & 0xff;
     m_refresh_hwdebug_info = false;
 
     return error;
 }
 
 Error
 NativeRegisterContextLinux_arm64::WriteHardwareDebugRegs(int hwbType)
 {