This is an archive of the discontinued LLVM Phabricator instance.

Differential D7141

Regression test for lshr codegen bug
AbandonedPublic

Authored by chfast on Jan 23 2015, 5:38 AM.

Details

Reviewers
None
Summary

Test for bug report http://llvm.org/bugs/show_bug.cgi?id=22304

Diff Detail

Repository
rL LLVM

Event Timeline

chfast updated this revision to Diff 18665.Jan 23 2015, 5:38 AM
chfast retitled this revision from to Regression test for lshr codegen bug.
chfast updated this object.
chfast edited the test plan for this revision. (Show Details)
chfast set the repository for this revision to rL LLVM.
chfast added a subscriber: Unknown Object (MLST).
chfast added a parent revision: D8556: Fix backtracking of instruction scheduling (pre-RA-sched).Mar 24 2015, 12:33 PM
chfast abandoned this revision.Mar 24 2015, 12:35 PM

Obsolated by D8556.

Revision Contents

PathSize
test/
CodeGen/
Generic/
21 lines

Diff 18665

test/CodeGen/Generic/lshr_bug_queue_is_empty.ll

  • This file was added.
; RUN: llc < %s
define void @lshr_codegen_bug_queue_is_empty() {
entry:
%0 = load i256* undef
%1 = sub i256 0, %0
%k_32 = trunc i256 %1 to i5
%2 = zext i5 %k_32 to i256
%kx8 = mul i256 %2, 8
%bitpos = add i256 %kx8, 7
%bitval = lshr i256 %1, %bitpos
%bittest = trunc i256 %bitval to i1
%3 = shl i256 1, %bitpos
%mask = sub i256 %3, 1
%4 = and i256 %1, %mask
%5 = icmp ule i256 %1, 30
%6 = select i1 %bittest, i256 undef, i256 %4
%7 = select i1 %5, i256 %6, i256 %1
store i256 %7, i256* undef
ret void
}