ValueTracking: Handle more instructions in isKnownNeverNaN

[spatel]

lib/Analysis/ValueTracking.cpp

2933–2935

Remove stale comment.

2945–2949

Why are these not the same as fdiv/frem? I think we need to account for inf math that produces nan with these operators:
inf + -inf = nan
inf - inf = nan
0.0 * inf = nan

[arsenm]

Don't handle fadd etc.

[spatel]

Please add the tests with baseline CHECKs as a preliminary commit, then rebase this.

[spatel]

lib/Analysis/ValueTracking.cpp

2933–2935

Comment is still here. Also, we should have tests for sitofp/uitofp.

[arsenm]

lib/Analysis/ValueTracking.cpp

2933–2935

The tests are there for sitofp/uitofp, just apparently somehow the fcmp ord was already optimizing away before

[arsenm]

lib/Analysis/ValueTracking.cpp

2933–2935

It looks like foldFCmpIntToFPConst specifically handles the case of these with an fcmp ord

[spatel]

LGTM

lib/Analysis/ValueTracking.cpp

2933–2935

Ah, I see. Sorry, I didn't see the existing tests. We can test this patch more directly and improve efficiency with a small edit in instsimplify, but that can be a follow-up. Please do remove or edit the TODO comment here if there are planned improvements.

[arsenm]

r340187

lib/Analysis/ValueTracking.cpp

bool llvm::isKnownNeverNaN(const Value *V, const TargetLibraryInfo *TLI,
                            unsigned Depth) {
   assert(V->getType()->isFPOrFPVectorTy() && "Querying for NaN on non-FP type");
 
   // If we're told that NaNs won't happen, assume they won't.
   if (auto *FPMathOp = dyn_cast<FPMathOperator>(V))
     if (FPMathOp->hasNoNaNs())
       return true;
 
   // TODO: Handle instructions and potentially recurse like other 'isKnown'
   // functions. For example, the result of sitofp is never NaN.
 
   // Handle scalar constants.
   if (auto *CFP = dyn_cast<ConstantFP>(V))
     return !CFP->isNaN();
 
   if (Depth == MaxDepth)
     return false;
 
+  if (auto *Inst = dyn_cast<Instruction>(V)) {
+    switch (Inst->getOpcode()) {
+    case Instruction::FAdd:
+    case Instruction::FMul:
+    case Instruction::FSub:
+    case Instruction::FDiv:
+    case Instruction::FRem: {
+      // TODO: Need isKnownNeverInfinity
+      return false;
+    }
+    case Instruction::Select: {
+      return isKnownNeverNaN(Inst->getOperand(1), TLI, Depth + 1) &&
+             isKnownNeverNaN(Inst->getOperand(2), TLI, Depth + 1);
+    }
+    case Instruction::SIToFP:
+    case Instruction::UIToFP:
+      return true;
+    case Instruction::FPTrunc:
+    case Instruction::FPExt:
+      return isKnownNeverNaN(Inst->getOperand(0), TLI, Depth + 1);
+    default:
+      break;
+    }
+  }
+
   if (const auto *II = dyn_cast<IntrinsicInst>(V)) {
     switch (II->getIntrinsicID()) {
     case Intrinsic::canonicalize:
     case Intrinsic::fabs:
     case Intrinsic::copysign:
+    case Intrinsic::exp:
+    case Intrinsic::exp2:
+    case Intrinsic::floor:
+    case Intrinsic::ceil:
+    case Intrinsic::trunc:
+    case Intrinsic::rint:
+    case Intrinsic::nearbyint:
+    case Intrinsic::round:
       return isKnownNeverNaN(II->getArgOperand(0), TLI, Depth + 1);
     case Intrinsic::sqrt:
       return isKnownNeverNaN(II->getArgOperand(0), TLI, Depth + 1) &&
              CannotBeOrderedLessThanZero(II->getArgOperand(0), TLI);
     default:
       return false;
     }
   }

test/Transforms/InstCombine/known-never-nan.ll

;
   %fabs = call double @llvm.fabs.f64(double %arg0)
   %op = call double @llvm.sqrt.f64(double %fabs)
   %tmp = fcmp ord double %op, %op
   ret i1 %tmp
 }
 
 define i1 @exp_nnan_src(double %arg) {
 ; CHECK-LABEL: @exp_nnan_src(
-; CHECK-NEXT:    [[NNAN:%.*]] = fadd nnan double [[ARG:%.*]], 1.000000e+00
-; CHECK-NEXT:    [[OP:%.*]] = call double @llvm.exp.f64(double [[NNAN]])
-; CHECK-NEXT:    [[TMP:%.*]] = fcmp ord double [[OP]], 0.000000e+00
-; CHECK-NEXT:    ret i1 [[TMP]]
+; CHECK-NEXT:    ret i1 true
 ;
   %nnan = fadd nnan double %arg, 1.0
   %op = call double @llvm.exp.f64(double %nnan)
   %tmp = fcmp ord double %op, %op
   ret i1 %tmp
 }
 
 define i1 @exp2_nnan_src(double %arg) {
 ; CHECK-LABEL: @exp2_nnan_src(
-; CHECK-NEXT:    [[NNAN:%.*]] = fadd nnan double [[ARG:%.*]], 1.000000e+00
-; CHECK-NEXT:    [[OP:%.*]] = call double @llvm.exp2.f64(double [[NNAN]])
-; CHECK-NEXT:    [[TMP:%.*]] = fcmp ord double [[OP]], 0.000000e+00
-; CHECK-NEXT:    ret i1 [[TMP]]
+; CHECK-NEXT:    ret i1 true
 ;
   %nnan = fadd nnan double %arg, 1.0
   %op = call double @llvm.exp2.f64(double %nnan)
   %tmp = fcmp ord double %op, %op
   ret i1 %tmp
 }
 
 define i1 @floor_nnan_src(double %arg) {
 ; CHECK-LABEL: @floor_nnan_src(
-; CHECK-NEXT:    [[NNAN:%.*]] = fadd nnan double [[ARG:%.*]], 1.000000e+00
-; CHECK-NEXT:    [[OP:%.*]] = call double @llvm.floor.f64(double [[NNAN]])
-; CHECK-NEXT:    [[TMP:%.*]] = fcmp ord double [[OP]], 0.000000e+00
-; CHECK-NEXT:    ret i1 [[TMP]]
+; CHECK-NEXT:    ret i1 true
 ;
   %nnan = fadd nnan double %arg, 1.0
   %op = call double @llvm.floor.f64(double %nnan)
   %tmp = fcmp ord double %op, %op
   ret i1 %tmp
 }
 
 define i1 @ceil_nnan_src(double %arg) {
 ; CHECK-LABEL: @ceil_nnan_src(
-; CHECK-NEXT:    [[NNAN:%.*]] = fadd nnan double [[ARG:%.*]], 1.000000e+00
-; CHECK-NEXT:    [[OP:%.*]] = call double @llvm.ceil.f64(double [[NNAN]])
-; CHECK-NEXT:    [[TMP:%.*]] = fcmp ord double [[OP]], 0.000000e+00
-; CHECK-NEXT:    ret i1 [[TMP]]
+; CHECK-NEXT:    ret i1 true
 ;
   %nnan = fadd nnan double %arg, 1.0
   %op = call double @llvm.ceil.f64(double %nnan)
   %tmp = fcmp ord double %op, %op
   ret i1 %tmp
 }
 
 define i1 @trunc_nnan_src(double %arg) {
 ; CHECK-LABEL: @trunc_nnan_src(
-; CHECK-NEXT:    [[NNAN:%.*]] = fadd nnan double [[ARG:%.*]], 1.000000e+00
-; CHECK-NEXT:    [[OP:%.*]] = call double @llvm.trunc.f64(double [[NNAN]])
-; CHECK-NEXT:    [[TMP:%.*]] = fcmp ord double [[OP]], 0.000000e+00
-; CHECK-NEXT:    ret i1 [[TMP]]
+; CHECK-NEXT:    ret i1 true
 ;
   %nnan = fadd nnan double %arg, 1.0
   %op = call double @llvm.trunc.f64(double %nnan)
   %tmp = fcmp ord double %op, %op
   ret i1 %tmp
 }
 
 define i1 @rint_nnan_src(double %arg) {
 ; CHECK-LABEL: @rint_nnan_src(
-; CHECK-NEXT:    [[NNAN:%.*]] = fadd nnan double [[ARG:%.*]], 1.000000e+00
-; CHECK-NEXT:    [[OP:%.*]] = call double @llvm.rint.f64(double [[NNAN]])
-; CHECK-NEXT:    [[TMP:%.*]] = fcmp ord double [[OP]], 0.000000e+00
-; CHECK-NEXT:    ret i1 [[TMP]]
+; CHECK-NEXT:    ret i1 true
 ;
   %nnan = fadd nnan double %arg, 1.0
   %op = call double @llvm.rint.f64(double %nnan)
   %tmp = fcmp ord double %op, %op
   ret i1 %tmp
 }
 
 define i1 @nearbyint_nnan_src(double %arg) {
 ; CHECK-LABEL: @nearbyint_nnan_src(
-; CHECK-NEXT:    [[NNAN:%.*]] = fadd nnan double [[ARG:%.*]], 1.000000e+00
-; CHECK-NEXT:    [[OP:%.*]] = call double @llvm.nearbyint.f64(double [[NNAN]])
-; CHECK-NEXT:    [[TMP:%.*]] = fcmp ord double [[OP]], 0.000000e+00
-; CHECK-NEXT:    ret i1 [[TMP]]
+; CHECK-NEXT:    ret i1 true
 ;
   %nnan = fadd nnan double %arg, 1.0
   %op = call double @llvm.nearbyint.f64(double %nnan)
   %tmp = fcmp ord double %op, %op
   ret i1 %tmp
 }
 
 define i1 @round_nnan_src(double %arg) {
 ; CHECK-LABEL: @round_nnan_src(
-; CHECK-NEXT:    [[NNAN:%.*]] = fadd nnan double [[ARG:%.*]], 1.000000e+00
-; CHECK-NEXT:    [[OP:%.*]] = call double @llvm.round.f64(double [[NNAN]])
-; CHECK-NEXT:    [[TMP:%.*]] = fcmp ord double [[OP]], 0.000000e+00
-; CHECK-NEXT:    ret i1 [[TMP]]
+; CHECK-NEXT:    ret i1 true
 ;
   %nnan = fadd nnan double %arg, 1.0
   %op = call double @llvm.round.f64(double %nnan)
   %tmp = fcmp ord double %op, %op
   ret i1 %tmp
 }
 
 define i1 @known_nan_select(i1 %cond, double %arg0, double %arg1) {
 ; CHECK-LABEL: @known_nan_select(
-; CHECK-NEXT:    [[LHS:%.*]] = fadd nnan double [[ARG0:%.*]], 1.000000e+00
-; CHECK-NEXT:    [[RHS:%.*]] = fadd nnan double [[ARG1:%.*]], 2.000000e+00
-; CHECK-NEXT:    [[OP:%.*]] = select i1 [[COND:%.*]], double [[LHS]], double [[RHS]]
-; CHECK-NEXT:    [[TMP:%.*]] = fcmp ord double [[OP]], 0.000000e+00
-; CHECK-NEXT:    ret i1 [[TMP]]
+; CHECK-NEXT:    ret i1 true
 ;
   %lhs = fadd nnan double %arg0, 1.0
   %rhs = fadd nnan double %arg1, 2.0
   %op = select i1 %cond, double %lhs, double %rhs
   %tmp = fcmp ord double %op, %op
   ret i1 %tmp
 }
 

 ;
   %op = fpext float %arg0 to double
   %tmp = fcmp ord double %op, %op
   ret i1 %tmp
 }
 
 define i1 @fptrunc(double %arg0) {
 ; CHECK-LABEL: @fptrunc(
-; CHECK-NEXT:    [[ARG0_NNAN:%.*]] = fadd nnan double [[ARG0:%.*]], 1.000000e+00
-; CHECK-NEXT:    [[OP:%.*]] = fptrunc double [[ARG0_NNAN]] to float
-; CHECK-NEXT:    [[TMP:%.*]] = fcmp ord float [[OP]], 0.000000e+00
-; CHECK-NEXT:    ret i1 [[TMP]]
+; CHECK-NEXT:    ret i1 true
 ;
   %arg0.nnan = fadd nnan double %arg0, 1.0
   %op = fptrunc double %arg0.nnan to float
   %tmp = fcmp ord float %op, %op
   ret i1 %tmp
 }
 
 define i1 @fptrunc_maybe_nan(double %arg0) {