For instructions that unlikely generate machine instructions, they should also have 0 latency.
Details
Details
Diff Detail
Diff Detail
- Repository
- rL LLVM
Paths
| Differential D37833
[TargetTransformInfo] Detect 0 latency instructions ClosedPublic Authored by Carrot on Sep 13 2017, 4:26 PM.
Details Summary For instructions that unlikely generate machine instructions, they should also have 0 latency.
Diff Detail
Event TimelineThis revision is now accepted and ready to land.Sep 14 2017, 7:59 AM Closed by commit rL313288: [TargetTransformInfo] Detect 0 latency instructions (authored by Carrot). · Explain WhySep 14 2017, 12:21 PM This revision was automatically updated to reflect the committed changes.
Revision Contents
Diff 115258 llvm/trunk/include/llvm/Analysis/TargetTransformInfoImpl.h
llvm/trunk/test/Analysis/CostModel/X86/costmodel.ll
|