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[TargetTransformInfo] Detect 0 latency instructions
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Authored by Carrot on Sep 13 2017, 4:26 PM.

Details

Summary

For instructions that unlikely generate machine instructions, they should also have 0 latency.

Diff Detail

Repository
rL LLVM

Event Timeline

Carrot created this revision.Sep 13 2017, 4:26 PM
hfinkel accepted this revision.Sep 14 2017, 7:59 AM

LGTM

This revision is now accepted and ready to land.Sep 14 2017, 7:59 AM
This revision was automatically updated to reflect the committed changes.