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[InstCombine] Consider more cases where SimplifyDemandedUseBits do not converting AShr to LShr
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Authored by aaboud on Aug 20 2017, 11:30 AM.

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Summary

There are cases where AShr have better chance to be optimized than LShr, especially when the demanded bits are not known to be Zero, and even known to be similar to the sign bit.

Prevent converting AShr to LShr in SimplifyDemandedUseBits when sign bit is not known to be zero and some of the demanded bits are known to be equal to the sign bit.

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Repository
rL LLVM

Event Timeline

aaboud created this revision.Aug 20 2017, 11:30 AM
craig.topper added inline comments.Aug 21 2017, 12:43 AM
lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
524 ↗(On Diff #111897)

Should we use Depth+1 instead of 0 here?

aaboud updated this revision to Diff 111947.Aug 21 2017, 4:28 AM
aaboud marked an inline comment as done.

Updated patch to address Craig's comment.

Any more comments?

This revision is now accepted and ready to land.Aug 24 2017, 2:57 PM
This revision was automatically updated to reflect the committed changes.