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[X86] Enable isel to use the PAUSE instruction even when SSE2 is disabled. Clang part
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Authored by craig.topper on Aug 5 2017, 11:41 AM.

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Summary

On older processors this instruction encoding is treated as a NOP.

MSVC doesn't disable intrinsics based on features the way clang/gcc does. Because the PAUSE instruction encoding doesn't crash older processors, some software out there uses these intrinsics without checking for SSE2.

This change also seems to also be consistent with gcc behavior.

Fixes PR34079

Diff Detail

Repository
rL LLVM

Event Timeline

craig.topper created this revision.Aug 5 2017, 11:41 AM
craig.topper edited the summary of this revision. (Show Details)
RKSimon edited edge metadata.Aug 5 2017, 12:11 PM

Codegen test case on no-sse2 target?

Add test case

RKSimon accepted this revision.Aug 5 2017, 3:03 PM

LGTM

This revision is now accepted and ready to land.Aug 5 2017, 3:03 PM
This revision was automatically updated to reflect the committed changes.