[X86] Convert test "extractelement-legalization-store-ordering.ll" to be "update_llc_test_checks" tool friendly. NFC.

[gadi.haber]

Summary

NFC commit.
Converting the Codegen test "extractelement-legalization-store-ordering.ll" to be "update_llc_test_checks" friendly.

The changes to the test are needed for an upcoming scheduling patch.

[RKSimon]

LGTM

llvm/trunk/test/CodeGen/X86/extractelement-legalization-store-ordering.ll

-; RUN: llc < %s -mtriple i386-apple-darwin -mcpu=yonah | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | FileCheck %s
 
 target datalayout = "e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128"
 
 ; Make sure we don't break load/store ordering when turning an extractelement
 ; into loads, off the stack or a previous store.
 ; Be very explicit about the ordering/stack offsets.
 
+define void @test_extractelement_legalization_storereuse(<4 x i32> %a, i32* nocapture %x, i32* nocapture readonly %y, i32 %i) #0 {
 ; CHECK-LABEL: test_extractelement_legalization_storereuse:
-; CHECK:      # BB#0
-; CHECK-NEXT: pushl %ebx
-; CHECK-NEXT: pushl %edi
-; CHECK-NEXT: pushl %esi
-; CHECK-NEXT: movl 16(%esp), %eax
-; CHECK-NEXT: movl 24(%esp), %ecx
-; CHECK-NEXT: movl 20(%esp), %edx
-; CHECK-NEXT: paddd (%edx), %xmm0
-; CHECK-NEXT: movdqa %xmm0, (%edx)
-; CHECK-NEXT: movl  (%edx), %esi
-; CHECK-NEXT: movl  4(%edx), %edi
-; CHECK-NEXT: shll  $4, %ecx
-; CHECK-NEXT: movl  8(%edx), %ebx
-; CHECK-NEXT: movl  12(%edx), %edx
-; CHECK-NEXT: movl %esi, 12(%eax,%ecx)
-; CHECK-NEXT: movl %edi, (%eax,%ecx)
-; CHECK-NEXT: movl %ebx, 8(%eax,%ecx)
-; CHECK-NEXT: movl %edx, 4(%eax,%ecx)
-; CHECK-NEXT: popl %esi
-; CHECK-NEXT: popl %edi
-; CHECK-NEXT: popl %ebx
-; CHECK-NEXT: retl
-
-define void @test_extractelement_legalization_storereuse(<4 x i32> %a, i32* nocapture %x, i32* nocapture readonly %y, i32 %i) #0 {
+; CHECK:       ## BB#0: ## %entry
+; CHECK-NEXT:    pushl %ebx
+; CHECK-NEXT:    pushl %edi
+; CHECK-NEXT:    pushl %esi
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; CHECK-NEXT:    paddd (%edx), %xmm0
+; CHECK-NEXT:    movdqa %xmm0, (%edx)
+; CHECK-NEXT:    movl (%edx), %esi
+; CHECK-NEXT:    movl 4(%edx), %edi
+; CHECK-NEXT:    shll $4, %ecx
+; CHECK-NEXT:    movl 8(%edx), %ebx
+; CHECK-NEXT:    movl 12(%edx), %edx
+; CHECK-NEXT:    movl %esi, 12(%eax,%ecx)
+; CHECK-NEXT:    movl %edi, (%eax,%ecx)
+; CHECK-NEXT:    movl %ebx, 8(%eax,%ecx)
+; CHECK-NEXT:    movl %edx, 4(%eax,%ecx)
+; CHECK-NEXT:    popl %esi
+; CHECK-NEXT:    popl %edi
+; CHECK-NEXT:    popl %ebx
+; CHECK-NEXT:    retl
+; CHECK-NEXT:    ## -- End function
 entry:
   %0 = bitcast i32* %y to <4 x i32>*
   %1 = load <4 x i32>, <4 x i32>* %0, align 16
   %am = add <4 x i32> %a, %1
   store <4 x i32> %am, <4 x i32>* %0, align 16
   %ip0 = shl nsw i32 %i, 2
   %ip1 = or i32 %ip0, 1
   %ip2 = or i32 %ip0, 2