[SROA] Fix APInt size when alloca address space is not 0

[yaxunl]

Summary

SROA assumes alloca address space is 0, which causes assertion. This patch fixes that.

[arsenm]

You can add the test to test/SROA/alloca-address-space.ll

[yaxunl]

remove test non-zero-alloca-addr-space.ll and add test to address-spaces.ll

[yaxunl]

Ping

[arsenm]

test/Transforms/SROA/address-spaces.ll

2 ↗

(On Diff #102194)

I think this test should be left as is. Versions of this test with the non-0 alloca addrspace belong in a separate test file

2 ↗

(On Diff #102194)

I meant to merge it with the test that already changes the address space alloca, not this one

[yaxunl]

move the test to another one.

[arsenm]

LGTM

llvm/trunk/lib/Transforms/Scalar/SROA.cpp

for (LoadInst *LI : Loads) {
     IRB.SetInsertPoint(LI);
 
     DEBUG(dbgs() << "  Splitting load: " << *LI << "\n");
 
     uint64_t PartOffset = 0, PartSize = Offsets.Splits.front();
     int Idx = 0, Size = Offsets.Splits.size();
     for (;;) {
       auto *PartTy = Type::getIntNTy(Ty->getContext(), PartSize * 8);
-      auto *PartPtrTy = PartTy->getPointerTo(LI->getPointerAddressSpace());
+      auto AS = LI->getPointerAddressSpace();
+      auto *PartPtrTy = PartTy->getPointerTo(AS);
       LoadInst *PLoad = IRB.CreateAlignedLoad(
           getAdjustedPtr(IRB, DL, BasePtr,
-                         APInt(DL.getPointerSizeInBits(), PartOffset),
+                         APInt(DL.getPointerSizeInBits(AS), PartOffset),
                          PartPtrTy, BasePtr->getName() + "."),
           getAdjustedAlignment(LI, PartOffset, DL), /*IsVolatile*/ false,
           LI->getName());
       PLoad->copyMetadata(*LI, LLVMContext::MD_mem_parallel_loop_access); 
 
       // Append this load onto the list of split loads so we can find it later
       // to rewrite the stores.
       SplitLoads.push_back(PLoad);

llvm/trunk/test/Transforms/SROA/alloca-address-space.ll

 ; RUN: opt < %s -sroa -S | FileCheck %s
-target datalayout = "e-p:64:64:64-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64-A2"
+target datalayout = "e-p:64:64:64-p1:16:16:16-p2:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64-A2"
 
 declare void @llvm.memcpy.p2i8.p2i8.i32(i8 addrspace(2)* nocapture, i8 addrspace(2)* nocapture readonly, i32, i32, i1)
 declare void @llvm.memcpy.p1i8.p2i8.i32(i8 addrspace(1)* nocapture, i8 addrspace(2)* nocapture readonly, i32, i32, i1)
 declare void @llvm.memcpy.p2i8.p1i8.i32(i8 addrspace(2)* nocapture, i8 addrspace(1)* nocapture readonly, i32, i32, i1)
 declare void @llvm.memcpy.p1i8.p1i8.i32(i8 addrspace(1)* nocapture, i8 addrspace(1)* nocapture readonly, i32, i32, i1)
 
 
 

 define void @pr27557() {
   %1 = alloca %union.anon, align 8, addrspace(2)
   %2 = bitcast %union.anon addrspace(2)* %1 to i32* addrspace(2)*
   store i32* @g, i32* addrspace(2)* %2, align 8
   %3 = bitcast %union.anon addrspace(2)* %1 to i32 addrspace(3)* addrspace(2)*
   store i32 addrspace(3)* @l, i32 addrspace(3)* addrspace(2)* %3, align 8
   ret void
 }
+
+; Test load from and store to non-zero address space.
+define void @test_load_store_diff_addr_space([2 x float] addrspace(1)* %complex1, [2 x float] addrspace(1)* %complex2) {
+; CHECK-LABEL: @test_load_store_diff_addr_space
+; CHECK-NOT: alloca
+; CHECK: load i32, i32 addrspace(1)*
+; CHECK: load i32, i32 addrspace(1)*
+; CHECK: store i32 %{{.*}}, i32 addrspace(1)*
+; CHECK: store i32 %{{.*}}, i32 addrspace(1)*
+  %a0 = alloca [2 x i64], align 8, addrspace(2)
+  %a = getelementptr [2 x i64], [2 x i64] addrspace(2)* %a0, i32 0, i32 0
+  %a.cast = bitcast i64 addrspace(2)* %a to [2 x float] addrspace(2)*
+  %a.gep1 = getelementptr [2 x float], [2 x float] addrspace(2)* %a.cast, i32 0, i32 0
+  %a.gep2 = getelementptr [2 x float], [2 x float] addrspace(2)* %a.cast, i32 0, i32 1
+  %complex1.gep = getelementptr [2 x float], [2 x float] addrspace(1)* %complex1, i32 0, i32 0
+  %p1 = bitcast float addrspace(1)* %complex1.gep to i64 addrspace(1)*
+  %v1 = load i64, i64 addrspace(1)* %p1
+  store i64 %v1, i64 addrspace(2)* %a
+  %f1 = load float, float addrspace(2)* %a.gep1
+  %f2 = load float, float addrspace(2)* %a.gep2
+  %sum = fadd float %f1, %f2
+  store float %sum, float addrspace(2)* %a.gep1
+  store float %sum, float addrspace(2)* %a.gep2
+  %v2 = load i64, i64 addrspace(2)* %a
+  %complex2.gep = getelementptr [2 x float], [2 x float] addrspace(1)* %complex2, i32 0, i32 0
+  %p2 = bitcast float addrspace(1)* %complex2.gep to i64 addrspace(1)*
+  store i64 %v2, i64 addrspace(1)* %p2
+  ret void
+}