[ImplicitNullChecks] NFC Fix the implicit-null-checks.mir test

[skatkov]

Summary

Currently the test implicit-null-checks.mir crashes if we run llc with
-enable-implicit-null-checks -start-before implicit-null-checks
options. Change fixes the RET instruction causing the crash.

[sanjoy]

LGTM! Checking in.

test/CodeGen/X86/implicit-null-checks.mir

bb.1.not_null:
 
     %eax = MOV32ri 2200000
     %eax = AND32rm killed %eax, killed %rdi, 1, _, 0, _, implicit-def dead %eflags :: (load 4 from %ir.x)
     CMP32rr killed %eax, killed %esi, implicit-def %eflags
     JE_1 %bb.4.ret_100, implicit %eflags
 
   bb.2.ret_200:
     %eax = MOV32ri 200
-    RET 0, %eax
+    RETQ %eax
 
   bb.3.is_null:
     %eax = MOV32ri 42
-    RET 0, %eax
+    RETQ %eax
 
   bb.4.ret_100:
     %eax = MOV32ri 100
-    RET 0, %eax
+    RETQ %eax
 
 ...
 ---
 name:            imp_null_check_with_bitwise_op_1
 alignment:       4
 tracksRegLiveness: true
 liveins:
   - { reg: '%rdi' }
body:             |
   bb.2.ret_200:
     successors: %bb.3.is_null
 
     %eax = MOV32ri 200
 
   bb.3.is_null:
     liveins: %eax, %ah, %al, %ax, %bh, %bl, %bp, %bpl, %bx, %eax, %ebp, %ebx, %rax, %rbp, %rbx, %r12, %r13, %r14, %r15, %r12b, %r13b, %r14b, %r15b, %r12d, %r13d, %r14d, %r15d, %r12w, %r13w, %r14w, %r15w
 
-    RET 0, %eax
+    RETQ %eax
 
   bb.4.ret_100:
     %eax = MOV32ri 100
-    RET 0, %eax
+    RETQ %eax
 
 ...
 ---
 name:            imp_null_check_with_bitwise_op_2
 # CHECK-LABEL: name:            imp_null_check_with_bitwise_op_2
 alignment:       4
 tracksRegLiveness: true
 liveins:
bb.1.not_null:
     %eax = MOV32ri 2200000
     %eax = ADD32ri killed %eax, 100, implicit-def dead %eflags
     %eax = AND32rm killed %eax, killed %rdi, 1, _, 0, _, implicit-def dead %eflags :: (load 4 from %ir.x)
     CMP32rr killed %eax, killed %esi, implicit-def %eflags
     JE_1 %bb.4.ret_100, implicit %eflags
 
   bb.2.ret_200:
     %eax = MOV32ri 200
-    RET 0, %eax
+    RETQ %eax
 
   bb.3.is_null:
     %eax = MOV32ri 42
-    RET 0, %eax
+    RETQ %eax
 
   bb.4.ret_100:
     %eax = MOV32ri 100
-    RET 0, %eax
+    RETQ %eax
 
 ...
 ---
 name:            imp_null_check_with_bitwise_op_3
 # CHECK-LABEL: name:            imp_null_check_with_bitwise_op_3
 alignment:       4
 tracksRegLiveness: true
 liveins:
bb.1.not_null:
 
     %rdi  = MOV64ri 5000
     %rdi = AND64rm killed %rdi, killed %rdi, 1, _, 0, _, implicit-def dead %eflags :: (load 4 from %ir.x)
     CMP64rr killed %rdi, killed %rsi, implicit-def %eflags
     JE_1 %bb.4.ret_100, implicit %eflags
 
   bb.2.ret_200:
     %eax = MOV32ri 200
-    RET 0, %eax
+    RETQ %eax
 
   bb.3.is_null:
     %eax = MOV32ri 42
-    RET 0, %eax
+    RETQ %eax
 
   bb.4.ret_100:
     %eax = MOV32ri 100
-    RET 0, %eax
+    RETQ %eax
 
 ...
 ---
 name:            imp_null_check_with_bitwise_op_4
 # CHECK-LABEL: name:            imp_null_check_with_bitwise_op_4
 alignment:       4
 tracksRegLiveness: true
 liveins:
bb.1.not_null:
     %rbx  = MOV64rr %rdx
     %rdi = AND64rm killed %rbx, killed %rdi, 1, _, 0, _, implicit-def dead %eflags :: (load 4 from %ir.x)
     %rdx = MOV64ri 0
     CMP64rr killed %rdi, killed %rsi, implicit-def %eflags
     JE_1 %bb.4.ret_100, implicit %eflags
 
   bb.2.ret_200:
     %eax = MOV32ri 200
-    RET 0, %eax
+    RETQ %eax
 
   bb.3.is_null:
     %eax = MOV32ri 42
-    RET 0, %eax
+    RETQ %eax
 
   bb.4.ret_100:
     %eax = MOV32ri 100
-    RET 0, %eax
+    RETQ %eax
 
 ...
 ---
 name:            no_hoist_across_call
 # CHECK-LABEL: name:            no_hoist_across_call
 alignment:       4
 tracksRegLiveness: true
 liveins: