[AArch64] Add -mgeneral_regs_only option

[aemerson]

Summary

Add support for the -mgeneral_regs_only option (in AArch64 only), which restricts LLVM to generate code using only the general purpose registers. The command line argument is already supported by AArch64 GCC.

This patch essentially replaces the existing -mfpu=none option, as -mfpu will soon be dropped entirely.

[bogden]

Hi Amara,

LGTM.

We might want to get AArch32 side to accept this option too, but that's a separate patch/discussion.

Regards,

BErnie

-----Original Message-----
From: [e-mail] [mailto:cfe-commits-
[e-mail]] On Behalf Of Amara Emerson
Sent: 21 January 2014 08:25
To: Amara Emerson; [e-mail]
Cc: [e-mail]
Subject: [PATCH] [AArch64] Add -mgeneral_regs_only option

Add support for the -mgeneral_regs_only option (in AArch64 only), which
restricts LLVM to generate code using only the general purpose
registers. The command line argument is already supported by AArch64
GCC.

This patch essentially replaces the existing -mfpu=none option, as -
mfpu will soon be dropped entirely.

http://llvm-reviews.chandlerc.com/D2586

Files:

   docs/UsersManual.rst
   include/clang/Driver/Options.td
   lib/Driver/Tools.cpp
   test/Driver/aarch64-mfpu.c
   test/Driver/aarch64-mgeneral_regs_only.c

Index: docs/UsersManual.rst
===================================================================

• • docs/UsersManual.rst +++ docs/UsersManual.rst @@ -1061,6 +1061,13 @@ CRC instructions are enabled by default on ARMv8. +.. option:: -mgeneral_regs_only + + Generate code which only uses the general purpose registers. + + This option restricts the generated code to use general registers + only. This only applies to the AArch64 architecture. + Controlling Size of Debug Information
    • Index: include/clang/Driver/Options.td ===================================================================
  • include/clang/Driver/Options.td +++ include/clang/Driver/Options.td @@ -72,6 +72,7 @@ def m_x86_Features_Group : OptionGroup<"<m x86 features group>">, Group<m_Group>; def m_hexagon_Features_Group : OptionGroup<"<m hexagon features group>">, Group<m_Group>; def m_arm_Features_Group : OptionGroup<"<m arm features group>">, Group<m_Group>; +def m_aarch64_Features_Group : OptionGroup<"<m aarch64 features group>">, Group<m_Group>; def m_ppc_Features_Group : OptionGroup<"<m ppc features group>">, Group<m_Group>; def u_Group : OptionGroup<"<u group>">; @@ -1052,6 +1053,9 @@ def mnocrc : Flag<["-"], "mnocrc">, Group<m_arm_Features_Group>, HelpText<"Disallow use of CRC instructions (ARM only)">; +def mgeneral_regs_only : Flag<["-"], "mgeneral_regs_only">, Group<m_aarch64_Features_Group>, + HelpText<"Generate code which only uses the general purpose registers (AArch64 only)">; + def mvsx : Flag<["-"], "mvsx">, Group<m_ppc_Features_Group>; def mno_vsx : Flag<["-"], "mno-vsx">, Group<m_ppc_Features_Group>; def mfprnd : Flag<["-"], "mfprnd">, Group<m_ppc_Features_Group>; Index: lib/Driver/Tools.cpp ===================================================================
  • lib/Driver/Tools.cpp +++ lib/Driver/Tools.cpp @@ -515,10 +515,6 @@ Features.push_back("+crypto"); } else if (FPU == "neon") { Features.push_back("+neon");
• } else if (FPU == "none") {
• Features.push_back("-fp-armv8");
• Features.push_back("-crypto");
• Features.push_back("-neon"); } else D.Diag(diag::err_drv_clang_unsupported) << A->getAsString(Args); } @@ -1434,6 +1430,12 @@ // Honor -mfpu=. if (const Arg *A = Args.getLastArg(options::OPT_mfpu_EQ)) getAArch64FPUFeatures(D, A, Args, Features); + + if (Args.getLastArg(options::OPT_mgeneral_regs_only)) { + Features.push_back("-fp-armv8"); + Features.push_back("-crypto"); + Features.push_back("-neon"); + } } static void getTargetFeatures(const Driver &D, const llvm::Triple &Triple, Index: test/Driver/aarch64-mfpu.c ===================================================================
  • test/Driver/aarch64-mfpu.c +++ test/Driver/aarch64-mfpu.c @@ -19,8 +19,3 @@ CHECK-CRYPTO-NEON-FP-ARMV8: "-target-feature" "+neon" CHECK-CRYPTO-NEON-FP-ARMV8: "-target-feature" "+crypto" - RUN: %clang -target aarch64-linux-eabi -mfpu=none %s -### 2>&1 \ - RUN: | FileCheck --check-prefix=CHECK-NO-FP %s - CHECK-NO-FP: "-target-feature" "-fp-armv8" - CHECK-NO-FP: "-target-feature" "-crypto" -// CHECK-NO-FP: "-target-feature" "-neon" Index: test/Driver/aarch64-mgeneral_regs_only.c ===================================================================
  • /dev/null +++ test/Driver/aarch64-mgeneral_regs_only.c @@ -0,0 +1,7 @@ + Test the -mgeneral_regs_only option + + RUN: %clang -target aarch64-linux-eabi -mgeneral_regs_only %s -### 2>&1 \ + RUN: | FileCheck --check-prefix=CHECK-NO-FP %s + CHECK-NO-FP: "-target-feature" "-fp-armv8" + CHECK-NO-FP: "-target-feature" "-crypto" + CHECK-NO-FP: "-target-feature" "-neon"

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docs/UsersManual.rst

 
    Enable or disable CRC instructions.
 
    This option is used to indicate whether CRC instructions are to
    be generated. This only applies to the ARM architecture.
 
    CRC instructions are enabled by default on ARMv8.
 
+.. option:: -mgeneral_regs_only
+
+   Generate code which only uses the general purpose registers.
+
+   This option restricts the generated code to use general registers
+   only. This only applies to the AArch64 architecture.
+
 
 Controlling Size of Debug Information
 -------------------------------------
 
 Debug info kind generated by Clang can be set by one of the flags listed
 below. If multiple flags are present, the last one is used.
 
 .. option:: -g0

include/clang/Driver/Options.td

 def g_Group               : OptionGroup<"<g group>">;
 def g_flags_Group         : OptionGroup<"<g flags group>">;
 def i_Group               : OptionGroup<"<i group>">, Group<CompileOnly_Group>;
 def clang_i_Group         : OptionGroup<"<clang i group>">, Group<i_Group>;
 def m_Group               : OptionGroup<"<m group>">, Group<CompileOnly_Group>;
 def m_x86_Features_Group  : OptionGroup<"<m x86 features group>">, Group<m_Group>;
 def m_hexagon_Features_Group  : OptionGroup<"<m hexagon features group>">, Group<m_Group>;
 def m_arm_Features_Group  : OptionGroup<"<m arm features group>">, Group<m_Group>;
+def m_aarch64_Features_Group  : OptionGroup<"<m aarch64 features group>">, Group<m_Group>;
 def m_ppc_Features_Group  : OptionGroup<"<m ppc features group>">, Group<m_Group>;
 def u_Group               : OptionGroup<"<u group>">;
 
 def pedantic_Group        : OptionGroup<"<pedantic group>">,
   Group<CompileOnly_Group>;
 def reserved_lib_Group   : OptionGroup<"<reserved libs group>">;
 
 // Temporary groups for clang options which we know we don't support,

 def marm : Flag<["-"], "marm">, Alias<mno_thumb>;
 def ffixed_r9 : Flag<["-"], "ffixed-r9">, Group<m_arm_Features_Group>,
   HelpText<"Reserve the r9 register (ARM only)">;
 def mcrc : Flag<["-"], "mcrc">, Group<m_arm_Features_Group>,
   HelpText<"Allow use of CRC instructions (ARM only)">;
 def mnocrc : Flag<["-"], "mnocrc">, Group<m_arm_Features_Group>,
   HelpText<"Disallow use of CRC instructions (ARM only)">;
 
+def mgeneral_regs_only : Flag<["-"], "mgeneral_regs_only">, Group<m_aarch64_Features_Group>,
+  HelpText<"Generate code which only uses the general purpose registers (AArch64 only)">;
+
 def mvsx : Flag<["-"], "mvsx">, Group<m_ppc_Features_Group>;
 def mno_vsx : Flag<["-"], "mno-vsx">, Group<m_ppc_Features_Group>;
 def mfprnd : Flag<["-"], "mfprnd">, Group<m_ppc_Features_Group>;
 def mno_fprnd : Flag<["-"], "mno-fprnd">, Group<m_ppc_Features_Group>;
 def mmfcrf : Flag<["-"], "mmfcrf">, Group<m_ppc_Features_Group>;
 def mno_mfcrf : Flag<["-"], "mno-mfcrf">, Group<m_ppc_Features_Group>;
 def mpopcntd : Flag<["-"], "mpopcntd">, Group<m_ppc_Features_Group>;
 def mno_popcntd : Flag<["-"], "mno-popcntd">, Group<m_ppc_Features_Group>;

lib/Driver/Tools.cpp

if (FPU == "fp-armv8") {
     Features.push_back("+fp-armv8");
     Features.push_back("+neon");
   } else if (FPU == "crypto-neon-fp-armv8") {
     Features.push_back("+fp-armv8");
     Features.push_back("+neon");
     Features.push_back("+crypto");
   } else if (FPU == "neon") {
     Features.push_back("+neon");
-  } else if (FPU == "none") {
-    Features.push_back("-fp-armv8");
-    Features.push_back("-crypto");
-    Features.push_back("-neon");
   } else
     D.Diag(diag::err_drv_clang_unsupported) << A->getAsString(Args);
 }
 
 // Handle -mhwdiv=.
 static void getARMHWDivFeatures(const Driver &D, const Arg *A,
                               const ArgList &Args,
                               std::vector<const char *> &Features) {
void Clang::AddHexagonTargetArgs(const ArgList &Args,
   CmdArgs.push_back ("-machine-sink-split=0");
 }
 
 static void getAArch64TargetFeatures(const Driver &D, const ArgList &Args,
                                      std::vector<const char *> &Features) {
   // Honor -mfpu=.
   if (const Arg *A = Args.getLastArg(options::OPT_mfpu_EQ))
     getAArch64FPUFeatures(D, A, Args, Features);
+
+  if (Args.getLastArg(options::OPT_mgeneral_regs_only)) {
+    Features.push_back("-fp-armv8");
+    Features.push_back("-crypto");
+    Features.push_back("-neon");
+  }
 }
 
 static void getTargetFeatures(const Driver &D, const llvm::Triple &Triple,
                               const ArgList &Args, ArgStringList &CmdArgs,
                               bool ForAS) {
   std::vector<const char *> Features;
   switch (Triple.getArch()) {
   default:

test/Driver/aarch64-mfpu.c

 // CHECK-NEON-FP-ARMV8: "-target-feature" "+neon"
 
 // RUN: %clang -target aarch64-linux-eabi -mfpu=crypto-neon-fp-armv8 %s -### 2>&1 \
 // RUN:   | FileCheck --check-prefix=CHECK-CRYPTO-NEON-FP-ARMV8 %s
 // CHECK-CRYPTO-NEON-FP-ARMV8: "-target-feature" "+fp-armv8"
 // CHECK-CRYPTO-NEON-FP-ARMV8: "-target-feature" "+neon"
 // CHECK-CRYPTO-NEON-FP-ARMV8: "-target-feature" "+crypto"
 
-// RUN: %clang -target aarch64-linux-eabi -mfpu=none %s -### 2>&1 \
-// RUN:   | FileCheck --check-prefix=CHECK-NO-FP %s
-// CHECK-NO-FP: "-target-feature" "-fp-armv8"
-// CHECK-NO-FP: "-target-feature" "-crypto"
-// CHECK-NO-FP: "-target-feature" "-neon"

test/Driver/aarch64-mgeneral_regs_only.c

+// Test the -mgeneral_regs_only option
+
+// RUN: %clang -target aarch64-linux-eabi -mgeneral_regs_only %s -### 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-NO-FP %s
+// CHECK-NO-FP: "-target-feature" "-fp-armv8"
+// CHECK-NO-FP: "-target-feature" "-crypto"
+// CHECK-NO-FP: "-target-feature" "-neon"