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Fixing bug committed in rev. 278321
ClosedPublic

Authored by myatsina on Aug 14 2016, 10:31 AM.

Details

Summary

In theory the indices of RC (and thus the index used for LiveRegs) may differ from the indices of OpRC.
Fixed the code to extract the correct RC index.
OpRC contains the first X consecutive elements of RC, and thus their indices are currently de facto the same, therefore a test cannot be added at this point.

Diff Detail

Repository
rL LLVM

Event Timeline

myatsina updated this revision to Diff 67979.Aug 14 2016, 10:31 AM
myatsina retitled this revision from to Fixing bug committed in rev. 278321.
myatsina updated this object.
myatsina added reviewers: craig.topper, mkuper.
myatsina set the repository for this revision to rL LLVM.
myatsina added a subscriber: Restricted Project.
mkuper added inline comments.Aug 15 2016, 2:35 PM
lib/CodeGen/ExecutionDepsFix.cpp
512 ↗(On Diff #67979)

If the only thing you use rx for is OpRC->getRegister(), can you just iterate over OpRC directly? This will make it less confusing.
I see TargetRegisterClass has a begin()/end(), but I don't see a method that returns a range - perhaps it's worth adding as well, so you can use a range for here.

myatsina updated this revision to Diff 68156.Aug 16 2016, 4:17 AM

Added use of range iterator over registers in the RegisterClass

mkuper accepted this revision.Aug 16 2016, 4:50 PM
mkuper edited edge metadata.

LGTM with a small nit about the naming.

include/llvm/Target/TargetRegisterInfo.h
92 ↗(On Diff #68156)

For iterator_ranges, we tend to use names that follow the STL convention, not LLVM. So I'd suggest something like "registers()" or "regs()".

This revision is now accepted and ready to land.Aug 16 2016, 4:50 PM
This revision was automatically updated to reflect the committed changes.
MatzeB added a subscriber: MatzeB.Oct 28 2016, 1:46 PM
MatzeB added inline comments.
llvm/trunk/include/llvm/Target/TargetRegisterInfo.h
91–94

Why did you add this?

for (unsigned Reg : RegClass) { } already worked!