Fixing bug committed in rev. 278321

[myatsina]

Summary

In theory the indices of RC (and thus the index used for LiveRegs) may differ from the indices of OpRC.
Fixed the code to extract the correct RC index.
OpRC contains the first X consecutive elements of RC, and thus their indices are currently de facto the same, therefore a test cannot be added at this point.

[mkuper]

lib/CodeGen/ExecutionDepsFix.cpp

512 ↗

(On Diff #67979)

If the only thing you use rx for is OpRC->getRegister(), can you just iterate over OpRC directly? This will make it less confusing.
I see TargetRegisterClass has a begin()/end(), but I don't see a method that returns a range - perhaps it's worth adding as well, so you can use a range for here.

[myatsina]

Added use of range iterator over registers in the RegisterClass

[mkuper]

LGTM with a small nit about the naming.

include/llvm/Target/TargetRegisterInfo.h

92 ↗

(On Diff #68156)

For iterator_ranges, we tend to use names that follow the STL convention, not LLVM. So I'd suggest something like "registers()" or "regs()".

[MatzeB]

llvm/trunk/include/llvm/Target/TargetRegisterInfo.h

91–94

Why did you add this?

for (unsigned Reg : RegClass) { } already worked!

llvm/trunk/include/llvm/Target/TargetRegisterInfo.h

 // purposed, especially register allocation.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_TARGET_TARGETREGISTERINFO_H
 #define LLVM_TARGET_TARGETREGISTERINFO_H
 
 #include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/iterator_range.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineValueType.h"
 #include "llvm/IR/CallingConv.h"
 #include "llvm/MC/MCRegisterInfo.h"
 #include "llvm/Support/Printable.h"
 #include <cassert>
 #include <functional>
 
public:
 
   /// begin/end - Return all of the registers in this class.
   ///
   iterator       begin() const { return MC->begin(); }
   iterator         end() const { return MC->end(); }
 
   /// Return the number of registers in this class.
   unsigned getNumRegs() const { return MC->getNumRegs(); }
   
+  iterator_range<SmallVectorImpl<MCPhysReg>::const_iterator>
+  getRegisters() const {
+    return make_range(MC->begin(), MC->end());
+  }
+
   /// Return the specified register in the class.
   unsigned getRegister(unsigned i) const {
     return MC->getRegister(i);
   }
 
   /// Return true if the specified register is included in this register class.
   /// This does not include virtual registers.
   bool contains(unsigned Reg) const {

llvm/trunk/lib/CodeGen/ExecutionDepsFix.cpp

for (MachineOperand &CurrMO : MI->operands()) {
     MO.setReg(CurrMO.getReg());
     return;
   }
 
   // Go over all registers in the register class and find the register with
   // max clearance or clearance higher than Pref.
   unsigned MaxClearance = 0;
   unsigned MaxClearanceReg = OriginalReg;
-  for (unsigned rx = 0; rx < OpRC->getNumRegs(); ++rx) {
-    unsigned Clearance = CurInstr - LiveRegs[rx].Def;
+  for (auto Reg : OpRC->getRegisters()) {
+    assert(AliasMap[Reg].size() == 1 &&
+           "Reg is expected to be mapped to a single index");
+    int RCrx = *regIndices(Reg).begin();
+    unsigned Clearance = CurInstr - LiveRegs[RCrx].Def;
     if (Clearance <= MaxClearance)
       continue;
     MaxClearance = Clearance;
-    MaxClearanceReg = OpRC->getRegister(rx);
+    MaxClearanceReg = Reg;
 
     if (MaxClearance > Pref)
       break;
   }
 
   // Update the operand if we found a register with better clearance.
   if (MaxClearanceReg != OriginalReg)
     MO.setReg(MaxClearanceReg);