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Differential D111056

[AArch64] Make speculation-hardening-sls.ll x16 test more robust
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Authored by dmgreen on Oct 4 2021, 7:06 AM.

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kristof.beyls
Commits
rG10b93a5decea: [AArch64] Make speculation-hardening-sls.ll x16 test more robust
Summary

As suggested in D110830, this copies the Arm backend method of testing function calls through specific registers, using inline assembly to force the variable into x16 to check that the __llvm_slsblr_thunk calls do not use a register that may be clobbered by the linker.

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Event Timeline

dmgreen requested review of this revision.Oct 4 2021, 7:06 AM
dmgreen created this revision.
Herald added a project: Restricted Project. · View Herald TranscriptOct 4 2021, 7:06 AM
kristof.beyls accepted this revision.Oct 4 2021, 7:54 AM

LGTM, thanks!

This revision is now accepted and ready to land.Oct 4 2021, 7:54 AM
Closed by commit rG10b93a5decea: [AArch64] Make speculation-hardening-sls.ll x16 test more robust (authored by dmgreen). · Explain WhyOct 5 2021, 2:32 AM
This revision was automatically updated to reflect the committed changes.
dmgreen added a commit: rG10b93a5decea: [AArch64] Make speculation-hardening-sls.ll x16 test more robust.

Revision Contents

PathSize
llvm/
test/
CodeGen/
AArch64/
21 lines

Diff 377126

llvm/test/CodeGen/AArch64/speculation-hardening-sls.ll

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; HARDEN: bl {{__llvm_slsblr_thunk_x[0-9]+$}} ; HARDEN: bl {{__llvm_slsblr_thunk_x[0-9]+$}}
store i32 %call, i32* @b, align 4 store i32 %call, i32* @b, align 4
ret void ret void
; CHECK: .Lfunc_end ; CHECK: .Lfunc_end
} }
; Verify that neither x16 nor x17 are used when the BLR mitigation is enabled, ; Verify that neither x16 nor x17 are used when the BLR mitigation is enabled,
; as a linker is allowed to clobber x16 or x17 on calls, which would break the ; as a linker is allowed to clobber x16 or x17 on calls, which would break the
; correct execution of the code sequence produced by the mitigation. ; correct execution of the code sequence produced by the mitigation. The below
; The below test carefully increases register pressure to persuade code ; test attempts to force *%f into x16 using inline assembly.
; generation to produce a BLR x16. Yes, that is a bit fragile. define i64 @check_x16(i64 ()** nocapture readonly %fp, i64 ()** nocapture readonly %fp2) "target-features"="+neon,+reserve-x10,+reserve-x11,+reserve-x12,+reserve-x13,+reserve-x14,+reserve-x15,+reserve-x18,+reserve-x20,+reserve-x21,+reserve-x22,+reserve-x23,+reserve-x24,+reserve-x25,+reserve-x26,+reserve-x27,+reserve-x28,+reserve-x30,+reserve-x9" {
define i64 @check_x16(i64 (i8*, i64, i64, i64, i64, i64, i64, i64)** nocapture readonly %fp, i64 (i8*, i64, i64, i64, i64, i64, i64, i64)** nocapture readonly %fp2) "target-features"="+neon,+reserve-x10,+reserve-x11,+reserve-x12,+reserve-x13,+reserve-x14,+reserve-x15,+reserve-x18,+reserve-x20,+reserve-x21,+reserve-x22,+reserve-x23,+reserve-x24,+reserve-x25,+reserve-x26,+reserve-x27,+reserve-x28,+reserve-x30,+reserve-x9" {
entry: entry:
; CHECK-LABEL: check_x16: ; CHECK-LABEL: check_x16:
%0 = load i64 (i8*, i64, i64, i64, i64, i64, i64, i64)*, i64 (i8*, i64, i64, i64, i64, i64, i64, i64)** %fp, align 8 %f = load i64 ()*, i64 ()** %fp, align 8
%1 = bitcast i64 (i8*, i64, i64, i64, i64, i64, i64, i64)** %fp2 to i8** %x16_f = tail call i64 ()* asm "add $0, $1, #0", "={x16},{x16}"(i64 ()* %f) nounwind
%2 = load i8*, i8** %1, align 8 %call1 = call i64 %x16_f()
%call = call i64 %0(i8* %2, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0)
%3 = load i64 (i8*, i64, i64, i64, i64, i64, i64, i64)*, i64 (i8*, i64, i64, i64, i64, i64, i64, i64)** %fp2, align 8
%4 = bitcast i64 (i8*, i64, i64, i64, i64, i64, i64, i64)** %fp to i8**
%5 = load i8*, i8** %4, align 8;, !tbaa !2
%call1 = call i64 %3(i8* %5, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0)
; NOHARDEN: blr x16 ; NOHARDEN: blr x16
; ISBDSB-NOT: bl __llvm_slsblr_thunk_x16 ; ISBDSB-NOT: bl __llvm_slsblr_thunk_x16
; SB-NOT: bl __llvm_slsblr_thunk_x16 ; SB-NOT: bl __llvm_slsblr_thunk_x16
; CHECK ; CHECK
%add = add nsw i64 %call1, %call ret i64 %call1
ret i64 %add
; CHECK: .Lfunc_end ; CHECK: .Lfunc_end
} }
; Verify that the transformation works correctly for x29 when it is not ; Verify that the transformation works correctly for x29 when it is not
; reserved to be used as a frame pointer. ; reserved to be used as a frame pointer.
; Since this is sensitive to register allocation choices, only check this with ; Since this is sensitive to register allocation choices, only check this with
; DAGIsel to avoid too much accidental breaking of this test that is a bit ; DAGIsel to avoid too much accidental breaking of this test that is a bit
; brittle. ; brittle.
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